MODEL NO.: N184H4 - L01 · N184H4 - L01 is a 18.4” TFT Liquid Crystal Display module with Duo CCFL Backlight unit and 30 pins LVDS interface. This module supports 1920 x 1080 Full

Doc No.: Issued Date: Apr. 28, 2008 Model No.: N184H4 - L01

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TFT LCD Tentative Specification

MODEL NO.: N184H4 - L01

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2008-05-09 16:29:58 CST

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- CONTENTS - REVISION HISTORY ------------------------------------------------------- 3 1. GENERAL DESCRIPTION ------------------------------------------------------- 4 1.1 OVERVIEW 1.2 FEATURES 1.3 APPLICATION 1.4 GENERAL SPECIFICATIONS 1.5 MECHANICAL SPECIFICATIONS 2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5 2.1 ABSOLUTE RATINGS OF ENVIRONMENT 2.2 ELECTRICAL ABSOLUTE RATINGS 2.2.1 TFT LCD MODULE 2.2.2 BACKLIGHT UNIT 3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7

3.1 TFT LCD MODULE 3.2 BACKLIGHT UNIT

4. BLOCK DIAGRAM ------------------------------------------------------- 11

4.1 TFT LCD MODULE 4.2 BACKLIGHT UNIT

5. INPUT TERMINAL PIN ASSIGNMENT ------------------------------------------------------- 12 5.1 TFT LCD MODULE 5.2 BACKLIGHT UNIT 5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL 5.4 COLOR DATA INPUT ASSIGNMENT 5.5 EDID CODE DATA STRUCTURE 6. INTERFACE TIMING ------------------------------------------------------- 18 6.1 INPUT SIGNAL TIMING SPECIFICATIONS 6.2 POWER ON/OFF SEQUENCE 7. OPTICAL CHARACTERISTICS ------------------------------------------------------- 20 7.1 TEST CONDITIONS 7.2 OPTICAL SPECIFICATIONS 8. PRECAUTIONS ------------------------------------------------------- 24 8.1 ASSEMBLY AND HANDLING PRECAUTIONS 8.2 SAFETY PRECAUTIONS 9. PACKING ------------------------------------------------------- 25 9.1 CARTON 9.2 PALLET 10. DEFINITION OF LABELS ------------------------------------------------------- 27 10.1 CMO MODULE LABEL 10.2 CMO CARTON LABEL


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REVISION HISTORY

Version Date Page(New) Section Description

Ver. 0.0

Apr. 28, ‘08

All

All

Tentative Specification was first issued


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1. GENERAL DESCRIPTION

1.1 OVERVIEW N184H4 - L01 is a 18.4” TFT Liquid Crystal Display module with Duo CCFL Backlight unit and 30 pins

LVDS interface. This module supports 1920 x 1080 Full HD mode and can display 262,144 colors. The

optimum viewing angle is at 6 o’clock direction. The inverter module for Backlight is not built in.

1.2 FEATURES - Thin and High Brightness

- Full HD (1920 x 1080 pixels) resolution

- DE only mode

- 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock

- 2CCFL

1.3 APPLICATION - TFT LCD Notebook

1.4 GENERAL SPECIFICATI0NS Item Specification Unit Note

Active Area 408.96 (H) x 230.04 (V) (18.4” diagonal) mm Bezel Opening Area 413.11(H) x 234.24(V) mm (1)

Driver Element a-si TFT active matrix - - Pixel Number 1920 x R.G.B. x 1080 pixel - Pixel Pitch 0.213 (H) x 0.213(V) mm - Pixel Arrangement RGB vertical stripe - - Display Colors 262,144 color - Transmissive Mode Normally white - - Surface Treatment Hard coating (3H), Anti-Glare Type - -

1.5 MECHANICAL SPECIFICATIONS Item Min. Typ. Max. Unit Note

Horizontal (H) 422 422.5 423 mm Vertical (V) 247.5 248 248.5 mm Module Size Depth (D) 6.2 6.5 mm

(1)

Weight (708) (723) g - Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.


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2. ABSOLUTE MAXIMUM RATINGS 2.1 ABSOLUTE RATINGS OF ENVIRONMENT

Value Item Symbol Min. Max. Unit Note

Storage Temperature TST -20 +60 ºC (1) Operating Ambient Temperature TOP 0 +50 ºC (1), (2) Shock (Non-Operating) SNOP - 200/2 G/ms (3), (5) Vibration (Non-Operating) VNOP - 1.5 G (4), (5) Note (1) (a) 90 %RH Max. (Ta ≦ 40 ºC).

(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).

(c) No condensation.

Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max.

Note (3) 1 time for ± X, ± Y, ± Z. for Condition (200G / 2ms) is half Sine Wave,. Note (4) 10 ~ 500 Hz, 30 min/cycle,1cycles for each X, Y, Z axis.

Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid

enough so that the module would not be twisted or bent by the fixture.

The fixing condition is shown as below:

Side Mount Fixing Screw Side Mount Fixing Screw

Stage

Bracket

LCD Module

Gap=2mm

At Room Temperature

Storage Range

Relative Humidity (%RH)

Operating Range

Temperature (ºC)

100

8060 -20 400 20-40

80

40

60

2010

90


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2.2 ELECTRICAL ABSOLUTE RATINGS 2.2.1 TFT LCD MODULE

Value Item Symbol Min. Max. Unit Note

Power Supply Voltage VCC -0.3 +4.0 V Logic Input Voltage VIN -0.3 VCC+0.3 V (1)

2.2.2 BACKLIGHT UNIT Value Item Symbol Min. Max. Unit Note

Lamp Voltage VL -- 2.5K VRMS (1), (2), IL = 6.0 mA Lamp Current IL 2.0 7.0 mARMSLamp Frequency FL 45 80 KHz (1), (2)

Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation

should be restricted to the conditions described under Normal Operating Conditions.

Note (2) Specified values are for lamp (Refer to 3.2 for further information).


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3. ELECTRICAL CHARACTERISTICS 3.1 TFT LCD MODULE

Value Parameter Symbol Min. Typ. Max. Unit Note

Power Supply Voltage Vcc 3.0 3.3 3.6 V - Permissive Ripple Voltage VRP 50 mV - Rush Current IRUSH 1.5 A (2) Initial Stage Current IIS 1.0 A (2)

White (652) mA (3)a Power Supply Current Black Icc (1076) mA (3)b

LVDS Differential Input High Threshold VTH(LVDS) +100 mV (5), VCM=1.2V

LVDS Differential Input Low Threshold VTL(LVDS) -100 mV (5) VCM=1.2V

LVDS Common Mode Voltage VCM 1.125 1.375 V (5) LVDS Differential Input Voltage |VID| 100 600 mV (5) Terminating Resistor RT 100 Ohm Power per EBL WG PEBL - (TBD) - W (4) Note (1) The ambient temperature is Ta = 25 ± 2 ºC.

Note (2) IRUSH: the maximum current when VCC is rising

IIS: the maximum current of the first 100ms after power-on

Measurement Conditions: Shown as the following figure. Test pattern: black.

R1

(High to Low) (Control Signal)

+12V

SW Q2

C1

1uF

Vcc

+3.3V

2SK1470

Q1 2SK1475

47K

R2

1K

VR1 47K C2

0.01uF

C3 1uF

FUSE (LCD Module Input)

470us

Vcc rising time is 470us

+3.3V

0V

0.9Vcc

0.1Vcc

VCC

IIS

ICC

IRUSH

100ms


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Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60

Hz, whereas a power dissipation check pattern below is displayed.

Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input

power. Test conditions are as follows.

(a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, fv = 60 Hz,

(b) The pattern used is a black and white 32 x 36 checkerboard, slide #100 from the VESA file

“Flat Panel Display Monitor Setup Patterns”, FPDMSU.ppt.

(c) Luminance: 60 nits.

(d) The inverter used is provided from (Sumida). Please contact them for detail information. CMO

doesn’t provide the inverter in this product.

Note (5) The parameters of LVDS signals are defined as the following figures.

Active Area

a. White Pattern

Active Area

b. Black Pattern

0V

VCM |VID|

Single Ended

0V

|VID| VTH(LVDS)

VTL(LVDS)

Differential


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3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC Value Parameter Symbol Min. Typ. Max. Unit Note

Lamp Input Voltage VL － TBD － VRMS IL = 6.0 mA Lamp Current IL － TBD － mARMS (1)

－－ TBD VRMS (2) Lamp Turn On Voltage VS －－ TBD VRMS (2)

Operating Frequency FL 50 － 80 KHz (3) Lamp Life Time LBL 15000 －－ Hrs (5) Power Consumption PL － TBD － W (4), IL = 6.0 mANote (1) Lamp current is measured by utilizing a high frequency current meter as shown below:

Note (2) The voltage that must be larger than Vs should be applied to the lamp for more than 1 second

after startup. Otherwise the lamp may not be turned on.

Note (3)The lamp frequency may generate interference with horizontal synchronous frequency from the

display, and this may cause line flow on the display. In order to avoid interference, the lamp

frequency should be detached from the horizontal synchronous frequency and its harmonics as far

as possible.

Note (4) PL = IL × VL × 2

Note (5) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta

= 25 ±2 oC and IL = 6.0 mARMS until one of the following events occurs:

(a) When the brightness becomes ≦ 50% of its original value.

(b) When the effective ignition length becomes ≦ 80% of its original value. (The effective ignition

length is a scope that luminance is over 70% of that at the center point.)

Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the

inverter must have specifications for the modularized lamp. The performance of the Backlight,

such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for

the lamp. All the parameters of an inverter should be carefully designed to avoid generating too

much current leakage from high voltage output of the inverter. When designing or ordering the

inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the

inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module


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should be operated in the same manners when it is installed in your instrument.

Requirements for a system inverter design, which is intended to have a better display performance, a

better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its

leakage current.

a. The asymmetry rate of the inverter waveform should be 10% below;

b. The distortion rate of the waveform should be within √2 ± 10%;

c. The ideal sine wave form shall be symmetric in positive and negative polarities.

I p

I -p

* Asymmetry rate:

| I p – I –p | / Irms * 100%

* Distortion rate

I p (or I –p) / Irms


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4. BLOCK DIAGRAM 4.1 TFT LCD MODULE

4.2 BACKLIGHT UNIT

VEDID

DataEDID

Vcc

VL

LVDS Display

Data & Clock

TFT LCD PANEL

DATA DRIVER IC

SCA

N D

RIVER

IC

BACKLIGHT UNIT

LVDS INPUT / TIMING CONTROLLER

DC/DC CONVERTER &REFERENCE VOLTAGE

GENERATOR

INPU

T CO

NN

ECTO

R

JAE-FI-XB

30SRL-H

F11

LAMP CONNECTOR (JST-BHSR-02VS-1)

EDID EEPROM

CLKEDID

GND

1. HV (Pink) 2. LV (White)3. HV (Blue) 4. LV (Black)


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5. INPUT TERMINAL PIN ASSIGNMENT 5.1 TFT LCD MODULE

Pin Symbol Description Polarity Remark 1 Vss Ground 2 Vcc Power Supply +3.3 V (typical) 3 Vcc Power Supply +3.3 V (typical) 4 VEDID DDC 3.3V Power 5 NC Non connection 6 CLKEDID DDC Clock 7 DATAEDID DDC Data 8 RXO0- LVDS Differential Data Input (Odd) Negative

9 RXO0+ LVDS Differential Data Input (Odd) Positive 10 Vss Ground 11 RXO1- LVDS Differential Data Input (Odd) Negative

12 RXO1+ LVDS Differential Data Input (Odd) Positive 13 Vss Ground 14 RXO2- LVDS Differential Data Input (Odd) Negative

15 RXO2+ LVDS Differential Data Input (Odd) Positive 16 Vss Ground 17 RXOC- LVDS Clock Data Input (Odd) Negative

18 RXOC+ LVDS Clock Data Input (Odd) Positive 19 Vss Ground 20 RxE0- LVDS Differential Data Input (Even) Negative 21 RxE0+ LVDS Differential Data Input (Even) Positive 22 Vss Ground 23 RxE1- LVDS Differential Data Input (Even) Negative 24 RxE1+ LVDS Differential Data Input (Even) Positive 25 Vss Ground 26 RxE2- LVDS Differential Data Input (Even) Negative 27 RxE2+ LVDS Differential Data Input (Even) Positive 28 Vss Ground 29 RXEC- LVDS Clock Data Input (Even) Negative 30 RXEC+ LVDS Clock Data Input (Even) Positive

Note (1) Connector Part No.: JAE-FI-XB30SRL-HF11 or equivalent Note (2) User’s connector Part No: JAE-FI-X30C2L or equivalent

Note (3) The first pixel is odd as shown in the following figure.


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5.2 BACKLIGHT UNIT Pin Symbol Description Color 1 HV High Voltage White 2 LV Ground Black

Note (1) Connector Part No.: JST BHSR-02VS-1 or equivalent

Note (2) User’s connector Part No.: JST-SM02B-BHSS-1-TB or equivalent

5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL

IN6 IN5 IN4 IN3 IN2 IN1 IN0



OG0 OR3 OR2 OR1 OR0 OR5 OR4

OB1 OG4 OG3 OG2 OG1 OB0 OG5

DE OB5 OB4 OB3 OB2 Vsync Hsync

T/7

Signal for 1 DCLK Cycle (T)

RXO0+/-

RXO1+/-

RXO2+/-

RXOC+




EG0 ER3 ER2 ER1 ER0 ER5 ER4

EB1 EG4 EG3 EG2 EG1 EB0 EG5

DE EB5 EB4 EB3 EB2 Vsync Hsync

T/7

Signal for 1 DCLK Cycle (T)

RXEC+

RXE2+/-

RXE1+/-

RXE0+/-


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5.4 COLOR DATA INPUT ASSIGNMENT The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for

the color. The higher the binary input, the brighter the color. The table below provides the assignment of

color versus data input. Data Signal

Red Green Blue Color R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0

Basic Colors

Black Red Green Blue Cyan Magenta Yellow White

01000111

0 1 0 0 0 1 1 1

0 1 0 0 0 1 1 1

0 1 0 0 0 1 1 1

01000111

01000111

00101011

00101011

00101011

00101011

00101011

00101011

0 0 0 1 1 1 0 1

0 0 0 1 1 1 0 1

0 0 0 1 1 1 0 1

0 0 0 1 1 1 0 1

00011101

00011101

Gray Scale Of Red

Red(0)/Dark Red(1) Red(2)

: :

Red(61) Red(62) Red(63)

000::111

0 0 0 : : 1 1 1

0 0 0 : : 1 1 1

0 0 0 : : 1 1 1

001::011

010::101

000::000

000::000

000::000

000::000

000::000

000::000

0 0 0 : : 0 0 0

0 0 0 : : 0 0 0

0 0 0 : : 0 0 0

0 0 0 : : 0 0 0

000::000

000::000

Gray Scale Of Green

Green(0)/Dark Green(1) Green(2)

: :

Green(61) Green(62) Green(63)

000::000

0 0 0 : : 0 0 0

0 0 0 : : 0 0 0

0 0 0 : : 0 0 0

000::000

000::000

000::111

000::111

000::111

000::111

001::011

010::101

0 0 0 : : 0 0 0

0 0 0 : : 0 0 0

0 0 0 : : 0 0 0

0 0 0 : : 0 0 0

000::000

000::000

Gray Scale Of Blue

Blue(0)/Dark Blue(1) Blue(2)

: :

Blue(61) Blue(62) Blue(63)

000::000

0 0 0 : : 0 0 0

0 0 0 : : 0 0 0

0 0 0 : : 0 0 0

000::000

000::000

000::000

000::000

000::000

000::000

000::000

000::000

0 0 0 : : 1 1 1

0 0 0 : : 1 1 1

0 0 0 : : 1 1 1

0 0 0 : : 1 1 1

001::011

010::101

Note (1) 0: Low Level Voltage, 1: High Level Voltage


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5.5 EDID DATA STRUCTURE The EDID (Extended Display Identification Data) data formats are to support displays as defined in the

VESA Plug & Display and FPDI standards. Byte #

(decimal) Byte # (hex) Field Name and Comments Value

(hex) Value

(binary) 0 0 Header 00 000000001 1 Header FF 111111112 2 Header FF 111111113 3 Header FF 111111114 4 Header FF 111111115 5 Header FF 111111116 6 Header FF 111111117 7 Header 00 000000008 8 EISA ID manufacturer name (“CMO”) 0D 000011019 9 EISA ID manufacturer name (Compressed ASCII) AF 10101111

10 0A ID product code (N184H4-L01) 00 0000000011 0B ID product code (hex LSB first; N184H4-L01) 18 0001100012 0C ID S/N (fixed “0”) 00 0000000013 0D ID S/N (fixed “0”) 00 0000000014 0E ID S/N (fixed “0”) 00 0000000015 0F ID S/N (fixed “0”) 00 0000000016 10 Week of manufacture (fixed week code) 23 0010001117 11 Year of manufacture (fixed year code) 12 0001001018 12 EDID structure version # (“1”) 01 0000000119 13 EDID revision # (“3”) 03 0000001120 14 Video I/P definition (“digital”) 80 1000000021 15 Max H image size (“40.896cm”) 29 0010100122 16 Max V image size (“23.004cm”) 17 0001011123 17 Display Gamma (Gamma = ”2.2”) 78 0111100024 18 Feature support (“Active off, RGB Color”) 0A 0000101025 19 Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1 Gy0 CC 1100110026 1A Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0 B5 1011010127 1B Rx=0.6553 A7 1010011128 1C Ry=0.3277 54 0101010029 1D Gx=0.2722 45 0100010130 1E Gy=0.5905 97 1001011131 1F Bx=0.1508 26 0010011032 20 By=0.0887 16 0001011033 21 Wx=0.313 50 0101000034 22 Wy=0.329 54 0101010035 23 Established timings 1 00 0000000036 24 Established timings 2 00 0000000037 25 Manufacturer’s reserved timings 00 0000000038 26 Standard timing ID # 1 01 0000000139 27 Standard timing ID # 1 01 0000000140 28 Standard timing ID # 2 01 0000000141 29 Standard timing ID # 2 01 00000001


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Byte # (decimal)

Byte # (hex) Field Name and Comments Value

(hex) Value

(binary) 42 2A Standard timing ID # 3 01 0000000143 2B Standard timing ID # 3 01 0000000144 2C Standard timing ID # 4 01 0000000145 2D Standard timing ID # 4 01 0000000146 2E Standard timing ID # 5 01 0000000147 2F Standard timing ID # 5 01 0000000148 30 Standard timing ID # 6 01 0000000149 31 Standard timing ID # 6 01 0000000150 32 Standard timing ID # 7 01 0000000151 33 Standard timing ID # 7 01 0000000152 34 Standard timing ID # 8 01 0000000153 35 Standard timing ID # 8 01 0000000154

36 Detailed timing description # 1 Pixel clock (“138.65MHz”, According to VESA CVT Rev1.1) 29 00101001

55 37 # 1 Pixel clock (hex LSB first) 36 0011011056 38 # 1 H active (“1920”) 80 1000000057 39 # 1 H blank (“160”) A0 1010000058 3A # 1 H active : H blank (“1920 : 160”) 70 0111000059 3B # 1 V active (”1080”) 38 0011100060 3C # 1 V blank (”31”) 1F 0001111161 3D # 1 V active : V blank (”1080 :31”) 40 0100000062 3E # 1 H sync offset (”48”) 30 0011000063 3F # 1 H sync pulse width ("32”) 20 0010000064 40 # 1 V sync offset : V sync pulse width (”3 : 5”) 35 0011010165

41 # 1 H sync offset : H sync pulse width : V sync offset : V sync width (”48: 32 : 3 : 5”) 00 00000000

66 42 # 1 H image size (”408 mm”) 98 1001100067 43 # 1 V image size (”230 mm”) E6 1110011068 44 # 1 H image size : V image size (”408 : 230”) 10 0001000069 45 # 1 H boarder (”0”) 00 0000000070 46 # 1 V boarder (”0”) 00 0000000071

47 # 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol Negatives 18 00011000

72 48 Detailed timing description # 2 00 0000000073 49 # 2 Flag 00 0000000074 4A # 2 Reserved 00 0000000075

4B # 2 FE (hex) defines ASCII string (Model Name “N184H4-L01”, ASCII) FE 11111110

76 4C # 2 Flag 00 0000000077 4D # 2 1st character of name (“N”) 4E 0100111078 4E # 2 2nd character of name (“1”) 31 0011000179 4F # 2 3rd character of name (“8”) 38 0011100080 50 # 2 4th character of name (“4”) 34 0011010081 51 # 2 5th character of name (“H”) 48 0100100082 52 # 2 6th character of name (“4”) 34 0011010083 53 # 2 7th character of name (“-”) 2D 0010110184 54 # 2 8th character of name (“L”) 4C 01001100


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Byte # (decimal)

Byte # (hex) Field Name and Comments Value

(hex) Value (binary)

85 55 # 2 9th character of name (“0”) 30 00110000

86 56 # 2 9th character of name (“1”) 31 0011000187 57 # 2 New line character indicates end of ASCII string 0A 0000101088 58 # 2 Padding with “Blank” character 20 0010000089 59 # 2 Padding with “Blank” character 20 0010000090 5A Detailed timing description # 3 00 0000000091 5B # 3 Flag 00 0000000092 5C # 3 Reserved 00 0000000093 5D # 3 FE (hex) defines ASCII string (Vendor “CMO”, ASCII) FE 1111111094 5E # 3 Flag 00 0000000095 5F # 3 1st character of string (“C”) 43 0100001196 60 # 3 2nd character of string (“M”) 4D 0100110197 61 # 3 3rd character of string (“O”) 4F 0100111198 62 # 3 New line character indicates end of ASCII string 0A 0000101099 63 # 3 Padding with “Blank” character 20 00100000100 64 # 3 Padding with “Blank” character 20 00100000101 65 # 3 Padding with “Blank” character 20 00100000102 66 # 3 Padding with “Blank” character 20 00100000103 67 # 3 Padding with “Blank” character 20 00100000104 68 # 3 Padding with “Blank” character 20 00100000105 69 # 3 Padding with “Blank” character 20 00100000

106 6A # 3 Padding with “Blank” character 20 00100000

107 6B # 3 Padding with “Blank” character 20 00100000108 6C Detailed timing description # 4 00 00000000109 6D # 4 Flag 00 00000000110 6E # 4 Reserved 00 00000000

111 6F # 4 FE (hex) defines ASCII string (Model Name“N184H4-L01”, ASCII) FE 11111110

112 70 # 4 Flag 00 00000000113 71 # 4 1st character of name (“N”) 4E 01001110114 72 # 4 2nd character of name (“1”) 31 00110001115 73 # 4 3rd character of name (“8”) 38 00111000116 74 # 4 4th character of name (“4”) 34 00110100117 75 # 4 5th character of name (“H”) 48 01001000118 76 # 4 6th character of name (“4”) 34 00110100119 77 # 4 7th character of name (“-”) 2D 00101101120 78 # 4 8th character of name (“L”) 4C 01001100121 79 # 4 9th character of name (“0”) 30 00110000122 7A # 4 9th character of name (“1”) 31 00110001123 7B # 4 New line character indicates end of ASCII string 0A 00001010124 7C # 4 Padding with “Blank” character 20 00100000125 7D # 4 Padding with “Blank” character 20 00100000126 7E Extension flag 00 00000000127 7F Checksum A5 10100101


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6. INTERFACE TIMING 6.1 INPUT SIGNAL TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit NoteDCLK Frequency 1/Tc TBD 69.25 TBD MHz (2)

Vertical Total Time TV TBD 1111 TBD TH - Vertical Active Display Period TVD TBD 1080 TBD TH -

Vertical Active Blanking Period TVB TV-TVD 31 TV-TVD TH Horizontal Total Time TH TBD 1040 TBD Tc (2)

Horizontal Active Display Period THD TBD 960 TBD Tc (2)

DE

Horizontal Active Blanking Period THB TH-THD 80 TH-THD Tc (2) Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.

(2) 2 channels LVDS input.

INPUT SIGNAL TIMING DIAGRAM

TH

TC DCLK

THD

TVD

Tv

DE

DE

DATA


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6.2 POWER ON/OFF SEQUENCE

Timing Specifications:

0.5≦ t1 ≦ 10 ms

0 ≦ t2 ≦ 50 ms

0 ≦ t3 ≦ 50 ms

t4 ≧ 500 ms

t5 ≧ 200 ms

t6 ≧ 200 ms

Note (1) Please follow the power on/off sequence described above. Otherwise, the LCD module might be

damaged.

Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be

sure to pull down the power supply of LCD Vcc to 0 V.

Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the

interface signal is valid. The Backlight inverter power must be turned off before the power supply

for the logic and the interface signal is invalid.

Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To

avoid this phenomenon, we suggest that the Vcc falling time is better to follow 5≦t7≦300 ms.

- Power Supply for LCD, Vcc

LVDS Interface

- Power for Lamp

Restart Power On Power Off

50%50%

0V

0V 10%

t6 t5

t4 t3 t2

t1

90%

10%

90%

Valid Data

ONOFF OFF

t7

10%


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7. OPTICAL CHARACTERISTICS 7.1 TEST CONDITIONS

Item Symbol Value Unit Ambient Temperature Ta 25±2 oC Ambient Humidity Ha 50±10 %RH Supply Voltage VCC 3.3 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Inverter Current IL 6.0 mA Inverter Driving Frequency FL 55 KHz Inverter Darfon-VK.121164.101

7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be measured under the test conditions described in 7.1 and stable environment shown in Note (5).

Item Symbol Condition Min. Typ. Max. Unit Note

Rx 0.645 Red

Ry 0.323

Gx 0.264 Green

Gy 0.603 Bx 0.156

Blue By 0.077

Wx 0.313

Color Chromaticity

White Wy

Typ – 0.03

0.329

Typ + 0.03 (1), (5)

Average Luminance of White LAVE 200 250 --- cd/m2 (4), (5)

Contrast Ratio CR

θx=0°, θY =0° CS-1000T

350 500 --- - (2), (5)TR --- 3 8 ms Response Time TF θx=0°, θY =0° --- 5 12 ms

(3)

White Variation δW θx=0°, θY =0° --- 1.25 1.40 - (5), (6)θx+ 50 60 --- Horizontal θx- 50 60 --- θY+ 40 50 ---

Viewing Angle Vertical

θY-

CR ≧ 10

40 50 ---

Deg. (1), (5)


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Note (1) Definition of Viewing Angle (θx, θy):

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L63 / L0

L63: Luminance of gray level 63

L 0: Luminance of gray level 0

CR = CR (1)

CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).

Note (3) Definition of Response Time (TR, TF):

12 o’clock direction

θy+ = 90º

6 o’clock

θy- = 90º

θx− θx+

θy- θy+

x- y+

y- x+

Normal

θx = θy = 0º

θX+ = 90º

θX- = 90º

100%

90%

10%

0%

Gray Level 63

Gray Level 0

Gray Level 63

Time TF

Optical

Response

TR

66.67 ms 66.67 ms


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Note (4) Definition of Average Luminance of White (LAVE):

Measure the luminance of gray level 63 at 5 points

LAVE = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

L (x) is corresponding to the luminance of the point X at Figure in Note (6)

Note (5) Measurement Setup:

The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt

temperature change during measuring. In order to stabilize the luminance, the measurement

should be executed after lighting Backlight for 20 minutes in a windless room.

CS-1000T

500 mm

LCD Module

LCD Panel

Center of the ScreenLight Shield Room

(Ambient Luminance < 2 lux)

USB2000


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Note (6) Definition of White Variation (δW):

Measure the luminance of gray level 63 at 5 points

δW = { Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

Active Area

W

H

Verti

cal L

ine

Horizontal Line

1

2 3

4 5

W/4 W/2 3W/4

H/4

H/2

3H/4

: Test Point

X=1 to 5

X


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8. PRECAUTIONS 8.1 ASSEMBLY AND HANDLING PRECAUTIONS

(1) Do not apply rough force such as bending or twisting to the module during assembly.

(2) To assemble or install module into user’s system can be only in clean working areas. The dust and oil

may cause electrical short or worsen the polarizer.

(3) It’s not permitted to have pressure or impulse on the module because the LCD panel and Backlight will

be damaged.

(4) Always follow the correct power sequence when LCD module is connecting and operating. This can

prevent damage to the CMOS LSI chips during latch-up.

(5) Do not pull the I/F connector in or out while the module is operating.

(6) Do not disassemble the module.

(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and

easily scratched.

(8) It is dangerous that moisture come into or contacted the LCD module, because moisture may damage

LCD module when it is operating.

(9) High temperature or humidity may reduce the performance of module. Please store LCD module within

the specified storage conditions.

(10) When ambient temperature is lower than 10ºC may reduce the display quality. For example, the

response time will become slowly, and the starting voltage of CCFL will be higher than room

temperature.

8.2 SAFETY PRECAUTIONS (1) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while

assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.

(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.

(3) After the module’s end of life, it is not harmful in case of normal operation and storage.


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9. PACKING 9.1 CARTON

Figure. 9-1 Packing method


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9.2 PALLET

Figure. 9-2 Packing method


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10. DEFINITION OF LABELS

10.1 CMO MODULE LABEL The barcode nameplate is pasted on each module as illustration, and its definitions are as following

explanation.

(a) Model Name: N184H4 - L01

(b) Revision: Rev. XX, for example: A1, …, C1, C2 …etc.

(c) Serial ID: X X X X X X X Y M D X N N N N

(d) Production Location: MADE IN XXXX. XXXX stands for production location.

(e) UL logo: LEOO especially stands for panel manufactured by CMO NingBo satisfying UL requirement.

The panel without LEOO mark stands for manufactured by CMO Taiwan satisfying UL requirement.

Serial ID includes the information as below:

(a) Manufactured Date: Year: 1~9, for 2001~2009

Month: 1~9, A~C, for Jan. ~ Dec.

Day: 1~9, A~Y, for 1st to 31st, exclude I , O and U

(b) Revision Code: cover all the change

(c) Serial No.: Manufacturing sequence of product

Year, Month, Date CMO Internal Use Revision

Serial No. CMO Internal Use

CMO Internal Use

N184H4 -L01


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10.2 CMO CARTON LABEL

(a) Production location: Made In XXXX. XXXX stands for production location.

Documents

MODEL NO.: N184H4 - L01 · N184H4 - L01 is a 18.4” TFT Liquid Crystal Display module with Duo CCFL Backlight unit and 30 pins LVDS interface. This module supports 1920 x 1080 Full