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Contents Page

Cyclical Program Execution ........................................................................................................... 2Process Images .................................................................................................................................... 3

Program Structure ................................................................................................................................ 4

Types of Program Blocks ................................................................................................................... 5

Normally Open and Normally Closed Contacts. Sensors and Symbols............................................... 6

Exercise .............................................................................................................................................. 7

Addressing of S7-300 Modules ................................................................................................ 8

DI/DO Addressing in Multi-Tier Configurations ................................................................................. 9

Binary Logic Operations: AND, OR ................................................................................................... 10

Binary Logic Operations: Exclusive OR (XOR) ................................................................................ 11

Result of Logic Operation, First Check. Examples............................................................................. 12Assignment, Setting, Resetting............................................................................................................. 13

Settin / Resettin a Fli Flo ........................................................................................................... 14

Connector ............................................................................................................................................. 15

Instructions that Affect the RLO ............................................................................................ 16

Master Control Relay Function ............................................................................................................ 17

Unconditional Jump (Independent of RLO) ........................................................................................... 18

Conditional Jump (Dependent on RLO) .............................................................................................. 19

RLO Edge Detection ........................................................................................................... ........... 20

Si nal Ed e Detection .................................................................................................................... 21

Training Centerfor Automation and Drives

ST-7PRO1Binary OperationsPage 1

Exercise: Program for a Bottling Plant (Mode Selection) . ................................................... 22

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Starting The CPU carries out a complete restart (with OB100) when switching on or when

switching from STOP --> RUN. During a complete restart, the operating systemdeletes the non-retentive bit memories, timers and counters, deletes the interrupt

stack and block stack, resets all stored hardware interrupts and diagnostic

interrupts and starts the scan cycle monitoring time.

Scan Cycle The cyclical operation of the CPU consists of three main sections, as shown in the

diagram above:

The CPU checks the status of the input signals and updates the process-

image input table.

It executes the user program with the respective instructions.

It writes the values from the process-image output table into the output

modules.



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Introduction The CPU checks the status of the inputs and outputs in every cycle. There are

specific memory areas in which the modules binary data are stored: PII and PIQ.The program accesses these registers during processing.

PII The process-image input table is found in the CPUs memory area. The signal state

of all inputs is stored there.

e process- mage ou pu a e con a ns e ou pu va ues a resu rom e

program execution. These are sent to the actual outputs (Q) at the end of the cycle.

User Program When you check inputs in the user program with, for example, A I 2.0, the last state

from the PII is evaluated. This guarantees that the same signal state is always

delivered when there is multiple checking of the input within one cycle.



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Linear Program The entire program is found in one continuous program block.

This model resembles a hard-wired relay control, that was replaced by a

programmable logic controller. The CPU processes the individual instructions oneafter the other.

Partitioned The program is divided into blocks, whereby every block only contains the

Program program for solving a partial task. Further partitioning through networks is possible

within a block. You can generate network templates for networks of the same type.

e organ za on oc con a ns ns ruc ons a ca e o er oc s n a

defined sequence.

Structured A structured program contains blocks with parameters, so-called parameter

Program assignable blocks. These blocks are designed in such a way that they can be used

universally.When a parameter assignable block is called, it is given current parameters (the

exact addresses of in uts and out uts as well as arameter values .

Example:

A "pump block" contains instructions for the control of a pump.

The program blocks, that are responsible for the control of special pumps,

call the "pump block" and give it information about which pump is to be

controlled with which parameters.

When the "pump block" has completed the execution of its instructions, the

program returns to the calling block (e.g. OB 1), which continues with the



processing of its instructions.

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User Blocks User blocks contain the program code and the user program data.

In a structured user program, some blocks are called and processed cyclically,

others only as required.

System Blocks System blocks are pre-defined functions or function blocks that are integrated in the

CPUs operating system. These blocks do not occupy additional space in the user

memory.

System blocks are called from the user program. These blocks have the same

, .

The user program is thus easily transportable between various CPUs or

programmable controllers.



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Process The use of normally open or normally closed contacts for the sensors in a controlledprocess epen s on e sa e y regu a ons or e process.

Normally closed contacts are always used for limit switches and safety switches, so

that dangerous conditions do not arise if a wire break occurs in the sensor circuit.

Normally closed contacts are also used for switching off machinery for the samereason.

Symbols In LAD, a symbol with the name "NO contact" is used for checking for signal state"1" and a symbol with the name "NC contact" to check for signal state "0".

NO contact or a non-activated NC contact.

Example The result of check for the "NO contact" symbol is "1" if an NC contact in themachine is not activated.



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Exercise Complete the programs above to obtain the following functionality: When switch S1s ac va e an sw c s no ac va e , e g s ou e n a ree cases.

Note ! The terms "NO contact" and "NC contact" have different meanings depending onwhether they are used in the process hardware context or as symbols in thesoftware.



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Slot Numbers The slot numbers in the rack of an S7-300 simplify addressing within the- env ronmen . e rs a ress on a mo u e s e erm ne y e pos on o

the module in the rack.

Slot 1 Power supply. This is the first slot by default.A power supply module is not absolutely essential. An S7-300 can also be suppliedwith 24V direct.

Slot 2 Slot for the CPU.

Slot 3 Logically reserved for an interface module (IM) for multi-tier configurations usingexpansion racks. Even if no IM is installed, it must be included for addressingpurposes.

You can physically reserve the slot (e.g. for installation of an IM at a later date) byinserting a DM370 dummy module.

Slots 4-11 Slot 4 is the first slot that can be used for I/O modules, communications processors(CP) or function modules (FM).

Addressing examples:

A DI module in slot 4 begins with the byte address 0 .

The top LED of a DO module in slot 6 is called Q8.0 .

Note 4 byte addresses are reserved for each slot. When using 16-channel DI/DOmodules, two byte addresses are lost in every slot!



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Multi-Tier The slots also have fixed addresses in a multi-tier configuration.on gura ons

Examples:

Q7.7 is the last bit of a 32-channel DO module plugged into slot 5 of rack 0.

IB105 is the second byte of a DI module in slot 6 of rack 3.

QW60 is the first 2 bytes of a DO module in slot 11 of rack 1.

ID80 is all 4 bytes of a 32-channel DI module in slot 8 in rack 2.



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Logic Tables

AND I 0.0 I 0.1 Q 8.0

0 0

0 1

1 0

1 1

OR I 0.2 I 0.3 Q 8.2

0 0

0 1

1 0

1 1



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Logic Table

XOR I 0.4 I 0.5 Q 8.0

0 0

0 1

1 0

1 1

Rule The following rule is valid for the logic operation of two addresses after XOR:the output has signal state "1", when one and only one of the two checks isfulfilled ("one and only one of two" ).

At tention! This rule cannot be generalized to "one and only one of n" ! for the logicoperation of several addresses after XOR !!

As of the third XOR instruction, the old RLO is gated with the new result ofcheck after XOR.



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Signal State A logic operation is made up of a series of instructions to check the states of signalsnpu s , ou pu s , memor es , mers , coun ers or a a s

and instructions to set Q,M,T,C or D.

Result of Check When the program is executed, the result of check is obtained. If the checkcondition is fulfilled, the result of check is 1. If it is not fulfilled, the result of check is0.

First Check The result of the first check is stored as the result of logic operation (RLO).

Result of Logic When the next check instructions are executed, the result of logic operation isOperation gated with the result of check and a new RLO is obtained.

When the last check instruction in a logic operation has been executed, the RLOremains the same. A number of instructions using the same RLO can follow.

Note The result of the first check is stored without being subjected to a logic operation. Ittherefore makes no difference whether you program the first check with an AND oran OR instruction in STL. To enable your program to be converted into one of theo er programm ng anguages, you s ou , owever, a ways program us ng ecorrect instruction.



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Flip Flop A flip flop has a Set input and a Reset input. The memory bit is set or reset,

depending on which input has an RLO=1.

If there is an RLO=1 at both inputs at the same time, the priority must bedetermined.

Priority In LAD and FBD there are different symbols for Dominant Set and Dominant Reset

functions.

In STL, the instruction that was programmed last has priority.

Note If an output is set with a Set instruction, it is reset on a complete restart of the CPU.

If M 0.0 in the example above has been declared retentive, it will remain in the set

state after a complete restart of the CPU and the reset output Q 9.3 will be be

assigned the set state again.



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Connector A connector is an intermediate assignment element that stores the current RLO at aspec e a ress.

When connected in series with other elements, the "Connector" instruction is

inserted in the same way as a contact.

A connector must never:

be connected to a power rail

directly follow a branch

be used at the end of a branch.

" " .



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NOT The NOT instruction inverts the RLO.

CLR The CLEAR instruction changes the RLO to "0" (only available in STL at present!).

SET The SET instruction changes the RLO to "1" (only available in STL at present!).

SAVE The SAVE instruction saves the RLO as "BR" in a register (status word).

BR The statement A BR" can be used to recheck the saved RLO.



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MCR The Master Control Relay is a logical master switch for activating and deactivatingpower ow. n n errup e pa represen s a sequence a wr es a zero va ue nplace of a calculated value or a sequence that does not change the existing memory

value.Examples If the MCR condition is not fulfilled:

"0" is assigned via the output coils

the "Set Coil" and "Reset Coil" instructions do not change the existing value

the MOVE instruction transfers the value zero to the specified destination.

MCRA The MCRA instruction activates the Master Control Relay function.

MCR( MCR( opens an MCR area and triggers an instruction that shifts the RLO to(for STL) the MCR stack. The stack can have up to eight entries. This means that up to eight

individual control areas can be nested between the MCRA and MCRDinstructions.

)MCR The )MCR instruction marks the end of an MCR area.

MCRD The "Deactivate Master Control Relay instruction deactivates the MCR function. Nomore MCR areas can be opened until another MCRA instruction is given.



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JC The conditional jump JC is only executed if the RLO is 1. e s , e ump s no execu e , e s se o an program

execution continues with the next instruction.

JCN The conditional jump JCN is only executed if the RLO is "0".If the RLO is "1", the jump is not executed and program execution continues withthe next instruction.

Note STL provides additional jump operations, which are discussed in anotherprogramming course.



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RLO Edge An "RLO edge" is when the result of a logic operation changes.

Positive Edge When the RLO changes from 0 to 1, the "FP" check instruction results in signalstate "1" (e.g. at M 8.0) for one cycle.

To enable the system to detect the edge change, the RLO must also be saved in an

FP bit memory, or data bit (e.g. M 1.0).

Negative Edge When the RLO changes from 1 to 0, the "FN" check instruction results in signal

. . . .

To enable the system to detect the edge change, the RLO must also be saved in an

FN bit memory, or data bit (e.g. M 1.1).



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Signal Edge A "signal edge" is when a signal changes its state.

Example Input I 1.0 acts as a static Enable. Input I 1.1 is to be monitored dynamically and

every signal change is to be detected.

Positive Edge When the signal state at I 1.1 changes from 0 to 1, the "POS" check instructionresults in signal state "1" at output Q for one cycle, provided inputI 1.0 also has signal state "1" (as in the example above).

To enable the system to detect the edge change, the signal state of I 1.1 must also_ . . . .

Negative Edge When the signal state at I 1.1 changes from 1 to 0 , the "NEG" check instructionresults in signal state "1" at output Q for one cycle, provided inputI 1.0 has signal state "1" (as in the example above).

To enable the system to detect the edge change, the signal state of I 1.1 must alsobe saved in an M_BIT (bit memory or data bit) (e.g. M 1.1).



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Task Write a mode section of a program for a bottling plant to meet the followingspec ca ons:

Input I 0.0 (momentary-contact switch with NO function) switches the plant

ON.

Input I 0.1 (momentary-contact switch with NC function) switches the plantOFF.

When the plant is ON, the indicator at output Q 8.1 (Q 4.1) is lit.

When the plant is ON, the operating mode can be selected:- Manual mode is selected when I 0.4=0 and automatic mode when

. = .- The selected mode is adopted with a pulse at input I 0.5 .

The indicators for the selected mode are as follows:Manual = Q 8.2 (Q 4.2), Automatic = Q 8.3 (Q 4.3).

When the mode is changed or the plant is switched off, the mode previouslyselected must be deselected.

In manual mode, the conveyor can be jogged forwards with the momentary-contact switch I 0.2 (Q 20.5 / Q 8.5) and backwards with I 0.3

. . .

What to Do 1. Draft out the program for controlling the operating modes.Use the I/O addresses and field devices shown in the diagram.

2. Create an S7 program with the name "FILL" in the project "My Project".

3. Write the mode section of the program for the bottling plant in block FC 15.

4. Open (off-line) the OB1 and enter a call to FC15(in STL with the statement CALL FC 15).

. ave your program, own oa an es on e ra n ng un .

Result It should work.

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