a = an – 1 an-2 …. A0
b = bn – 1 bn-2 …. b0
S = Sn – 1 Sn-2 …. S0
The preprocessing stage computes◦ Carry Generate Gi = Ai . Bi
◦ Carry Propagate Pi = Ai + Bi
◦ Half Sum bits Hi = Ai XOR Bi
PARALLEL PREFIX ADDER
Pre-processing stage stage
Computation Unit
unitPrefix networkComputation unitSum bitPrefix network
8-bit 8-bit parallel-prefix structures for integer adders kogge-stone
parallel-prefix structures for integer adders kogge-stone
DESIGN OF MODULO 2n + 1 ADDER
In the design of modulo 2n + 1 adder, 3 representations are considered
1. the normal weighted one2. the diminished-13. the signed-LSB representations
MODULO 2n ± 1 ADDITION
(A + B), A + B < 2n,
(A + B + 1) mod 2n, A + B ≥ 2n.
Modulo 2n – 1 Adder
The computation condition for this operators is defined as
(A + B) mod (2n – 1) =
An arithmetic example of the new approach for the computation of the modulo 2n + 1 sum via the result of the corresponding modulo 2n – 1 addition
Efficient modulo 2n+1 adders appreciated in a variety of computers application including all RNS implementations
CONCLUSION