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Application Note 101
AN101-1
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July 2005
Minimizing Switching Regulator Residue
in Linear Regulator OutputsBanishing Those Accursed Spikes
Jim Williams
INTRODUCTION
Linear regulators are commonly employed to post-regulateswitching regulator outputs. Benefits include improvedstability, accuracy, transient response and lowered outputimpedance. Ideally, these performance gains would beaccompanied by markedly reduced switching regulatorgenerated ripple and spikes. In practice, all linear regulatorsencounter some difficulty with ripple and spikes, particu-larly as frequency rises. This effect is magnified at smallregulator VIN to VOUT differential voltages; unfortunate,because such small differentials are desirable to maintainefficiency. Figure 1 shows a conceptual linear regulatorand associated components driven from a switchingregulator output.
The input filter capacitor is intended to smooth the ripple and
spikes before they reach the regulator. The output capaci-tor maintains low output impedance at higher frequencies,improves load transient response and supplies frequencycompensation for some regulators. Ancillary purposes
include noise reduction and minimization of residual input-derived artifacts appearing at the regulators output. It isthis last categoryresidual input-derived artifactsthat is ofconcern. These high frequency components, even thoughsmall amplitude, can cause problems in noise-sensitive
video, communication and other types of circuitry. Largenumbers of capacitors and aspirin have been expended inattempts to eliminate these undesired signals and their re-sultant effects. Although they are stubborn and sometimesseemingly immune to any treatment, understanding theirorigin and nature is the key to containing them.
Switching Regulator AC Output Content
Figure 2 details switching regulator dynamic (AC) outputcontent. It consists of relatively low frequency ripple at theswitching regulators clock frequency, typically 100kHz to
3MHz, and very high frequency content spikes associ-ated with power switch transition times. The switchingregulators pulsed energy delivery creates the ripple. Filtercapacitors smooth the output, but not completely. The
IN OUT
GNDFILTER
CAPACITORFILTERCAPACITOR
PURE DCOUTPUT
LINEARREGULATOR
INPUT DC + RIPPLEAND SPIKES FROM
SWITCHING REGULATOR
AN101 F01
Figure 1. Conceptual Linear Regulator and Its Filter CapacitorsTheoretically Reject Switching Regulator Ripple and Spikes
, LTC and LT are registered trademarks of Linear Technology Corporation.All other trademarks are the property of their respective owners.
Figure 2. Switching Regulator Output Contains Relitively LowFrequency Ripple and High Frequency Spikes Derived FromRegulators Pulsed Energy Delivery and Fast Transition Times
RIPPLE: TYPICALLY 100kHz to 3MHzSWITCHING SPIKES: HARMONIC CONTENT
APPROACHING 100MHz
AN101 F02
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spikes, which often have harmonic content approaching100MHz, result from high energy, rapidly switching powerelements within the switching regulator. The filter capacitoris intended to reduce these spikes but in practice cannotentirely eliminate them. Slowing the regulators repeti-tion rate and transition times can greatly reduce rippleand spike amplitude, but magnetics size increases andefficiency falls1. The same rapid clocking and fast switch-ing that allows small magnetics size and high efficiencyresults in high frequency ripple and spikes presented tothe linear regulator.
Ripple and Spike Rejection
The regulator is better at rejecting the ripple than the verywideband spikes. Figure 3 shows rejection performance
for an LT1763 low dropout linear regulator. There is 40dbattenuation at 100KHz, rolling off to about 25db at 1MHz.The much more wideband spikes pass directly through theregulator. The output filter capacitor, intended to absorb thespikes, also has high frequency performance limitations.The regulator and filter capacitors imperfect response,due to high frequency parasitics, reveals Figure 1 to beoverly simplistic. Figure 4 restates Figure 1 and includesthe parasitic terms as well as some new components.
Figure 3. Ripple Rejection Characteristics for an LT1763 LowDropout Linear Regulator Show 40dB Attenuation at 100kHz,Rolling Off Towards 1MHz. Switching Spike Harmonic ContentApproaches 100MHz; Passes Directly From Input to Output
FREQUENCY (Hz)
RIPPLEREJECTION(dB)
80
70
60
50
40
30
20
10
010 1k 10k 1M
AN101 F03
100 100k
IL= 500mAVIN= VOUT(NOMINAL) +1V + 50mVRMSRIPPLECOUT= 10FCBYP= 0.01F
The figure considers the regulation path with emphasis onhigh frequency parasitics. It is important to identify theseparasitic terms because they allow ripple and spikes topropagate into the nominally regulated output. Additionally,understanding the parasitic elements permits a measure-ment strategy, facilitating reduction of high frequency out-put content. The regulator includes high frequency parasiticpaths, primarily capacitive, across its pass transistor andinto its reference and regulation amplifier. These termscombine with finite regulator gain-bandwidth to limit highfrequency rejection. The input and output filter capacitorsinclude parasitic inductance and resistance, degrading theireffectiveness as frequency rises. Stray layout capacitanceprovides additional unwanted feedthrough paths. Groundpotential differences, promoted by ground path resistanceand inductance, add additional error and also complicatemeasurement. Some new components, not normally as-sociated with linear regulators, also appear. These additionsinclude ferrite beads or inductors in the regulator inputand output lines. These components have their own highfrequency parasitic paths but can considerably improveoverall regulator high frequency rejection and will be ad-dressed in following text.
Note 1:Circuitry employing this approach has achieved significant harmonic content reduction atsome sacrifice in magnetics size and efficiency. See Reference 1.
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Figure4.
ConceptualLinearRegulatorShowingH
ighFrequencyRejectionParasitics.
Fin
iteGBW
andPSRRvsFrequency
LimitReg
ulator'sHighFrequencyRejection.
PassiveComponentsAttenuateRippleandSpikes,
ButParasiticsDegrade
Effectiven
ess.
LayoutCapacitanceandGroundPo
tentialDifferencesAddErrors,
Complic
ateMeasurement
FILTER
CAPACITOR
FILTER
CAPACITOR
LOAD
PARASIT
ICC
PARASITICC
PARASITIC
LANDR
PARASITIC
LANDR
LAYOUTPARASITICC
FERRITEBEAD
ORINDUC
TOR
FERRITEBEA
D
ORINDUCTOR
INPUTDC+RIPPLE
ANDSPIKESFROM
SWITCHINGREGULATOR
PARASITIC
PARASITIC
PA
RASITIC
REF
REGULATOR(FINITEGAIN-B
ANDWIDTH
ANDPSRRVSFREQUENCY)
OUTPUT
*=
GROUNDPOTENTIALDIFFERENCESPROMOTEOUTPUTHIGHFREQUENCYCONTENTANDCORR
UPTMEASUREMENT.
*
*
*
*
MONITORING
OSCILLOSCOPEAN
101F04
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Figure5
.Circu
itSimulatesSwitchingRegulatorOutpu
t.DC
,RippleAmplitude,
Frequencyand
SpikeDuration/Heightare
Independantly
Settable
.SplitPathSchemeSumsWidebandSpikeswithDCandRipple
,Prese
ntingLinearRegulatorwithSimulated
SwitchingRegulatorOutput.FunctionGeneratorSourc
esWaveformstoBothPaths
+
+
+
+
LT1763-3
IN SD
GND
BYPOUT
+
+
+
+
LT1460
2.5
V
30
0.0
1F
LOAD
FB
FB
COUT
CIN
REGULATOR
UNDERTEST
22F
1
100
100
750
750
50
50
750L
1
15V
15V
2k*
2k*
1k
1k
1k
10F
0.1F
TYP
0.0
1VP-P
TO0.1
VP-P
RAMPS
0.0
1F
100k*
5
V
5V
5V
5V
5V
5V
5V
5V
A2
LT100
6
A1
LT1210
C2,
1/2
LT1712
C1,
1/2
LT1712
HP-3
310AFUNCTIONGENERATOR
OREQUIVILENT
RIPPLEFREQUENCYAND
AMPLITUDECONTROL
LOW
AMPLITUDE
OUTPUT
RE
GULATORDC
BIASINPUT
TYP3.3
Vto3.5
V
*=
1%
METALFILM
RESISTOR
L1=
4TURNS#26,
1/4"DIAMETER
FB=
FERRITEBEAD
.FAIR-R
ITE2743002122.
INDUCTORSOPTIONAL.
SEETE
XT
=IN4148
CIN=
SEETEXT
COUT=
SEETEXT
20pF
SPIKE
AMPLITUDE
Q1
2N3866
SPIKEWIDTH
SYNC.
DIFFERENTIATOR/
SPIKEGENERATOR
SPIKEGATING/BUFFER
74AHCO4
DC/RIPPLEPATH
SPIKEPATH
AN101F05
100k*
SYNC.
OUTPUT
1.2
V
1.2
V
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Ripple/Spike Simulator
Gaining understanding of the problem requires observingregulator response to ripple and spikes under a variety ofconditions. It is desirable to be able to independently vary
ripple and spike parameters, including frequency, harmoniccontent, amplitude, duration and DC level. This is a veryversatile capability, permitting real time optimization andsensitivity analysis to various circuit variations. Althoughthere is no substitute for observing linear regulator per-formance under actual switching regulator driven condi-tions, a hardware simulator makes surprises less likely.Figure 5 provides this capability. It simulates a switchingregulators output with independantly settable DC, rippleand spike parameters.
A commercially available function generator combines with
two parallel signal paths to form the circuit. DC and rippleare transmitted on a relatively slow path while widebandspike information is processed via a fast path. The two
paths are combined at the linear regulator input. The func-tion generators settable ramp output (trace A, Figure 6)feeds the DC/ripple path made up of power amplifier A1and associated components. A1 receives the ramp inputand DC bias information and drives the regulator undertest. L1 and the 1resistor allow A1 to drive the regula-tor at ripple frequencies without instability. The widebandspike path is sourced from the function generatorspulsed sync output (trace B). This outputs edges aredifferentiated (trace C) and fed to bipolar comparator C1-C2. The comparator outputs (traces D and E) are spikessynchronized to the ramps inflection points. Spike widthis controlled by complementary DC threshold potentialsapplied to C1 and C2 with the 1k potentiometer and A2.Diode gating and the paralleled logic inverters present
trace F to the spike amplitude control. Follower Q1 sumsthe spikes with A1s DC/ripple path, forming the linearregulators input (trace G).
Figure 6. Switching Regulator Output Simulator Waveforms.Function Generator Supplies Ripple (Trace A) and Spike (TraceB) Path Information. Differentiated Spike Information's BipolarExcursion (Trace C) is Compared by C1-C2, Resulting in Trace D
and E Synchronized Spikes. Diode Gating/Inverters Present Trace Fto Spike Amplitude Control. Q1 Sums Spikes with DC-Ripple PathFrom Power Amplifier A1, Forming Linear Regulator Input (TraceG). Spike Width Set Abnormally Wide for Photographic Clarity
Figure 7. Linear Regulator Input (Trace A) and Output (TraceB) Ripple and Switching Spike Content for CIN= 1F, COUT=10F. Output Spikes, Driving 10F, Have Lower Amplitude, ButRisetime Remains Fast
A = 0.01V/DIV
B = 5V/DIV
C = 2V/DIV
D = 10V/DIV
E = 10V/DIV
F = 10V/DIV
G = 0.02V/DIVAC COUPLED-
ON 3.3VDC 500ns/DIV
A = 0.2V/DIVAC COUPLED ON 3.3VDC
B = 0.01V/DIVAC COUPLED ON 3VDC
500ns/DIV
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Linear Regulator High Frequency Rejection Evalua-tion/Optimization
The circuit described above facilitates evaluation andoptimization of linear regulator high frequency rejection.
The following photographs show results for one typicalset of conditions, but DC bias, ripple and spike charac-teristics may be varied to suit desired test parameters.Figure 7 shows Figure 5s LT1763 3V regulator responseto a 3.3V DC input with trace As ripple/spike contents,CIN= 1F and COUT= 10F. Regulator output (trace B)shows ripple attenuated by a factor of 20. Output spikessee somewhat less reduction and their harmonic contentremains high. The regulator offers no rejection at the spikerise time. The capacitors must do the job. Unfortunately,the capacitors are limited by inherent high frequency loss
terms from completely filtering the wideband spikes; traceBs remaining spike shows no risetime reduction. Increas-ing capacitor value has no benefit at these rise times.Figure 8 (same trace assignments as Figure 7) taken withCOUT= 33F, shows 5ripple reduction but little spikeamplitude attenuation.
Figure 8. Same Trace Assignments as Figure 7 with COUTIncreased to 33F. Output Ripple Decreases By 5, But SpikesRemain. Spike Risetime Appears Unchanged
Figure 9. Time and Amplitude Expansion of Figure 8s OutputTrace Permits Higher Resolution Study of Spike Characteristics.Trace Center-Screen Area Intensified for Photographic Clarity in
This and Succeeding Figures
Note 2:Dramatic is perhaps a theatrical descriptive, but certain types find drama in these things.
Note 3:See Appendix A for information on ferrite beads
Note 4: Inductors can sometimes be used in place of beads but their limitations should beunderstood. See Appendix B.
Note 5:Faithful wideband measurement at sub-millivolt levels requires special considerations.See Appendix C.
Figure 9s time and amplitude expansion of Figure 8strace B permits high resolution study of spike character-istics, allowing the following evaluation and optimization.Figure 10 shows dramatic results when a ferrite beadimmediately precedes C
IN
2. Spike amplitude drops about5. The bead presents loss at high frequency, severelylimiting spike passage3. DC and low frequency pass unat-tenuated to the regulator. Placing a second ferrite beadat the regulator output before COUTproduces Figure 11strace. The beads high frequency loss characteristic furtherreduces spike amplitude below 1mV without introducingDC resistance into the regulators output path4.
Figure 12, a higher gain version of the previous figure,measures 900V spike amplitude almost 20lower thanwithout the ferrite beads. The measurement is completed
by verifying that indicated results are not corrupted bycommon mode components or ground loops. This is doneby grounding the oscilloscope input near the measurementpoint. Ideally, no signal should appear. Figure 13 showsthis to be nearly so, indicating that Figure 12s display isrealistic5.
200ns/DIV500ns/DIV
A = 0.2V/DIVAC COUPLED ON 3.3VDC
B = 0.01V/DIVAC COUPLED ON 3VDC
0.005V/DIVAC COUPLED ON 3VDC
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Figure 12. Higher Gain Version of Previous Figure Measures900V Spike AmplitudeAlmost 20Lower Than Without FerriteBeads. Instrumentation Noise Floor Causes Trace BaselineThickening
Figure 13. Grounding Oscilloscope Input Near MeasurementPoint Verifies Figure 12s Results Are Nearly Free of CommonMode Corruption
200V/DIVAC COUPLED ON 3VDC
A = 200V/DIV
Figure 10. Adding Ferrite Bead to Regulator Input Increases HighFrequency Losses, Dramaticlly Attenuating Spikes
Figure 11. Ferrite Bead in Regulator Output Further ReducesSpike Amplitude
200ns/DIV
0.005V/DIVAC COUPLED ON 3VDC
0.005V/DIVAC COUPLED ON 3VDC
200ns/DIV
200ns/DIV
200ns/DIV
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REFERENCES
1. Williams, Jim, A Monolithic Switching Regulator with100V Output Noise, Linear Technology Corporation, Ap-plication Note 70, October 1997 (See Appendices B,C,D,H,I
and J)2. Williams, Jim, Low Noise Varactor Biasing with Switch-ing Regulators, Linear Technology Corporation, Applica-tion Note 85, August 2000 (See pp 4-6 and Appendix C)
3. Williams, Jim, Component and Measurement AdvancesEnsure 16-Bit Settling Time, Linear Technology Corpora-tion, Application Note 74, July 1998 (See Appendix G)
4. LT1763 Low Dropout Regulator Datasheet, LinearTechnology Corporation
5. Hurlock, Les, ABCs of Probes, Tektronix Inc., 1990
6. McAbel, W.E., Probe Measurements, Tektronix Inc.,
Concept Series, 1971
7. Morrison, Ralph, Noise and Other Interfering Signals,John Wiley and Sons, 1992
8. Morrison, Ralph, Grounding and Shielding Techniquesin Instrumentation, Wiley-Interscience, 1986
9. Fair-Rite Corporation, Fair-Rite Soft Ferrites, Fair-RiteCorporation, 1998
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APPENDIX A
About Ferrite Beads
A ferrite bead enclosed conductor provides the highly desir-able property of increasing impedance as frequency rises.
This effect is ideally suited to high frequency noise filter-ing of DC and low frequency signal carrying conductors.The bead is essentially lossless within a linear regulatorspassband. At higher frequencies the beads ferrite materialinteracts with the conductors magnetic field, creating theloss characteristic. Various ferrite materials and geometriesresult in different loss factors versus frequency and powerlevel. Figure A1s plot shows this. Impedance rises from0.01at DC to 50at 100MHz. As DC current, and henceconstant magnetic field bias, rises, the ferrite becomes lesseffective in offering loss. Note that beads can be stackedin series along a conductor, proportionally increasing theirloss contribution. A wide variety of bead materials andphysical configurations are available to suit requirementsin standard and custom products.
APPENDIX B
Inductors as High Frequency Filters
Inductors can sometimes be used for high frequency filter-ing instead of beads. Typically, values of 2H to10H areappropriate. Advantages include wide availability and bettereffectiveness at lower frequencies, e.g., 100kHz. FigureB1 shows disadvantages are increased DC resistance inthe regulator path due to copper losses, parasitic shuntcapacitance and potential susceptibility to stray switch-ing regulator radiation. The copper loss appears at DC,reducing efficiency; parasitic shunt capacitance allows
FREQUENCY (MHz)
10
IMPEDENCE() 40
50
60
10 100 1000
AN101 FA1
30
20
10
DC = 0.01
0A
0.1A
0.2A
0.5A
Figure A1. Impedance vs. Frequency at Various DC Bias Currentsfor a Surface Mounted Ferrite Bead (Fair-Rite 2518065007Y6).Impedance is Essentially Zero at DC and Low Frequency, RisingAbove 50Depending on Frequency and DC Current. Source:Fair-Rite 2518065007Y6 Datasheet.
unwanted high frequency feedthrough. The inductorscircuit board position may allow stray magnetic fields toimpinge its winding, effectively turning it into a transformer
secondary. The resulting observed spike and ripple relatedartifacts masquerade as conducted components, degrad-ing performance.
Figure B2 shows a form of inductance based filter con-structed from PC board trace. Such extended length traces,formed in spiral or serpentine patterns, look inductive athigh frequency. They can be surprisingly effective in somecircumstances, although introducing much less loss perunit area than ferrite beads.
Figure B1. Some Parasitic Terms of an Inductor. ParasiticResistance Drops Voltage, Degrading Efficiency. UnwantedCapacitance Permits High Frequency Feedthrough. StrayMagnetic Field Induces Erroneous Inductor Current
Figure B2. Spiral and Serpentine PC Patterns are SometimesUsed as High Frequency Filters, Although Less Effective ThanFerrite Beads
USERTERMINAL
USERTERMINAL
PARASITIC
CAPACITANCE
PARASITICRESISTANCE
PARASITICRESISTANCE
STRAYMAGNETIC
FIELD
AN101 FB1
TERMINAL ACCESSABLE WITH PC VIA.
AN101 FB2
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APPENDIX C
Probing Technique for Sub-Millivolt, Wideband SignalIntegrity
Obtaining reliable, wideband, sub-millivolt measurementsrequires attention to critical issues before measuringanything. A circuit board layout designed for low noiseis essential. Consider current flow and interactions inpower distribution, ground lines and planes. Examine theeffects of component choice and placement. Plan radiationmanagement and disposition of load return currents. If thecircuit is sound, the board layout proper and appropriatecomponents used, then, and only then, may meaningfulmeasurement proceed.
The most carefully prepared breadboard cannot fulfill its
mission if signal connections introduce distortion. Con-nections to the circuit are crucial for accurate informationextraction. Low level, wideband measurements demandcare in routing signals to test instrumentation. Issues toconsider include ground loops between pieces of testequipment (including the power supply) connected to thebreadboard and noise pickup due to excessive test leador trace length. Minimize the number of connections tothe circuit board and keep leads short. Wideband signalsto or from the breadboard must be routed in a coaxialenvironment with attention to where the coaxial shields
tie into the ground system. A strictly maintained coaxialenvironment is particularly critical for reliable measure-ments and is treated here1.
Figure C1 shows a believable presentation of a typical
switching regulator spike measured within a continuouscoaxial signal path. The spikes main body is reasonablywell defined and disturbances after it are contained. Fig-ure C2 depicts the same event with a 3 inch ground lead
connecting the coaxial shield to the circuit board groundplane. Pronounced signal distortion and ringing occur.The photographs were taken at 0.01V/division sensitiv-ity. More sensitive measurement requires proportionatelymore care.
Figure C3 details use of a wideband 40dB gain pre-amplifierpermitting text Figure 12s 200V/division measurement.Note the purely coaxial path, including the AC couplingcapacitor, from the regulator, through the pre-amplifierand to the oscilloscope. The coaxial coupling capacitorsshield is directly connected to the regulator boards ground
plane with the capacitor center conductor going to theregulator output. There are no non-coaxial measurementconnections. Figure C4, repeating text Figure 12, showsa cleanly detailed rendition of the 900V output spikes. InFigure C5 two inches of ground lead has been deliberatelyintroduced at the measurement site, violating the coaxialregime. The result is complete corruption of the waveformpresentation. As a final test to verify measurement integrity,it is useful to repeat Figure C4s measurement with thesignal path input (e.g., the coaxial coupling capacitorscenter conductor) grounded near the measurement point
as in text Figure 13. Ideally, no signal should appear.Practically, some smallresidue, primarily due to commonmode effects, is permissible.
Figure C1. Spike Measured Within Continuous Coaxial SignalPath Displays Moderate Disturbance and Ringing After MainEvent
200ns/DIV
0.01V/DIVAC COUPLED ON 3VDC
Figure C2. Introducing 3" Non-Coaxial Ground ConnectionCauses Pronounced Signal Distortion and Post-Event Ringing
200ns/DIV
0.01V/DIVAC COUPLED ON 3VDC
Note 1:More extensive treatment of these and related issues appears in the appended sections ofReferences 1 and 2. Board layout considerations for low level, wideband signal integrity appearin Appendix G of Reference 3.
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Figure C3. Wideband, Low Noise Pre-Amplifier Permits Sub-Millivolt Spike Observation.Coaxial Connections Must be Maintained to Preserve Measurement Integrity
Figure C4. Low Noise Pre-Amplifier and Strictly Enforced CoaxialSignal Path Yield Text Figure 12's 900mVP-PPresentation. TraceBaseline Thickening Represents Pre-Amplifier Noise Floor
Figure C5. 2 Inch Non-Coaxial Ground Connection atMeasurement Site Completely Corrupts Waveform Presentation
200ns/DIV
200V/DIVAC COUPLED ON 3VDC
200ns/DIV
200V/DIVAC COUPLED ON 3VDC
BNCCABLE
AN101 FC3
BNC CABLEAND
CONNECTORS
LOAD(AS DESIRED)
HP461AAMPLIFIER 40dB
ZIN= 50
VOUT
VIN
COUPLINGCAPACITORHP-10240B
50TERMINATORHP-11048C OREQUIVALENT
OSCILLOSCOPE0.01V/DIV VERTICAL SENSITIVITY
100V/DIV REFERRED TO AMPLIFIER INPUT
REGULATORUNDER TEST
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Application Note 101
AN101 12Linear Technology Corporation1630 M C th Bl d Mil it CA 95035 7417
LT/TP 0705 500 PRINTED IN USA
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