Data Center Joe Wang Sr. Application Engineer 雲端資料中 · PDF fileCreating a complete test solution in a small and cost effective system The ... •Quantitative number estimating

Design and Test Challenges of 100G/400G Data Center雲端資料中心之100G/400G設計與測試挑戰Simplified time-efficient testing for next-generation computer, consumer and communication devices.2016/12/20

Joe Wang

Sr. Application Engineer

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Agenda

─ Update about Output /Input Testing for 100G

─ Moving to 400GbE

• New test challenges

─ M8040A – 64GBaud Pattern Generator / Error Analyzer

• Generator capabilities and performance

• Analyzer capabilities

• User interface

• Access on-chip error detectors from M8070A software

─ PAM-4 Measurements using a Sampling Scope

─ PAM-4 Measurements using a Real Time Oscilloscope

─ AWGs as pattern generator for multi-level signals

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Target High-Speed Digital Applications

Data center build-out towards 400GbE drives new designs & test demand:

PAM-4 and NRZ coexist

28/56 Gbit/s NRZ, 28/56 GBaud PAM-4

Electrical and optical interconnects

4-16 lanes, new working groups for less lanes (25GbE, 50GbE, 200GbE)

800GbE

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New: 200/ 50 Gb/s

25 Gb/sLane rates: 25 or 56Gb/s

Ethernet Evolution

Speed classes and their enablers

100 Gb/s

Enabled by:

25/28 Gb/s NRZ

Development

Start 2010

Deployment

Start 2015

Lane rate: 25 Gb/s

Development

Start 2014

Deployment

Start 2018

400 Gb/s

Enabled by:

56 G NRZ

28/56 Gbaud PAM-4

Lane rate: 56 Gb/s

1 Tb/s

Enabled by: ??

(28 Gbaud PAM-8,

16-QAM, DMT or ??)

Development

Start 2018

Deployment

Start 2022-3?

Lane rate: 100+ Gb/s

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100G standards

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100G Transmitter Challenges and How to AddressMultiple Lanes

• Choose multi-channel measurement

equipment or use high quality

switching solutions

Shrinking Margins

• Lowest intrinsic jitter

• Highest Sensitivity

Eye Width and Height• Optimize for best CTLE peaking

• Use test applications to greatly speed

testing

Clock Recovery Needs• Choose appropriate loop order and

bandwidth

• Optimize CR using HW and SW

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Broadcom 4x25 Transceiver Demonstration at Data Center Forum

N1092A

100m MMF

We successfully support Boardcom for Demonstration on DCF in

Beijing in Apr. with our N1092A. The customer give us very good

feedback of the new N1092A platform.

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Creating a complete test solution in a small and cost effective system

The 86100/86105C

system can be

replaced by the

N1090A (1 to 10G)

The 86100 86105D-

281 and Precision

Timebase can be

replaced by the

N1092 (20 to 28G)

• The result is a highly accurate, low cost, small form factor, complete

test solution designed specifically for high volume manufacturing of

optical components and systems

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Reducing cost through testing devices in parallel• The N1092 can be configured with 1, 2 or 4 optical channels in one small

instrument

• Full transmitter tests can be performed on all channels in parallel with no

reduction in test times

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TDEC: Transmitter and Dispersion Eye Closure

• Developed in IEEE 802.3bm

• 100 Gb/s over multimode fiber using four lanes at 25 Gb/s

• System employs forward error correction

• Hardware BER on the order of 1e-5

• TDEC provides a system level assessment of transmitter performance similar to

historic TDP type tests

• Achieved through a direct measurement of the transmitter eye diagram

• Simpler, faster, and less expensive than TDP

• Does not require a reference transmitter, receiver, and BERT

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Dispersion Challenges in Optical and Electrical Domains

Race conditions

cause pulse overlap

Optical Channels

Electrical Channels

100 Differential

TX

RX

E/O

O/E

Transceiver

Transmission LinesASIC

Multimode Fiber

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Transmitted Dispersion Penalty (TDP)• Quantitative number estimating relative eye closure in receiver

Reference: ideal transmitter, ideal channel, receiver limited by Gaussian

noise

Penalty: SNR degradation due to TX waveform distortion, channel dispersion

Pioneered by ClariPhy Communications, Inc.* for IEEE 802.3aq

• 8G Fibre Channel and IEEE 802.3ax (and likely other standards as well) to

adopt concept

* MATLAB® scripts for TWDP calculations may contain intellectual property owned by ClariPhy Communications, Inc.

RX Noise

TDP

Maximum

Channel Loss

TX Power

RX Noise

Maximum

Channel Loss

SNR RN

TX Power

Syste

m P

ow

er

Budget

SNR effective SNR RN

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TDEC measurement process

• DCA placed in Eye/mask mode

• TDEC requires histogram

accumulation on the one and zero

levels at the 40% and 60% bit interval

positions

• To achieve a very fast measurement,

data acquisition is optimized to

acquire more samples in the four key

measurement regions

• Measurement performed in a few

seconds

• Reported as a penalty in dB

(smaller penalty is better)

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100G Receiver Challenges and How to AddressLinear E/O conversion

• Industry only Instrument level Linear

E/O Module with external TLS which

support 100GBASE LR4 and ER4

Shrinking Margins• All-in one BERT with Built in calibrated

jitter sources and interference for DM

and CM source

• Integrated 8 tap De-Emphasis to de-

embed cabling to Compliance Test

Board

Total Solution• Industry only Total Solution for Optical

Stress Sensitivity testing

Full Automated Calibration• Guarantee J2/J9/VECP and ER

requirement according to Standard

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100GBASE-LR4 Optical RX Test

Source: RX Test Setup

from IEEE 100GBASE-LR4

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J2/J9 and VECP definition

J9

2

J9 = time interval between points at BER = 2.5E-10

J2 = time interval between points at BER = 2.5E-3

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100GBASE-LR4/ER4 stressed eye test setup

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Agenda







• User interface





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Why does the industry need PAM-4?

• Its about options…

• NRZ > 28 GB/s means shorter

traces or costlier channels

• PAM-4 Slows the “baud” rate, for

a given “symbol” rate

• 2 bits/symbol (PAM4) versus

1 bit/symbol (NRZ)

• Allows vendor to design products

to fit cost structure of their

ecosystem.

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400G Ecosystem

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Overview of IEEE 802.3bs /D1.4

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Where is PAM-4 being used

• 400G Ethernet: IEEE 802.3bs

• 400GBASE-SR16 - 16 lanes of 25Gb/s NRZ in MMF

• 400GBASE-FR8/LR8 - 8 lanes of 56Gb/s PAM-4 in SMF

• 400GBASE-DR4 - 4 lanes of 112 Gb/s PAM-4 in SMF

• CDAUI-8 – 8 lane 50 Gb/s electrical Chip to Chip (C2C) and

Chip to Module (C2M) Attachment Unit Interface

• OIF CEI-56G

• CEI-56G-XSR-PAM4 (Extremely Short Reach) C2 nearby C

• CEI-56G-VSR-PAM4 (Very Short Reach) C2M

• CEI-56G-MR-PAM4 (Medium Reach) C2 distant C, cables

• CEI-56G-LR-PAM4 (Long Reach) backplanes and cables

• Fibre Channel 64GFC / 256GFC

• PI-7 and MSQS-3 – several fibre reaches (MMF & SMF) and C2M

• Infiniband – 600G HDR using 50G lane rate

Standards and Implementation Agreements under development:

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OIF CEI-56G defines Electrical Interfaces

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What Interfaces have to be tested?Electrical and optical I/Os on ASICs, Modules, Boards

Example of a typical implementation: 400GBASE-FR8 Optical Link

Both IEEE and OIF-CEI are used

Switch Card Backplane Line Card

200G Module

RetimerTOSA

ROSA

400G Module

RetimerTOSA

ROSA

Host

ASICRetimer

4

n

8

Retimern n

Switch

ASIC

400GBASE-FR8

SMF using WDM

CDAUI-8

8 x 56 Gb/s PAM-4

CEI-56G-MR

PAM-4 or NRZ

CEI-56G-LR

PAM-4 or eNRZCEI-56G-VSR

PAM-4 or NRZ

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What is the DUT and what has to be tested?

Example shows IEEE 802.3bs 400GBASE-FR8/-LR8 module

Source: Semtech paper @ ECOC 2015

Pattern generator DCA for TX test

? ? ?

Output

Loopback

for input test

PG with

E/O+attenuator

ED ( BERT or

Oscilloscope)Input

TX (output) test requires:

PG: clean signal, static

Analyzer: transition time, eye mask,

Jitter, compliant CDR

RX (input) test requires:

PG: clean and stressed pattern, adjustable and

calibrated stress without PG to stop

Analyzer: loopback, BER, jitter tolerance, input

sensitivity, CDR with sufficient loop BW. Often also

Built-in error counters. FEC? (striped across n lanes)

BERT ED for RX test

?

400GbE Optical Transceiver Module Example

Input InputInput

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400 GbEn Multimode

“The optical characteristics of each lane of a 400GBASE-SR16 transmitter shall

be the same as those of a single lane of 100GBASE-SR4, as specified in Table

95–6 and 95.7.1, with the exception that the signaling rate, each lane is 26.5625

Gbd ± 100 ppm, and the BER requirement is as specified in 121.1.1”

Specifications from IEEE 802.3bs: 16 lanes 25 Gbaud NRZ

• Test process similar to

earlier Ethernet standards

• New TDEC measurement

replaces TDP

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400G single-mode requires testing PAM4 optical signals

• 26.65 Gbaud

• PAM4

• Power levels similar to 100GbEn

(slightly higher OMA)

• Extinction ratio measurement method

undefined

• Likely based on outer (0 and 3)

levels

• Eye mask undefined

• Optical scope bandwidth undefined

400Gbase-LR8/FR8: 8 lanes 26 Gbaud

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400Gbase-DR4

• 53.125 Gbaud

• PAM4

• Power levels similar to 8x25

Gbaud (slightly lower OMA

max)

• Slightly higher extinction ratio

(measurement method

undefined)

• Eye mask undefined

• Optical scope bandwidth

undefined

Specifications from IEEE 802.3bs: 4 lanes 53 Gbaud

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Outer Optical Modulation Amplitude (OMAouter)

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Evaluation for Transmitter DispersionThe Key measurement used to verify optical performance

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Relative Intensity Noise (RINxOMA )

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Test Challenge: Stressed Input Test for Host & ModuleExample: Draft OIF CEI 4.0 56G-VSR (Nov 2015)

Challenges:

‒ Compensate loss TP4a

‒ Emulate TX de-emphasis

‒ PRBS31 for NRZ

‒ QPRBS13 or ? for PAM-4

How to inject simultaneously

and calibrate mix of

‒ What is UBHPJ? (BUJ)

‒ What is UUGJ? (RJ)

‒ SJ is multi-UI LF SJ and

HF SJ up to 200MHz

Generally: CEI 4.0 56G draft specs keep changing till finally released!

Note: the validity

of emulating the

effect of the

DUT‘s counter

opposing output

during test via

TCB is

questionable (the

coupling is not

defined)!

Challenges:

How to emulate

x-talk?

‒ Fast tr

‒ Asynchronous

or

synchronous

with phase

control?

ISI channel (channel loss

depends on distance)

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The ISI channel emulates the frequency

dependent loss of a backplane channel.

Test Challenge: Receiver Interference Tolerance COM Method referenced by OIF CEI-56G-LR/MR-PAM4 (draft)

Challenge: the transmitter output, as measured

at TP0a, meets all transmitter specifications:

• Pre- and post- cursor peaking ratio

as of CEI-56G-LR-PAM4

The Channel Operating Margin (COM) is a figure of merit for a channel derived from a measurement of its

scattering parameters. COM is related to the ratio of a calculated signal amplitude to a calculated noise amplitude =

20log10(As/Ani). Source: IEEE 802.3bj™-2014, Annex 93A

The channel noise

source emulates

crosstalk and non-

equalize-able signal

distortions introduced

by a channel.

It is Gaussian with a

crest factor of at least

4.

Challenge:

Differential

adders cause

loss +skew

+reflections.

Challenge: get all data needed for MATLAB

COM model input file to calculate desired eye

height correctly.

0.1- 0.5

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Test Challenge: PAM-4 Linearity Test New method referenced by OIF CEI-56G-PAM-4(draft)

PAM-4 eyes can show a level

separation mismatch:

Test challenge: the CEI standard defines a new input test for PAM-4:

ability to tolerate level non-linearities, current draft proposes eye

amplitudes of up to 0.67 AMax.

But when using a 2 channel pattern generator with PAM-4 combiner, the

resulting levels cannot not be varied individually. What to do?

0.67 AMax

A Max

Source: OIF-CEI- October 2015 contribution oif2015.453.00

Generally: CEI 4.0 56G draft specs keep changing till finally released!

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Generating linearity stressed PAM-4 pattern

• Three choices for generating stressed PAM-4 patterns

• 2 channel NRZ BERT can easily emulate DAC weight error stress, but

compression is more difficult

• Integrated PAM-4 BERT or AWG can do both easily

Arbitrary Waveform Generator

+

2 Channel BERT with analog combiner

6 dB Integrated PAM-4 BERT

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Agenda







• User interface





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M8040A 64 GBaud High-performance BERT

PAM-4 and NRZ

1-2 ch PG and ED

Key capabilities:

- Highly integrated BERT, AXIe based

- Accurate physical layer characterization and

compliance test of next generation digital high-

speed I/Os with NRZ and PAM-4 data formats

- Control via M8070A system software for M8000

Pattern Generator (M8045A)

‒ Single or dual 32/64 GBaud NRZ/PAM-4

‒ Built-in de-emphasis

‒ Clean and jittered data patterns and clocks

‒ Remote head for close connection to DUT

‒ NRZ and PAM-4 is switchable by software

Error Detector (M8046A)

‒ 32/64* GBaud error detector for PAM-4 and NRZ

‒ Equalizer* and clock recovery* (*= second release)

Where used:

- 400GbE, 200GbE, CEI-56G

- Input (RX) characterization and

compliance test

- For PAM-4 and NRZ signals up to 64

GBaud

Loopback to

ED PAM-4

and NRZ

DUT

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M8045A 64 GBaud NRZ/PAM-4 PPG Module

60 GBd PAM-4 Key features pattern generator:

− 1 or 2 channels per module with synthesizer (M8045A, 3U)

− Up to 32/64 Gbaud data rate for each channel

− PAM-4/NRZ format selection by user interface

− Built-in de-emphasis 3 taps

− Built-in calibrated jitter injection: RJ, SJ (multi-tone), even-

odd, BUJ, SSC

− Level non-linearity for PAM-4

− Remote head to get close to the DUT (M8057A)

− Output amplitude 1.8/1.2 Vpp differential @ <32/<56GBd

− Fast transition times 9 ps (20/80%)

− Low intrinsic RJ <150 fs rms (@ 64 Gb/s NRZ)

Input (RX)

under test2

PAM-4 or NRZ

Remote head

Preliminary

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Performance at 29 GBaud PAM-4

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Performance at 58 Gbit/s NRZ

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Performance at 58 GBaud PAM-4

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M8046A 64 GBaud NRZ/PAM-4 Analyzer Module

Key features analyzer:

− 1 analyzer channel per module (M8046A, 1U)

− Symbol rates:

− 2 to 32 Gb/s NRZ and 32 GBaud PAM-4

− 2 to 64 Gb/s NRZ and 64 GBaud PAM-4*

− Detects NRZ and PAM-4 signals without power splitters

− True real-time symbol error rate for PAM-4 without post-processing

− Full sampling even for long PRBS and low BERs, e.g.10-15

− Jitter tolerance measurements

*64 Gbaud version come in a second release

Input (RX)

under test

2

PAM-4 or

NRZ Remote head

Loopback to EDPAM-4 or NRZ

2

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True PAM-4 Error Analysis in Real-time

Prove even low BER and SER Floors with the required Confidence

Data In

Detecting 1 0

Threshold Vupp = 3 = 0 or 1 or 2?

Threshold Vmid = 2 or 3? = 0 or 1?

Threshold Vlow = 1 or 2 or 3? = 0

3

0

1

2

PAM-4 Vupp Vmid Vlow Gray

3 1 1 1 1 0

2 0 1 1 1 1

1 0 0 1 0 1

0 0 0 0 0 0

Only a true PAM-4 error analyzer can provide a PAM-4 symbol error rate in real-time without post-processing. Error ratios down to 10-15 or error-free can be measured even for long PRBS 2 31-1 or QPRBS-13 patterns. Errored 0,1,2,3 symbols can be counted seperately for further debugging.

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Alternative Error Analysis Methods

On-chip error counters:

‒ On chip ED can be used for

integrated measurements, such as

JTOL

‒ M8070A-1TP/-1NP are available as

transportable and as network

license

‒ Python-script based interface into

M8070A software

Access via M8070A Software

Realtime Scope based error

counters:

– For BERs 10-5, 10-6, 10-7

– Unfold into waveform upon error

– Trigger on burst error

– Cumulative and „per acquisition“

– Access into M8070A planned

DUT

error

counter

Python

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Agenda







• User interface





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DCA PAM4 eye diagram analysis (86100D-9FP)

Some similar to NRZ, others unique to multi-level signals

• Report mean voltage (or power) of each level

• defined by setup

• Report “Thickness” of each level at location defined by “Time of Level”

in Setup… (Eye Center or Minimum RMS)

• Report skew of each level at location defined by “Time of Level”

in Setup… (Eye Center or Minimum RMS)

• If configured for “Eye Center” of “Center Eye”, all skew = 0.

• Report mid-point of each EYE level as defined by settings

in Setup…

• Report skew of each EYE level as defined by settings

in Setup…

• If based on Max EH of Center Eye, skew of center eye = 0

(this is the reference for the other eyes)

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86100D-9FP PAM-4 Analysis SoftwareTDECQ, OMA and ER all available from the TDECQ process

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Waveform at transmitter output

Waveform at equalizer output

Extinction ratio and

OMA are derived from

the 0 and 3 levels of

the transmitter output

• Specific bit

sequences are

used

TDECQ derived from

the equalized

waveform

• Uses OMA from

the unequalized

waveform (may

change to

equalized

waveform)

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DCA and DCA-M family

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NEW! N1076A / N1077A 32 GBd Clock RecoveryBenefits

• Compact, flexible design

o 16 Baud or 32 GBaud versions (upgradeable)

o Works with both NRZ and PAM4 signals

o Integrated design for both single-mode and

multimode optical applications

(CR, O/E, and optical splitters #SMS, all in one box)

o Small form factor (DCA-M),

use with any DCA modules or BERTs

Target Applications

• 100G Ethernet (802.3bm), 200G/400G Ethernet (P802.3bs)

• OIF-CEI-3.1 25/28 Gb/s NRZ, OIF-CEI-4.0 56G-PAM4 (28 GBd)

• 25 GBd PAM4 Elec, SM, MM

N1076A Electrical CR

N1077A-SMS Opt/Elec CR

(with integrated splitter/coupler)

N1077A-SXT Opt/Elec CR

(user supplied optical splitter)

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• More margin for your devices

o High sensitivity Optical/Elec CR

(amplified O/E means more signal can be sent to the

measurement module -> higher eye/mask margins)

o More accurate (and lower) jitter measurements

using Option JSA’s Clock Recovery Emulation (CRE)

(compensates for non-ideal HW CR response)

S800 Training

Nov 2016

Keysight Confidential

Page

The First 32G PAM4 CDR Ever !

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Agenda







• User interface





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RN = 800 uV, Eye Height = 172.8 mVKeysight 86108B 50 GHz BW, RN = 800 uV typical

PAM-4 Measurement Challenges

Clock Recovery (CR) – used to track out low-frequency jitter, trigger the scope

• Real-time oscilloscopes use software CR

• Transition level qualified SW CDR will include 0-3/3-0 and

1-2/2-1 level transitions.

• Sampling oscilloscopes use hardware CR

• Existing Keysight HW clock recovery

designs work on PAM-4 signals

Noise

• Noise will reduce eye opening and degrade system BER

• Random Noise (RN) from DUT TX will Root Sum Square

(RSS) add to intrinsic RN from the scope\

• Slower edge speeds (slew rate, S) exacerbate the issue

due to AM-to-PM conversion

• Sampling oscilloscopes offer the lowest noise solution

for a given bandwidth (often 5-10x lower than a real-time scope that has equivalent BW)

RN = 8 mV, Eye Height = 133.8 mV

Eye diagram using 50 GHz Oscilloscope with 8

mV rms noise.

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PAM-4 Analysis using the Keysight InfiniiumInfiniium PAM-4 Software Tool provides Eye and Level based measurements

PAM-4 real-time eye measurements:

• Eye width, eye height, eye skew (relative) for each PAM-4 eye

• Level mean, RMS, and “thickness” for each level

PAM-4 Waveform measurements:

• Level mean, RMS, and “thickness” for each level

• Data TIE for each threshold

• Rise/Fall times for each of 6 PAM-4 transition types

• Support for CTLE, FFE, and DFE Equalization

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Forward Error CorrectionTypes of Errors

– Single-symbol error

– Burst errors

2 0 3 3 2 3 0 22 0 3 3 1 3 0 2

1 changed to 2

Sent Received

Length of burst error

(8 symbols)

2 0 3 3 1 3 0 22 0 3 3 1 3 0 2

2 0 2 3 1 3 0 22 0 3 2 2 3 0 1

Sent

Corrupted symbols

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Bit Error Ratio Measurements (BER)

BER Cumulative

measures BER

over many

acquisitions

BER Per Acquisition

measures BER from

one acquisition to the

next.

Automatically

determines

pattern length

Identifies

Burst Errors in

Captured

Waveforms

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Setting up a BER Test on a Real Time Scope

Setting up a

Limit test

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Locating BER Flagged ErrorsReal Time Scopes allow you to unfold an eye upon error

Navigate easily to

the occurrence of

each symbol error

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Annex 120D: CAUI-8 Chip-to-Chip

Annex 120E: CDAUI-8 Chip-to-Module

Example: IEEE P802.3bsCDAUI-8 is a 26.5625 GBd by 8 lane PAM4

physical instantiation of the 400 Gb/s connection.

The Challenge – most parameters must be analyzed using new methodology/algorithms designed for PAM-4

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New PAM-4 Measurement Application“Pre-Compliance” SW Apps for emerging Standards using PAM-4

• N1085A PAM-4 Measurement App

for Ethernet and OIF-CEI (for the 86100D DCA-X)

• N8836A PAM-4 Measurement App

for Ethernet and OIF-CEI (for Infiniium real-time scopes)

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Agenda







• User interface





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M8195A 65 GSa/s Arbitrary Waveform GeneratorMaximum Channel Density for PAM-x Signal Generation

‒ Sample rate 54 GSa/s to 65 GSa/s per

channel

‒ 25 GHz bandwidth

‒ 8 bit vertical resolution

‒ Amplitude up to 2 Vpp (diff)

‒ Voltage window – 1.0 ... +3.3V

‒ RJrms < 200 fs @ 32 Gb/s PRBS 211 – 1)

‒ Up to 16 GSa memory per module

‒ Synchronization up to 16 channel with

M8197A

‒ 16-tap FIR filter in hardware for frequency

response compensation

‒ Software integration M8070A software

M8195A with up to

4 channels per 1-slot AXIe module

Go where you have never been able to test before

‒ with real-time mode,

‒ sequencing and

‒ deep memory

Explore your possibilities

32 Gb/s

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M8196A AWG - Because high-speed matters

‒ Sample rate up to 92 GSa/s per channel

‒ 32 GHz bandwidth

‒ Up to 4 synchronized channels

simultaneously

‒ 8 bit vertical resolution

‒ Amplitude up to 2 Vpp (diff)

‒ Voltage window – 1.0 ... +2.5V

‒ Rise and fall times below 9 ps (20/80)

‒ 512 kSa memory per channel

(219 or 4x oversampling -> PRBS 215-1 )

‒ Random jitter is correlated, jitter mod.

frequency minimum 250 kHz

M8196A with up to

4 channels per 1-slot AXIe module

56 GBd PAM-4

w/ skewed eyes

25GBd

Best fit as generator for characterizing

analog optical components,

emualting skewed eyes,

PAM-8, and complex modulation

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M8196A Performance56 GBaud PAM4 = 112 Gb/s, 4 lanes PAM4 = 448Gb/s

Arbitrary Waveform Generator

4 Channels PAM4

within one slot

1 2 3 4

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PAM-4 Input Testing using M8040A with M8196A

M8040A 64 GBaud BERT provides:

‒ Highly integrated for simplified test setup

‒ Built-in 3 tap de-emphasis

‒ Emulate jitter, calibrated and built-in

‒ Emulate aggressor w/ fast tr on 2nd cha

‒ Level non-linearity test

‒ True PAM-4 error detector

‒ Low bit/symbol ratios, long PRBS/sequences

‒ Automated jitter tolerance tests

‒ PAM-4 and NRZ switchable

‒ Scableable/upgradeable via options: 32/64 GBaud

Input

(RX)

under

test

Loopback to ED PAM-4 and NRZ

diffPAM-4 or NRZ

Remote

head

M8196A complements input test setup

when used as:

‒ Random/ sinusoidal interference source

with directional couplers

‒ Aggressor channel

‒ PAM-4 generator to emulate horizontally

skewed eyes

‒ Economic PAM-4 generator

+

Option to use AWG for RI/SI source, aggressor eye-skew

RI/SI

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Standards using PAM-4 are evolving

• Standards working group members are contributing simulations and

measurement results for test chips

• Many changes beyond early work from 802.3bj clause 94:

• New test patterns give “appropriate” levels of stress

• Many new specifications for eye measurements

• Longer reach CEI-56G are adding second pre-cursor on Tx

• Linearity added to stress mix in CEI-56G

• ....

• Standards and IAs are continue to evolve - weekly!

• Check the latest draft versions from the working groups

• Keysight actively participates in these working groups

CEI linearity stress defined – center eye is largest

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Summary

• Transition from NRZ to PAM-4 is revolutionary

• Many new challenges in both electrical and optical links

• Required Output (Tx) measurements and Input (Rx) stress types will

change

• New eye measurements for PAM-4 Output tests

• Linearity added to stressed Input testing

• New tools are needed for characterizing and troubleshooting links

using FEC

• Scope, CDR and Software are ready for your PAM4 design

• Learn more on the web at: www.keysightcom/find/pam4

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One more thing …

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400G Soluiton 1: Pulse Amplitude Modulation

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400G solution 2: QAM (quadrature amplitude modulation)

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400G Solution 3: DMT (Discrete Multi Tone)

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SolutionsOptical Modulation Analyzers (OMA)

N4391AIn high-speed, long-haul communication (100G)

Move from Amplitude -> Phase Modulation:

-QPSK

-QAM etc…

An OMA is the tool to analyze these new

modulation formats.

N4392A

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Thank you!

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Data Center Joe Wang Sr. Application Engineer 雲端資料中 · PDF fileCreating a complete test solution in a small and cost effective system The ... •Quantitative number estimating