Design of Packet-Fair Queuing Schedulers

Using a RAM-Based Searching EngineIEEE JSAC, Vol.17, No 6, June 1999

H. Jonathan Chao 외

이 융yiyung@mmlab.snu.ac.kr

Contents

• PFQ• 기존 연구 및 일반적인 구현 기법• General Shaper-Scheduler

– Slotted Updates– Implementation Architecture– Time-Stamp Aging Problem

• Conclusion

PFQ(Packet Fair Queuing)

• PFQ 알고리즘의 전개 방향– GPS(General Processor Sharing)– WFQ(PGPS)

• GPS 보다 Lmax 이상 뒤쳐지지 않는다 .

– SCFQ, STFQ : Implementation Cost 의 decrease– WF2Q : WFQ 의 단점 보완 .

• GPS 에 가장 가까운 모델 . • WFI Metric 이용• S(t) < = V(t) check• GPS 보다 WF2Q 는 한 패킷 이상 앞서지 않는다는 점까지 추가

– WF2Q+ • WF2Q 의 Implementation Cost 의 decrease• 본 논문의 주요 고려 대상

Time Computation(1/2)

1( ) max{ ( ), ( )}i iS t V t F t

( ) ( )ki

i ii

LF t S t

0)0( V

1 1( ) ( )

j

j ji

i B

CV t V t

Virtual Start Time

Virtual Finish Time

Virtual Time Implementation of PGPS

Where ,...3,2,1 jtt jj

jB : interval( ) 에 busy 인 session 집합

1 jj tt

i : weight for session i

Time Computation(2/2)

• WF2Q+

• WF2Q– emulates the progress of GPS system

• WF2Q+– be computed directly from the packet system

( )( ) max{ ( ) ( , ), min{ ( )}}i

i B tV t V t W t t S t

Packet Scheduler

CPUPacket

Search Engine

Packet in Packet out

Address Write/read

Data Memory

Packet Scheduler

Packets

Packetheader

Packets

Packet Scheduler

• PFQ• 기존 연구 및 일반적인 구현 기법• General Shaper-Scheduler

– Slotted Updates– Implementation Architecture– Time-Stamp Aging Problem

• Conclusion

Existing Implementation Researches• PFQ’s Implementation depends on

– system virtual time computation– relative ordering via finish time in a priority queue

• Efficient hardware-based priority queue– binary tree of comparators– sequencer chip(ASIC)

• Search-Based version– This paper– new ASIC(PCAM : priority content addressable memory)

• Author– off-chip memory, hierarchical searching– RSE(RAM-based Search Engine)– commercial memory and FPGA chips

Conceptual Framework(1/2)

• W = max {start time}• N : Total number of sessions in the system

StartTime

V(t)

A B

Conceptual Framework(2/2)

Logical queue per session

• Head-pointer memory : 각 Queue 의 Header pointer 저장• Tail-pointer memory : 각 Queue 의 Tail pointer 저장• Idle queue : Data memory 의 Idle space 유지

Design Issue-I(1/3)

• Scheduler Queue– Search-based approach Vs. Sorting-based

approach

Data Structure Implementation of a scheduler queue using the RSE

Design Issue-I(2/3)

• Hierarchical searching with a tree structure– Data structure : Tree of priority encoders & decoders

0 0

0 1

0 0 1 1

0 0 0 1 1 00 1 2 3 4 5 6 7

1 0 1 5

Design Issue-I(3/3)• Output of the m-bit time stamp F in hierarchical

searching(L=3)

1

0

1

5

1

0 1

Design Issue-II

• Shaper Queue– Eligibility Test : S(t) <= V(t)– V(t)-> col addr and compare– move eligible packets to scheduler queue

F

S

V(t)

Time-stamp Overflow Control

• Time-stamp overflow– Maximum value of F : M-1

• maximum packet length over minimum allocated BW : • F: 단조 증가 , 한계치 (M-1) 에 도달 -> Overflow

– CZ(Current zone bit)• 현재 Service 되는 Packet Zone 을 가리킴

i

ki

r

L

Time-stamp Overflow Control

• MSB of F does not change more than once when serving in the current zone -> packet out-of-sequence(x)

• PFQ• 기존 연구 및 일반적인 구현 기법• General Shaper-Scheduler

– Slotted Updates– Implementation Architecture– Time-Stamp Aging Problem

• Conclusion

Slotted Updates(1/2)

• Scheme– Variable sized packet -> fixed-length segments– Packet Scheduler : slotted(synchronous) system– T : one slot time -> W(t,t+d) = dT : normalized to one– All times(start, finish, system time) -> integer– Ex) -> next page

• Discussion– Incomplete segment

• underutilized, non-workconserving.• limited by one time slot.

– Inaccuracy <- discrete time event(arrival, departure)

Slotted Updates(2/2)

Advantage using Slotted Update

• 일반적인 Shaper Queue– Maximum N packets are moved to Scheduler Queue

• Fixed Segment Using Slotted Update– Researches about ATM cells– Same effect as ATM cell(fixed size)– V(t)(=a) 의 값을 가지고 column search– only two packets at most need to be transmitted to the sche

duler queue• packet with the smallest finish time in column a• packet with the smallest finish time in column b(b 는 현재

전송되고 있거나 막 전송한 패킷의 start time)

Implementation Architecture

Basic Operations

• At every time slot, CPU( using Smin(start time queue)) -> virtual time update(=a)

• Shaper Queue– new HOL packet : 이전 패킷의 finish time -> CPU– start time, finish time 계산 -> Shaper Queue

• Scheduler Queue– packet(k) selection(minimum finish time) -> 전송– Fk is stored in the finish time queue( start time : b )– a 와 b 는 2-D RSE 에서 eligibility test 를 위해서 사용됨

2-D RSE

• W groups at level 0 to index a column

Time-Stamp Overflow(1/2)

• F and S’s overflow• F = S + D

– F is bounded by max packet length and min alloc bw– overflow information : 2 bit

F < S

F > S

F < S

F > S

Time-Stamp Aging Problem(1/2)

• Finish time 은 다음 패킷의 start time 계산을 위해서 값이 저장

• Virtual system time 도 overflow 할 수 있다 .– 그 때 , finish time 은 obsolete– V(t) 는 한번에 W-1 까지 증가할 수 있다 .

• Purging Algorithm– check each entry and purge all obsolete ones(should be fast)– perform many purging operations in a time slot(difficult)

• Solution– V(t) can overflow at most once in every time slot– have to see multiple time slot -> Periodic purging scheme

Time-Stamp Aging Problem(2/2)

• Check A entries in T time slots– A >= N-1 -> 2A memory accesses– 2T memory accesses(read/wrtie)– T x slot time >= (2T +2A) x memory cycle

• EX)– 64byte packet segment. 10Gbit(51.2ns)– memory cycle 10ns, N = 32K– A = N = 32768 -> T = 21006, A/T = 1.56 purging operations

• Cv(t) : multibit counter, Time Zone Indicator for V(t)

• Oi : obsolete bit counter

• Ci : Time Zone Indicator for Fi

Flow chart of purging scheme

Conclusion

• A novel RSE for PFQ– hierarchical searching– commercial memory chip, independent of # of session

• 2-D RSE for general shaper-scheduler– at most two packets to be transferred

• Time-Stamp overflow– 2bit zone bit

• Time-Stamp Aging Problem– V(t)’s overflow– multibit counter variable within a fixed period