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Design Technology CenterDesign Technology CenterNational Tsing Hua UniversityNational Tsing Hua University
2006 International Center on Design 2006 International Center on Design for Nanotechnologies Workshopfor Nanotechnologies Workshop
Grand Formosa TarokoGrand Formosa Taroko
Jan. 6 - Jan. 7Jan. 6 - Jan. 7
2積體電路設計技術研發中心積體電路設計技術研發中心積體電路設計技術研發中心積體電路設計技術研發中心
議 程 議 程 part part ⅠⅠDate Date Time Time Sessions Sessions
JAN. 6JAN. 6(Fri.)(Fri.)
08:15-08:30 08:15-08:30 Welcome and IntroductionsWelcome and Introductions
08:30-10:30 08:30-10:30
Invited session on nanotechnologies Invited session on nanotechnologies (Chairs: Tim Cheng and Jason (Chairs: Tim Cheng and Jason Cong)Cong)
** Nano-architectonics for Integrated Circuits and Systems - A Perspective** Nano-architectonics for Integrated Circuits and Systems - A Perspective ((Kang Wang, UCLAKang Wang, UCLA))
** National Technology Program in Taiwan (** National Technology Program in Taiwan (JyuoJyuo-Min -Min ShyuShyu, ITRI), ITRI)
** Research Highlights of CNST of UST (** Research Highlights of CNST of UST (Cheng-Chung Chi, NTHUCheng-Chung Chi, NTHU))
10:30-10:45 10:30-10:45 Coffee BreakCoffee Break
10:45-12:00 10:45-12:00
Design and Test for Reliability Design and Test for Reliability (Chair: Tim Cheng) (Chair: Tim Cheng)
** Self-Adaptable and Error-Resilient System Design (** Self-Adaptable and Error-Resilient System Design (Tim ChengTim Cheng, UCSB), UCSB)
** A New Paradigm for Scan Chain Diagnosis Using Signal Processing ** A New Paradigm for Scan Chain Diagnosis Using Signal Processing Techniques ( Techniques ( Shi-Yu Huang, NTHUShi-Yu Huang, NTHU))
** Flash Memory Built-In Self-Diagnosis with Test Mode Contrl (** Flash Memory Built-In Self-Diagnosis with Test Mode Contrl (Jen-Jen-ChiehChieh YehYeh, NTHU, NTHU) )
12:00-13:00 12:00-13:00 LunchLunch
3積體電路設計技術研發中心積體電路設計技術研發中心積體電路設計技術研發中心積體電路設計技術研發中心
議 程 議 程 part part ⅡⅡDate Date Time Time Sessions Sessions
Jan. 6Jan. 6(Fri.)(Fri.)
13:00-14:15 13:00-14:15
Design and Test for Programmability Design and Test for Programmability (Chair: Shih-Chieh Chang NT(Chair: Shih-Chieh Chang NTHU)HU)
** A BIST scheme for FPGA interconnect delay faults (** A BIST scheme for FPGA interconnect delay faults (Yen-Lin Yen-Lin PengPeng, , NTHU NTHU))
** Maximum Instantaneous Current analysis and cross talk optimizatio** Maximum Instantaneous Current analysis and cross talk optimizationn *** A Bus Architecture for Crosstalk Elimination ( *** A Bus Architecture for Crosstalk Elimination ( Wen-WenWen-Wen Hsieh Hsieh, , NTHU)NTHU) *** Lower Bound Estimation of Maximum Instantaneous Current for *** Lower Bound Estimation of Maximum Instantaneous Current for Sequential Circuits (Cheng-Tao Hsieh, NTHU)Sequential Circuits (Cheng-Tao Hsieh, NTHU)
** A probabilistic approach to logic equivalence checking (** A probabilistic approach to logic equivalence checking (Chun-Chun-YaoYao Wang, NTHU Wang, NTHU))
14:15-14:30 14:15-14:30 Coffee BreakCoffee Break
14:30-15:00 14:30-15:00 NSF/NSC discussionNSF/NSC discussion ((Bill Chang Bill Chang and and Cheng-Cheng-WenWen Wu Wu, NTHU) , NTHU)
15:00-16:00 15:00-16:00 Education and social impact Education and social impact (Chair: Jason Cong) (Chair: Jason Cong)Joy of speech making (Joy of speech making (C.L. Liu, NTHUC.L. Liu, NTHU) )
16:30-17:30 16:30-17:30 Panel discussionsPanel discussionsOpportunities and challenges for design for nanotechnologies Opportunities and challenges for design for nanotechnologies
18:00-20:0018:00-20:00 DinnerDinner
4積體電路設計技術研發中心積體電路設計技術研發中心積體電路設計技術研發中心積體電路設計技術研發中心
議 程 議 程 part part ⅢⅢ
Date Date Time Time Sessions Sessions
JAN.7JAN.7(Sat.)(Sat.)
08:30-09:00 08:30-09:00 Design Drivers Design Drivers (Steve Lin and/or Cheng Xu) (Steve Lin and/or Cheng Xu)
09:00-10:15 09:00-10:15
Complexity management for nano-scale designsComplexity management for nano-scale designs
**** System-level synthesis for programmable systems (Jason Cong) System-level synthesis for programmable systems (Jason Cong)
** Solution Space Smoothing Method and its Application (** Solution Space Smoothing Method and its Application (SheqinSheqin Dong Dong) )
10:15-10:30 10:15-10:30 Coffee BreakCoffee Break
10:30-11:30 10:30-11:30 Discussion of 2006 research planDiscussion of 2006 research plan
11:30-13:3011:30-13:30 LunchLunch