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BO CO MN HC C IN T

GVHD: H VN LM

LI CM N Nhm chng em xin chn thnh cm n thy H Vn Lm hng dn ti tiu lun ca chng em chng em c th hon thnh hc phn ny. Qua y chng em gi li cm n chn thnh n anh Ng Thanh ng v cc bn trong lp DF10DT44 gip cng nh chia s mt s ti liu tham kho nhm chng em c th hon thnh tt bo co tiu lun ny. Tuy nhin trong qu trnh vit tiu lun ny do trnh hiu bit ca chng em cn hn ch, nn cn xy ra nhiu sai st mong thy v cc bn gp b sung nhm chng em hon thin hn v kin thc cng nh rt kinh nghim cho cc bi ti sau. Nhm chng em xin chn thnh cm n! Bnh Dng, Ngy 28 thng 2 nm 2012.

V QUANG LC L HOI THANH

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MC LC


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A. PHN M U1. L do chn ti Hin nay vi s pht trin khng ngng v mi mt, trong in t, t ng ha ng mt vi tr khng nh. in t gp phn vo qu trnh t ng ha mi th gip con ngi hin i ha cuc sng v cc h thng t ng ha iu khin dn thay th cho sc ngi trong cc cng vic trong gia nh cng nh c quan, trng hc,x nghip...v mt h thng t ng n gin trong s l h thng Chung Bo Tit Hc trong cc trng hc. Vn chung bo tit hc l vn cn thit bt c trng hc no, gip cc thy c khng phi canh thi gian nhn chung trong cc gi vo hc, ra chi v ra v. Chnh v th chng em thit k mch chung bo tit hc t ng cho trng hc. 2. Cc phng php nghin cu Nghin cu ti liu. Th nghim m phng trn Proteus 7 Professional 3. Cu trc Chng 1: C s l thyt

1.1 Tng quan v PIC 16F887 1.2 Gii thiu s lc giao tip I2C 1.3 Tng quan v IC thi gian thc RTC DS 1307 1.4 Thut ton giao tip I2C vi Vi iu khin PIC 16F887Chng 2: Thit k mch chung bo tit hc

2.1 Thit k phn cng 2.2 Thit k phn mm


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B. PHN NI DUNGCHNG 1: C S L THUYT1.1. TNG QUAN V PIC 16F887

PIC16F887 l vi iu khin 8-bit c kin trc Harvard ca Microchip c nhng thng s k thut nh sau: Clock hot ng ti a 20MHz. Chu k my bng bn ln chu k xung clock.Chip c nhiu dng v khc nhau, loi chip c s dng trong ti l loi 40 Trang 4


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chn PDIP. in p hot ng rng t 2V n 5.5V.B nh d liu v b nh chng trnh tch bit nhau, bus a ch cng nh bus d liu l ring bit. B nh chng trnh Flash 8K nh cho php ghi 100,000 ln. Mi nh c 14 bit. B nh d liu RAM c 512 Byte gm cc thanh ghi chc nng c bit v cc thanh ghi a mc ch. Ngoi ra PIC16F887 c tch hp 256 Byte EEPROM cho php ghi n 1,000,000 ln. 35 chn I/O ca 5 port iu khin l PortA, PortB, PortC, PortD, PortE.

B chuyn i ADC 10-bit vi 14 knh. 3 b timer. B timer0 8-bit, b timer1 16-bit v b timer2 8-bit. Module Capture, Compare v PWM Module Enhanced USART h tr RS-485, RS-232.


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Block Diagram

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1.1.1. M t ng ra (I/O Port) Hu ht cc chn ca vi iu khin PIC 16F887 u c nhiu chc nng nh hnh bn di, v d chn s 5 ca PIC 16F887 c ch nh l RA3/AN3/Vref+/C1IN+ .


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PIC 16F887 c 3 loi b nh: ROM, RAM, EEPROM. Tt c chng u c c im, t chc v chc nng c th. Rom: PIC 16F887 c 8 Kb flash rom EEProm: ging nh b nh chng trnh, d liu cha trong EEProm c lu vnh cu thm ch khi mt ngun in. khng ging Rom, d liu trong Eeprom c th thay i theo hot ng ca vi iu khin. Ram: y l b nh th 3 v cng l 1 phn trong b nh vi iu khin, n gm 2 phn: thanh ghi dng chung v thanh ghi c chc nng c bit (SFR), tt c thanh ghi u c chia thnh 4 bank thanh ghi.


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RAM MEMORY BANKS


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1.2. GII THIU S LC GIAO TIP I2C

Giao thc u tin truyn thng ni tip c pht trin bi Philips Semiconductor v c gi l bus I2C. V ngun gc n c thit k l iu khin lin thng IC (Inter-Intergrated Circuit) nn n c t tn l I2C. Tt c cc chip c tch hp v tng thch vi I2C u c thm mt giao din tch hp trn Chip truyn thng trc tip vi cc thit b tng thch I2C khc. Vic truyn d liu ni tip theo hai hng 8 bit c thc thi theo 3 ch sau: Chun (Standard)100 Kbits/sec Nhanh (Fast)400 Kbits/sec Tc cao (High speed)3.4 Mbits/sec

ng bus thc hin truyn thng ni tip I2C gm hai ng l ng truyn d liu ni tip SDA v ng truyn nhp xung ng h ni tip SCL. V c ch hot ng l ng b nn n cn c mt nhp xung tn hiu ng b. Cc thit b h tr I2C u c mt a ch nh ngha trc, trong mt s bit a ch l thp c th cu hnh. n v hoc thit b khi to qu trnh truyn thng l n v Ch v cng l n v to xung nhp ng b, iu khin cho php kt thc qu trnh truyn. Nu n v Ch mun truyn thng vi n v khc n s gi km thng tin a ch ca n v m n mun truyn trong d liu truyn. n v T u c gn v nh a ch thng qua n v Ch c th thit lp truyn thng v trao i d liu. Bus d liu c thit k cho php thc hin nhiu n v Ch v T trn cng Bus.


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Qu trnh truyn thng I2C c bt u bng tn hiu start to ra bi n v Ch. Sau n v Ch s truyn i d liu 7 bit cha a ch ca n v T m n mun truyn thng, theo th t l cc bit c trng s ln nht MSB s c truyn trc. Bit th tm tip theo s cha thng tin xc nh n v T s thc hin vai tr nhn (0) hay gi (1) d liu. Tip theo s l mt bit ACK xc nhn bi n v nhn nhn c 1 byte trc hay khng. n v truyn (gi) s truyn i 1 byte d liu bt u bi MSB. Ti im cui ca byte truyn, n v nhn s to ra mt bit xc nhn ACK mi. Khun mu 9 bit ny (gm 8 bit d liu v 1 bit xc nhn) s c lp li nu cn truyn tip byte na. Khi n v Ch trao i xong d liu cn n s quan st bit xc nhn ACK cui cng ri sau s to ra mt tn hiu dng STOP kt thc qu trnh truyn thng. I2C l mt giao din truyn thng c bit thch hp cho cc ng dng truyn thng gia cc n v trn cng mt bo mch vi khong cch ngn v tc thp. V d nh truyn thng gia CPU vi cc khi chc nng trn cng mt bo mch nh EEPROM, cm bin, ng h to thi gian thc... Hu ht cc thit b h tr I2C hot ng tc 400Kbps, mt s cho php hot ng tc cao vi Mbps. I2C kh n gin thc thi kt ni nhiu n v v n h tr c ch xc nh a ch. 1.3. TNG QUAN V IC THI GIAN THC RTC DS 1307 1.3.1. Gii thiu chung v DS1307


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IC thi gian thc l h vi iu khin ca hng DALLAS. DS1307 c mt s c trng c bn sau: DS1307 l IC thi gian thc vi ngun cung cp nh dng cp nht thi gian v ngy thng. SRAM :56bytes a ch v d liu c truyn ni tip qua 2 ng bus 2 chiu DS1307 c mt mch cm bin in p dng d cc in p li v t ng ng ngt vi ngun pin cung cp 3V. DS1307 c 7 byte d liu nm t a ch 0x00 ti 0x06, 1 byte iu khin, v 56 byte lu tr ( dnh cho ngi s dng ). Khi x l d liu t DS1307, h t chuyn cho ta v dng s BCD, v d nh ta c c d liu t a ch 0x04 (tong ng vi Day- ngy trong thng) v ti 0x05 (thng) l 0x15, 0x11. Lu n vai tr ca chn SQW/OUT. y l chn cho xung ra ca DS1307 c 4 ch 1Hz, 4.096HZ, 8.192Hz, 32.768Hz... cc ch ny uc quy nh bi cc bt ca thanh ghi Control Register (a ch 0x07 ). a ch ca DS1307l 0xD0. C ch hot ng : DS1307 hot ng vi vai tr slave trn ng bus ni tip.Vic truy cp c thi hnh vi ch th start v mt m thit b nht nh c cung cp bi a ch cc thanh ghi. Tip theo cc thanh ghi s c truy cp lin tc n khi ch th stop c thc thi. 1.3.2. C ch hot ng v chc nng ca DS1307


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Vcc: ni vi ngun X1,X2: ni vi thch anh 32,768 kHz Vbat: u vo pin 3V GND: t SDA: chui data SCL: dy xung clock SQW/OUT: xung vung/u ra driver DS1307 l mt IC thi gian thc vi ngun cung cp nh, dng cp nht thi gian v ngy thng vi 56 bytes SRAM. a ch v d liu c truyn ni tip qua 2 ng bus 2 chiu. N cung cp thng tin v gi,pht,giy ,th,ngy ,thng, nm.Ngy cui thng s t ng c iu chnh vi cc thng nh hn 31 ngy,bao gm c vic t ng nhy nm. ng h c th hot ng dng 24h hoc 12h vi ch th AM/PM. DS1307 c mt mch cm bin in p dng d cc in p li v t ng ng ngt vi ngun pin cung cp. DS 1307 hot ng vi vai tr slave trn ng bus ni tip. Vic truy cp c thi hnh vi ch th START v mt m thit b nht nh c cung cp bi a ch cc thanh ghi. Tip theo cc thanh ghi s c truy cp lin tc n khi ch th STOP c thc thi. S khi ca DS1307V QUANG LC L HOI THANH Trang 16

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M t hot ng ca cc chn: Vcc,GND: ngun mt chiu c cung cp ti cc chn ny. Vcc l u vo 5V. Khi 5V c cung cp th thit b c th truy cp hon chnh v d liu c th c v vit. Khi pin 3V c ni ti thit b ny v Vcc nh hn 1,25Vbat th qu trnh c v vit khng c thc thi,tuy nhin chc nng timekeeping khng b nh hng bi in p vo thp. Khi Vcc nh hn Vbat th RAM v timekeeper s c ngt ti ngun cung cp trong (thng l ngun 1 chiu 3V) Vbat: u vo pin cho bt k mt chun pin 3V . in p pin phi c gi trong khong t 2,5 n 3V m bo cho s hot ng ca thit b. SCL (serial clock input): SCL c s dng ng b s chuyn d liu trn ng dy ni tip. SDA (serial data input/out): l chn vo ra cho 2 ng dy ni tip. Chn SDA thit k theo kiu cc mng h , i hi phi c mt in tr ko trong khi hot ng. SQW/OUT (square wave/output driver): khi c kch hot th bit SQWE c thit lp 1 chn SQW/OUT pht i 1 trong 4 tn s (1Hz,4kHz,8kHz,32kHz). Chn ny cng c thit k theo kiu cc mngTrang 17


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h v vy n cng cn c mt in tr ko trong. Chn nys hot ng khi c Vcc v Vbat c cp. X1,X2: c ni vi mt thch anh tn s 32,768kHz. L mt mch to dao ng ngoi, hot ng n nh th phi ni thm 2 t 33pF. Cng c DS1307 vi b to dao ng trong tn s 32,768kHz, vi cu hnh ny th chn X1 s c ni vo tn hiu dao ng trong cn chn X2 th h.

1.3.3. S a ch RAM v RTC

Thng tin v thi gian v ngy thng c ly ra bng cch c cc byte thanh ghi thch hp. thi gian v ngy thng c thit lp cng thng qua cc byte thanh ghi ny bng cch vit vo nhng gi tr thch hp. ni dung ca cc thanh ghi di dng m BCD (binary coded decreaseimal). Bit 7 ca thanh ghi seconds l bit clock halt (CH), khi bit ny c thit lp 1 th dao ng disable, khi n c xo v 0 th dao ng c enable. Ch : enable dao ng trong sut qu trnh cu hnh thit lp (CH=0). Thanh ghi thi gian thc c m t nh sau:


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DS1307 c th chy ch 24h cng nh 12h. Bit th 6 ca thanh ghi hours l bit chn ch 24h hoc 12h. khi bit ny mc cao th ch 12h c chn. ch 12h th bit 5 l bit AM/PM vi mc cao l l PM. ch 24h th bit 5 l bit ch 20h (t 20h n 23h). Trong qu trnh truy cp d liu, khi ch th START c thc thi th dng thi gian c truyn ti mt thanh ghi th 2, thng tin thi gian s c c t thanh ghi th cp ny, trong khi ng h vn tip tc chy. Trong DS1307 c mt thanh ghi iu khin iu khin hot ng ca chn SQW/OUT:

OUT (output control): bit ny iu khin mc ra ca chn SQW/OUT khi u ra xung vung l disable. Nu SQWE = 0, mc logic chn SQW/OUT s l 1 nu OUT=1 v OUT = 0 nu OUT = 0 . SQWE (square wave enable): bit ny c thit lp 1 s enable u ra ca b to dao ng. Tn s ca u ra sng vung ph thuc vo gi tr ca RS1 v RS0.

DS1307 h tr bus 2 dy 2 chiu v giao thc truyn d liu. thit b gi d liu ln bus c gi l b pht v thit b nhn gi l b thu. thit b iu khin qu trnhV QUANG LC L HOI THANH Trang 19

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ny gi l master. thit b nhn s iu khin ca master gi l slave. Cc bus nhn s iu khin ca master, l thit b pht ra chui xung clock (SCL), master s iu khin s truy cp bus to ra cc ch th START v STOP. 1.3.4. S truyn nhn d liu trn chui bus 2 dy Tu thuc vo bit R/ w m 2 loi truyn d liu s c thc thi: Truyn d liu t master truyn v slave nhn: Master s truyn byte u tin l a ch ca slave. Tip sau l cc byte d liu . slave s gi li bit thng bo nhn c (bit acknowledge) sau mi byte d liu nhn c. d liu s truyn t bit c gi tr nht (MSB). Truyn d liu t slave v master nhn: byte u tin (a ch ca slave) c truyn ti slave bi master. Sau slave s gi li master bit acknowledge. tip theo slave s gi cc byte d liu ti master. Master s gi cho slave cc bit acknowledge sau mi byte nhn c tr byte cui cng, sau khi nhn c byte cui cng th bit acknowledge s khng c gi. Master pht ra tt c cc chui xung clock v cc ch th START v STOP. s truyn s kt thc vi ch th STOP hoc ch th quay vng START. Khi ch th START quay vng th s truyn chui d liu tip theo c thc thi v cc bus vn cha c gii phng. D liu truyn lun bt u bng bit MSB. 1.3.5. DS1307 c th hot ng 2 ch sau Ch slave nhn ( ch DS1307 ghi): chui d liu v chui xung clock s c nhn thng qua SDA v SCL. Sau mi byte c nhn th 1 bit acknowledge s c truyn. cc iu kin START v STOP s c nhn dng khi bt u v kt thc mt truyn 1 chui. nhn dng a ch c thc hin bi phn cng sau khi chp nhn a ch ca slave v bit chiu. Byte a ch l byte u tin nhn c sau khi iu kin STARTc pht ra t master. Byte a ch c cha 7 bit a ch ca DS1307, l 1101000, tip theo l bit chiu (R/ w) cho php ghi khi n bng 0. sau khi nhn v gii m byte a ch th thit b s pht i 1 tn hiu acknowledge ln ng SDA. Sau khi DS1307 nhn dng c a ch v bit ghi th master s gi mt a ch thanh ghi ti DS1307 , to ra mt con tr thanh ghi trn DS1307 v master s truyn tng byte d liu cho DS1307 sau mi bit acknowledge nhn c. sau master s truyn iu kin STOP khi vic ghi hon thnh


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Ch slave pht ( ch DS1307 c): byte u tin slave nhn c tng t nh ch slave ghi. Tuy nhin trong ch ny th bit chiu li ch chiu truyn ngc li. Chui d liu c pht i trn SDA bi DS 1307 trong khi chui xung clock vo chn SCL. Cc iu kin START v STOP c nhn dng khi bt u hoc kt thc truyn mt chui. byte a ch nhn c u tin khi master pht i iu kin START. Byte a ch cha 7 bit a ch ca slave v 1 bit chiu cho php c l 1. Sau khi nhn v gii m byte a ch th thit b s nhn 1 bit acknowledge trn ng SDA. Sau DS1307 bt u gi d liu ti a ch con tr thanh ghi thng qua con tr thanh ghi. Nu con tr thanh ghi khng c vit vo trc khi ch c c thit lp th a ch u tin c c s l a ch cui cng cha trong con tr thanh ghi. DS1307 s nhn c mt tn hiu Not Acknowledge khi kt thc qu trnh c. c d liu-ch slave pht.

Thi gian thc hin vic c,ghi d liu ca DS1307: s ng b:


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1.4. THUT TON GIAO TIP I2C VI VI IU KHIN PIC 16F8871.4.1. iu kin START v STOP START v STOP l nhng iu kin bt buc phi c khi mt thit b ch mun thit lp giao tip vi mt thit b no trong mng I2C. START l iu kin khi u, bo hiu bt u ca giao tip, cn STOP bo hiu kt thc mt giao tip. Hnh 11 m t iu kinSTART v iu kin STOP khi giao tip I2C gia DS1307 vi Vi iu Khin.

Hnh: iu kin START v STOP.V QUANG LC L HOI THANH Trang 22

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Ban u khi cha thc hin qu trnh giao tip, c hai ng SDA v SCL u mc cao (SDA = SCL = HIGH). Lc ny bus I2C c coi l ri (bus free), sn sng cho mt giao tip. Hai iu kin START v STOP l khng th thiu trong vic giao tip gia cc thit b I2C, tt nhin l trong giao tip ny cng khng ngoi l. iu kin START: mt s chuyn i trng thi t cao xung thp trn ng SDA trong khi ng SCL ang mc cao (cao = 1; thp = 0) bo hiu mt iu kin START iu kin STOP: Mt s chuyn i trng thi t mc thp ln cao trn ng SDA trong khi ng SCL ang mc cao. C hai iu kin START v STOP u c to ra bi thit b ch. Sau tn hiu START, bus I2C coi nh ang trong trng thi lm vic (busy). Bus I2C s ri, sn sng cho mt giao tip mi sau tn hiu STOP t pha thit b ch. Sau khi c mt iu kin START, trong qua trnh giao tip, khi c mt tn hiu START c lp li thay v mt tn hiu STOP th bus I2C vn tip tc trong trng thi bn. Tn hiu START v lp li START u c chc nng ging nhau l khi to mt giao tip. 1.4.2. Ch hot ng

Hnh: Ch hot ng ca I2C DS1307 c th hot ng 2 ch sau: ch slave nhn (ch DS1307 ghi ): chui d liu v chui xung clock s c nhn thng qua SDA v SCL. Sau mi byte c nhn th 1 bit ACKnowledge sV QUANG LC L HOI THANH Trang 23

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c truyn. Cc iu kin START v STOP s c nhn dng khi bt u v kt thc truyn 1 chui, nhn dng a ch c thc hin bi phn cng sau khi chp nhn a ch ca slave v bit mt chiu. Ch slave pht ( ch DS1307 c ): byte u tin slave nhn c tng t nh ch slave ghi. Tuy nhin trong ch ny th bit chiu li ch chiu chuyn ngc li. Chui d liu c phat i trn SDA bi DS1307 trong khi chui xung clock vo chn SCL.


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CHNG 2: THIT K MCH CHUNG BO TIT HC2.1 THIT K PHN CNG

2.2 THIT K PHN MM2.2.1 Lu


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KHI TO PORT XUT Gi = 14 PHT = 50 GIY = 00 DELAY 100ms

KHI TO LCD

CHUNG REO 15s

CHO PHP LCD HIN TH DNG 1

Gi = 15 PHT = 10 GIY = 00

C THI GIAN T DS 1307

CHUNG REO 15s CHO PHP CON TR HIN TH LN U DNG 2 LCD

Gi = 07 PHT = 00 GIY = 00

Gi = 17 PHT = 00 GIY = 00

CHUNG REO 15s CHUNG REO 15s

Gi = 08 PHT = 45 GIY = 00

Gi = 18 PHT = 00 GIY = 00


Gi = 09 PHT = 00 GIY = 00

Gi = 19 PHT = 45 GIY = 00


Gi = 11 PHT = 00 GIY = 00

Gi = 20 PHT = 00 GIY = 00


Gi = 13 PHT = 00 GIY = 00

Gi = 21 PHT = 00 GIY = 00



KT THC A

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2.2.2 Chng trnh iu khin #include "E:\DATA dang hoc\bao cao co dien tu\chuong bao tiet hoc\chuong bao tiet hoc.h" /******************************************************* *** * tieu luan mon co dien tu * de tai: mach tu dong bao chuong tiet hoc ******************************************************** **/ /******************************************************* *** * ten : chuong bao tiet hoc * dien ta: mach tu dong bao chuong tiet hoc - 7h00 : bo chung 15 giy - 8h45 : bo chung 15 giy - 9h00 : bo chung 15 giy - 11h00 : bo chung 15 giy - 13h00 : bo chung 15 giy - 14h50 : bo chung 15 giy - 15h10 : bo chung 15 giy - 17h00 : bo chung 15 giy - 18h00 : bo chung 15 giy - 19h45 : bo chung 15 giy - 20h00 : bo chung 15 giy - 21h00 : bo chung 15 giy * cong cu: HI-TECH PIC * chip: ic 16f887 ******************************************************** **/ #define LCD_TYPE 1 #include #byte port_A = 0x05 #byte tris_A = 0x85 #byte lcd_port = 0x06V QUANG LC L HOI THANH Trang 28

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#byte tris_B = 0x86 #byte tris_D = 0x88 #byte port_D = 0x08 #bit lcd_rs = 0x05.0 #bit lcd_rw = 0x05.1 #bit lcd_e = 0x05.2 #bit bel = 0x08.0 char time[6]; /******************************************************* *** * chuong trinh con ******************************************************** **/ void read_ds1307() { int i; for (i=0;i0;i--) { lcd_char((time[i]>>4)+ 0x30); lcd_char((time[i]&0x0f)+0x30); if(i!=1) { lcd_char(":"); } } } /******************************************************* *** * chuong trinh chinh ******************************************************** **/V QUANG LC L HOI THANH Trang 30

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void main() { lcd_init(); setup_adc_ports(NO_ANALOGS|VSS_VDD); setup_adc(ADC_CLOCK_DIV_2); setup_timer_0(RTCC_INTERNAL|RTCC_DIV_1); setup_timer_1(T1_DISABLED); setup_timer_2(T2_DISABLED,0,1); setup_ccp1(CCP_OFF); setup_comparator(NC_NC_NC_NC);// This device COMP currently not supported by the PICWizard int data,i; set_tris_A(0x00); set_tris_B(0x00); set_tris_D(0x00); port_A=0; lcd_port=0; port_D =0; delay_ms(150); lcd_cmd(0x38); lcd_cmd(0x38); lcd_cmd(0x38); lcd_cmd(0x0c); lcd_char('C'); lcd_char('O'); lcd_char(' '); lcd_char('D'); lcd_char('I'); lcd_char('E'); lcd_char('N'); lcd_char(' '); lcd_char('T'); lcd_char('U');V QUANG LC L HOI THANH Trang 31

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while(true) { read_ds1307(); lcd_cmd(0xc0); lcd_time(); if(time[3]==0x07 && time[2]==0x00 && time[1]==00) { bel = 1; for(i=0;i

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