EMC review for Belle II (Grounding shielding plans) PXD ... idlab/taskAndSchedule/local_DAQ/BelleIIGND...EMC review for Belle II (Grounding shielding plans) PXD –DEPFET system

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  • EMC review for Belle II

    (Grounding & shielding plans)

    PXD DEPFET system

  • Outline

    1. Introduction

    2. Grounding strategy

    Implementation aspects

    3. Noise emission issues

    Test plans

    4. Noise immunity issues

    Signal circuit

    Test plans

    5. Cabling

    6.Conclusions

  • 1. Introduction

    PXD- DEPFET detector is very complex

    FEE (Sensor, DCD,DHP) It may be sensitive

    to EM noise

    It may radiates ( HF clocks and signals)

    Power supplies

    It emits EM noise

    Cable & connectors

    It may propagate EM noise inside/outside FEE area

  • 2. Grounding strategy

    It is focused on grounding and shielding aspects.

    It plans to define:

    Safety grounding

    Signal or ground reference plane

    Grounding topologies

    These issues will be used to verify:

    Electrical safety issues

    Identify possible ground loops

    Identify EMI sources

    Identify EMI victims

  • 2. Grounding strategy Selection of reference

    Any metal structure Local GND (Cooling blocks)

    It should have low impedance from DC to High frequency

    Safety ground & Equipment protection

    Ground path should be free of operational currents

    Laboratory codes and standards at KEK - Any ?

    Metal parts that can be energized should be grounded

    Ground connections - Bonding and straps

    An EMC program has been implemented for the

    machine

    EMC PROGRAM ON THE ACCELERATOR RINGS

    K. Okamura (KEK), Y. Watanabe (JAEA)

    It is mainly focused on grounding issues only

    Should we apply the same rules ?

  • 2. Grounding strategy - Topology

    PXD

    Detector

  • PXD connected to the cooling blocks via capacitors

    High Frequency Ground Connection

    Cooling blocks connected to Beam pipe ? through

    direct bonding.

    Beam pipe connected to reference ground system.

    2.1 Grounding strategy - Implementation

    Detector (FEE)

    Cooling block

    Beam pipe ?

    Reference ground

    Cooling pipe

    Hybrid Equivalent to Multi-point

    Junction Box

    or

    Patch panel

  • 2.2 Grounding topology: Grounding

    implementation - Capacitors

    Capacitors are required to:

    - Provide an AC connection to ground.

    - Decouple the power feeds.

    They have to be prepared to operate at High-frequency, low-inductance

    ceramic capacitors (0.1 F over 10 MHz).

    Use of vias interconnecting grounds

    may help lower RF impedance

    The decoupling capacitor

    should be located as close

    as physically possible from

    the ICs power pin.

    Bulk capacitors: at least ten

    (10) times greater than the

    sum of all the values of

    decoupling capacitors.

  • 2.2 Grounding topology: Grounding

    implementation - Straps

    Multiple equipment or units must be connected to a signal

    reference system (SRS) for direct connection bonding straps are required

    Bounding straps: impedance highly

    influenced by inductance L,

    dependent on geometry

    resonances must be avoided

    Local ground at detector

    level (HF conection)

    Short connections

  • 3. Noise emissions

    Main external noise sources for PXD will be conducted noise

    Conducted :

    Power supplies - Switching power converters

    CM currents from neighboring systems (SVD)

    Radiated noise (inside SVD + PXD volume)

    No big far field emissions are expected because distance and frequency.

    F=100 MHz - =3 m / - Rule /3= 1 m

    Near field

    Magnetic field noise emissions may be the predominant ones because noise currents and low voltages inside PXD volume.

  • 3. Noise emissions Most of the external noise sources will be couple to the

    PXD via cables

    Most probable path - Power cables (LV)

    Low impedance path

    Other cables may introduce noise but filtering is easier because they high impedance cables

    Data and slow control lines.

    Conductive ground structures may conduct some noise

    CM emissions from other subsystems

    PXD

    System

    SVD System

  • PS system of PXD is very complex

    Power is supplied remotely by several floating DC-DC converters

    Stefan Rummels talk

    This PS emits noise

    3. Noise emissions

    DEPFET VOLT

    DCD VOLT

  • 3. Noise emissions Switching converters generates conducted noise

    At the input & output

    It is generally the main noise source in HEP

    Two modes of noise emissions (kHz - MHz range)

    Common mode & Differential mode

    Load

    Power switching converter

    Switching devicesFilter

    Idm

    Gnd

    Load

    Power switching converter

    Switching devicesFilter

    Idm

    GndGnd Gnd

    Power switching converter

    Parasitic capacitance of heat sink

    Switching devices Filter

    Icm

    CM Filter

    Gnd

    Power switching converter

    Parasitic capacitance of heat sink

    Switching devices Filter

    Icm

    CM Filter

    DM CM

  • 3. Noise emissions: Test plans

    Detailed test plan is planned to measure the noise emission level of the power supply units

    It will help to define the compatible levels with the FEE.

    A prototype of the power units is required

    Special test setup

    It will require special connectors and cables

    Test load - A set of resistors

    Electronic loads are noisy.

    Noise at the output and input of Power units will be measured with EMI probes and spectrum analyzers

    This test is planned to be carried out in

    September 2012 or October 2012.

  • 3. Noise emissions: Test plans

    Output currents

    (ref. = 50 ohms)

    Cm

    Cd Id

    Icm/2 Icm/2

    I+

    Icmmeas

    +

    -

  • The immunity of the system is defined main by the sensitivity of the FEE

    The Front-End electronics is the most susceptible part to:

    Radio frequency perturbation (conducted and radiated)

    Transient perturbation.

    The signal circuit defines the robustness of the FEE to any noise in the system. Other system may be affected by noise but based on previous

    experience , signal circuit is the most sensitive one.

    Any noise in this circuit may increase noise baseline at the output of each channel

    4. Noise immunity issues

    Optical Link

    Voltage Distribution Detector DHH P.S.

    Noise source

    Victim

    Coupling path

    FEE PP

    Optical link

  • 4. Noise immunity issues

    This noise defines the minimum signal level that the

    FEE can process

    Thermal noise dominant effect (by design)

    EM noise has to be characterized and minimized

    EM noise contribution depends on two factors

    It depends on Front End Amplifier frequency response.

    Coupling mechanisms (coupling network) between EM

    noise and output of the FEE.

    EM noise contribution is not constant.

    It may change from hundreds kHz to several MHz

    FEE characterization to EM noise help to improve the FEE

    immunity (identify weak areas & frequencies).

  • Zdet

    Zfeedback

    Ig

    Vsource

    VAmplow

    V-

    Vout

    signal The most important elements of the signal

    circuits are:

    Trans-impedance amplifier

    Low Gain (1,2,3 or 4)

    It is an advantage for PXD !!!

    Impedances associate to this circuit

    Real & stray

    4. Noise immunity issues: Signal circuit

  • ),( sdsource LCfZiIs

    ),( sdamplow LCfZ

    iAmplowI

    sourceV

    AmplowV

    cableZ

    logAnaGND

    .: AmpSoGndZ

    ),,( fBAfV loopinduced

    4. Noise immunity issues: Signal circuit

    Equivalent signal detection circuit

    ),( ggGates LCfZ

    ,...., cleargate VV

  • The characterization of EMI contributions due to external noise is performed via immunity test on prototypes

    Weak points & Noise characterization

    Compatibility

    The idea is to inject noise into the system via external lines.

    Different frequencies and amplitudes

    This measurement will define the transfer function between noise and FEE output .

    4. Noise immunity issues: Test plans

    Counts

    /mA

    Frequency

  • 4. Noise immunity issues: Test plans Two sets of test are planned:

    First set of immunity test an a preliminary prototype system of DEPFET.

    It is planned for end September 2012 at Bonn University.

    Second set of test are planned on a full prototype of DEPFET system

    It will be performed in similar way than a test beam

    Full system operation .

    It is planned for mid 2013 at ITA facilities

  • 5. Cabling

    Belle II and any HEP experiment have a large amount

    of cables installed in a small volume.

    These cables are very different

    Voltages - LV (V ) to Bias

    Currents - Low currents (ma) to High Currents (several

    amps)

    Signal & power

    Attention should be paid in the cabling coordination

    because it may lead to some integration problems .

    Interference phenomena

    High frequency

    Transient effect

    Low frequency phenomena Destructive effec