2006.6.30. 1 제 7 회테스트학술대회

High-Resolution DAC Linearity Testing Solution

Using

PVeM(Precision Voltage error Magnifying)

Design

High-Resolution DAC Linearity Testing Solution

Using

PVeM(Precision Voltage error Magnifying)

Design

Jin-Soo Ko, Teradyne, Inc.Binesh Shrestha, Teradyne, Inc

2006.6.30. 2 제 7 회테스트학술대회

Overview

16 Bit DAC Linearity Test ChallengeBrief description of PVeM TechniquePVeM overviewCalibration and Linearity test techniqueTest Results and Test time

2006.6.30. 3 제 7 회테스트학술대회

Can Measure 60uV LSB steps of 16 bit DAC?U ntitle d

S a mp les2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

0.0024

0.0025

0.0026

0.0027

0.0028

0.0029

0.003

0.0031

0.0032

0.0033

0.0034

0.0035

0.0036

0.0037

0.0038

0.0039

0.004

0.0041

0.0042

16 bit 4V DAC

61uV / LSB

183uV / 3 LSBs

0.0034V

0.0032V

2006.6.30. 4 제 7 회테스트학술대회

Required Repeatability of Measurement (Std. Dev)

Absolute Value repeatability: ~1.6uVThis is the repeatability of any code(X)It contributes to offset error

Relative Value repeatability: ~1.0uVThis is repeatability of difference between consecutive codes [code(X) - code(X-1)]It contributes to linearity error

2006.6.30. 5 제 7 회테스트학술대회

Can we use PVeM to test 60uV LSB?

What if we spot cal the Gain and Offset Error of measurement using HP 3458A?

Pre-Gain Resolution

= 156uV / (Loop Gain =100)

= 1.56uV

0.03% = ~25 DUT LSBs

1.6 mV = ~25 DUT LSBs

PVeM Spec without Focused Calibration

2006.6.30. 6 제 7 회테스트학술대회

Basic Principle of PVeMMagnify the Voltage Error

DUT Output Range

NOT ENOUGH RESOLUTION Meter

Range

2006.6.30. 7 제 7 회테스트학술대회

PVeM Functional Block

Differential VoltmeterReference connected to Ultra-Precision Voltage Source (UPVS) Loop Gain of 100 on Error Voltage (Input Voltage minus Pedestal voltage)

2006.6.30. 8 제 7 회테스트학술대회

PVeM Block Diagram

2006.6.30. 9 제 7 회테스트학술대회

DAC

Calibrate the loop gain Calibrate the pedestal level

Testing the DAC

2006.6.30. 10 제 7 회테스트학술대회

DIB

x100METER-

+ PMO(HP 3458A)

DUTVREFCalibrationTest

PVeM

CH1: DUT Reference

Source

CH2: Calibration

Source

CH3: PVM

2006.6.30. 11 제 7 회테스트학술대회

Spot Calibration of POOL

Spot calibrated PVM Output

Un-

calib

rate

d P

VM

Inpu

t

Vsrc0.05

Vsrc0.10

Vsrc4.00

Vsrc4.05

4.1V

0V 4.1V

50mVGain Error0.05 ,Offset Error0.05

Gain Error0.10, Offset Error0.10

Gain Error4.00, Offset Error4.00

Gain Error4.05, Offset Error4.05

2006.6.30. 12 제 7 회테스트학술대회

Calibration

Linear Calibration Model:

VOUT = VPVM x G + OE

Calibrated using PMO (HP 3458A)at 50 mV interval

Notations:G = Gain ErrorOE = Offset Error VPVM = PVM MeasurementVOUT = HP 3458A Measurement

2006.6.30. 13 제 7 회테스트학술대회

End-Point Algorithm

VCAL

Un-calibrated PVM Measurement

Vout2

Vout1

Vm1 Vm2

HP

3458

A m

easu

rem

ent

2006.6.30. 14 제 7 회테스트학술대회

Calibration Error

G' Vm–VoutOE'

)Vm – (Vm

)Vout – (Vout G'

11

21

21

×=

=

E G Vm- OE OEGGG

1'

'

Δ+Δ×=

Δ+=

If Gain Error Estimate G is off by ΔG from true Gain Error G’, then the Offset Error Estimate OE is off by (ΔOE = V * ΔG) from true Offset Error

Use best-fit line to minimize error

Larger error in Offset Error at higher Pedestal Level

2006.6.30. 15 제 7 회테스트학술대회

Best-Fit Algorithm

Un-calibrated PVM Measurement

VCAL

VCAL + 25mV

VCAL - 25mV

Vm - 25mV Vm + 25mV

Algorithm:•Best-Fit line to estimate Gain and Offset Error

•9-points used for calibration

Pedestal Voltage of POOL PVM set to VCAL levels quantized at 50mV steps.

Gain and Offset Error for each VCAL level is calculated, and applied to measurement made at that Pedestal = VCAL level

Calibration Time w/16.67ms Aperture: 190 seconds

HP

3458

A m

easu

rem

ent

2006.6.30. 16 제 7 회테스트학술대회

Best-Fit Line

( ) ( )

( )

( ) X(i)X(i)

X(i) Offset - Y(i)X(i)= Gain

X(i)X(i) N - X(i) X(i)

X(i)X(i) Y(i) - X(i) Y(i)X(i)=Offset

OffsetGainX(i)Y(i)

i

ii

iii

iiii

∑∑∑

∑∑∑

∑∑∑∑

×

××

⎟⎠

⎞⎜⎝

⎛ ××⎟⎠

⎞⎜⎝

⎛×⎟⎠

⎞⎜⎝

⎛

××××

+×=

2006.6.30. 17 제 7 회테스트학술대회

Calibration: Long-Term Accuracy

Calibrated PVM Measurement Error

y = -1.4705E-08x + 2.7199E-06

-4.00E-06

-2.00E-06

0.00E+00

2.00E-06

4.00E-06

6.00E-06

8.00E-06

1.00E-05

1.20E-05

1.40E-05

0 5 10 15 20 25

Time (hours)

Erro

r fro

m P

MO

(V)

pvm_cal error meanLinear (pvm_cal error mean)

Note: 2V measured in 5 minute interval.

2006.6.30. 18 제 7 회테스트학술대회

Linearity Algorithm

Test subset of codes {…, N, N+1, …} where N is algorithmically determined.Calculate the reference required to test code N as

Ref level = DUT_VREF / 65536 * N

Quantize Ref Level to closest 50mV step and program Pedestal Voltage of PVM to same value.

2006.6.30. 19 제 7 회테스트학술대회

Linearity Algorithm

Obtain Output Value for tested code as

Calibrated Output = (PVM Output) X (Gain Error) + (Offset Error)

2006.6.30. 20 제 7 회테스트학술대회

Linearity Algorithm

0 65535Code

Out

put

Calibrated Output

Best-Fit Ideal Line

INL

Max. INL Code

DNL

Max. DNL Code

2006.6.30. 21 제 7 회테스트학술대회

Comparison- Absolute and Calibrated Measurement

INL and DNL was calculated for all codes.Simultaneous measurements were taken using HP 3458A and POOL PVM for each code

aperture of 1 power line cycle

2006.6.30. 22 제 7 회테스트학술대회

D N L PM O

Sa m p les0 5k 10k 15k 20k 25k 30k 35k 40k 45k 50k

-0 .45

-0.4

-0 .35

-0.3

-0 .25

-0.2

-0 .15

-0.1

-0 .05

0

0 .05

0.1

0 .15

0.2

0 .25

0.3

0 .35

All Code DNL Test result of HP3458 and PVM

Pink: 3458A: White: POOL PVM w/Cal

2006.6.30. 23 제 7 회테스트학술대회

All Code INL Test result of HP3458 and PVMINL PM0

Samp le s5k 10k 15k 20k 25k 30k 35k 40k 45k 50k 55k 60k

-1

-0.9

-0.8

-0.7

-0.6

-0.5

-0.4

-0.3

-0.2

-0.1

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

Pink: 3458A: White: POOL PVM w/Cal

2006.6.30. 24 제 7 회테스트학술대회

INL for reduced code-set(2) - INL

Samples0 10 20 30 40 50 60 70 80 90 100 110 120 130

-0.3

-0.25

-0.2

-0.15

-0.1

-0.05

0

0.05

0.1

0.15

0.2

0.25

0.3

Pink: 3458A: White: POOL PVM w/Cal

2006.6.30. 25 제 7 회테스트학술대회

INL & DNL Performance: using POOL

D N L P V M

S a m p le s0 5 k 10 k 1 5k 20 k 2 5k 30 k 3 5k 40 k 45 k 50 k

-0 .5

-0 .4

-0 .3

-0 .2

-0 .1

0

0 .1

0 .2

0 .3

0 .4

IN L P VM

Sam p les5k 10k 15k 20k 25k 30k 35k 40k 45k 50k 55k 60k 65k

-0 .4

-0 .2

0

0 .2

0 .4

0 .6

2006.6.30. 26 제 7 회테스트학술대회

Repeatability

Site 1Unit M ean M edian M inim um M axim um Std Dev

DN L_m in PVM -0.243 -0.227 -0.416 -0.192 0.051DN L_m ax PVM 0 .238 0.233 0.185 0.399 0.040INL_m in PVM -0.359 -0.360 -0.436 -0.273 0.038INL_m ax PVM 0 .497 0.495 0.344 0.595 0.057LSB uV 62.502 62.502 62.502 62.502 0.000

Target repeatability of 0.05 LSB as obtained using HP 3458A with 1 Power Line Cycle Aperture (= 16.67ms).

Obtained with 1ms capture on POOL PVM

2006.6.30. 27 제 7 회테스트학술대회

Test Time

Number of tested codes: 400

Single-site : 1.79 sTest time/code = 4.5 ms

Dual-site : 1.92 sParallel Efficiency : 93%

DUT Settling Time 1 ms/code

2006.6.30. 28 제 7 회테스트학술대회

Additional Notes

If aperture time is increased by a factor of N, the error in measurement decreases by the square root of N.

For example, if 5 power line cycles are used, which results in a 5 minute calibration time (compared to 3 minutes), it decreases the error in calibration coefficients by a factor of approximately 2.2.

2006.6.30. 29 제 7 회테스트학술대회

Conclusion

PVeM (Precision Voltage error Magnifying) Technique is working for testing precision 16-bit DACs.Throughput Advantage

6x throughput advantage over direct HP3458A measurement.Muti-parallel test is available using POOL option