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  • 7/28/2019 IJEIT1412201212_22

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    ISSN: 2277-3754ISO 9001:2008 Certified

    International Journal of Engineering and Innovative Technology (IJEIT)

    Volume 2, Issue 6, October 2012

    125

    Abstract LTE (Long Term Evolution) is the upcomingstandards towards 4G, which is designed to increase the capacityand throughput performance when compared to UMTS andWiMax. Turbo codes are the recent development in the area offorward error correction codes that achieve near-Shannon limitperformance.This codes have been successfully implemented insatellite and video conferencing systems and provision has beenmade in 3rd generation mobile systems. The decoder systems arecompared for complexity as well as for equal numbers ofiterations. The following figure shows the bit error rateperformance of the parallel concatenated coding scheme in anAWGN channel over a range of Eb/No values for two sets of code

    block lengths and number of decoding iterations. Results showthat less complex decoder strategies produce good results for voicequality bit error rates.

    Index Terms Convolutional Interleaver, Turbo encoder

    Turbo decoder, MAP decoder, 3GPP LTE.

    I.INTRODUCTION

    Long Term Evolution [1] has long been seen as the first

    advancement towards stronger, faster and more efficient 4G

    data networks. The technology under LTE can currently reach

    downlink peak rates of 100Mbps and uplink speeds of

    50Mbit/s. The LTE technology is also a scalable bandwidth

    technology for carriers operating anywhere from 20 MHz

    town to 1.4 MHz. Long Term Evolution offers some excellent

    advantages over current 3G systems including higher

    throughput, plug and play compatibility, FDD (Frequency

    Division Duplexing) and TDD (Time Division Duplexing),

    low latency and lower operating expenditures. It also offers

    legacy modes to support devices operating on GPRS systems,

    while supporting seamless pass-through of technologies

    operating on other older cellular towers. The authors of the

    (Global system for mobile communications) and UMTS

    (Universal Mobile Telecommunications System). The

    technologies put forth by LTE will not only be implemented

    over time, they are designed to be scalable. This scalability

    means the company can slowly introduce LTE technologies

    over time, without disrupting current services.

    Table I. Lte Performance Requirements [5].

    Metric Requirements

    Spectral Flexibility 1.4, 3, 5, 10, 15 and 20 MHz

    Peak data rate 1. Downlink (2 Ch MIMO): 100 Mbps

    2. Uplink (Single Ch Tx): 50 Mbps (20

    MHz ch)

    Supported antennaconfigurations.

    1. Downlink: 4x2, 2x2, 1x2, 1x12. Uplink: 1x2, 1x1

    Spectrum efficiency 1. Downlink: 3 to 4 times HSDPA Rel. 6

    2. Uplink: 2 to 3 times HSUPA Rel. 6

    Latency 1. Control-plane: Less than 100 msec to

    establish U-plane

    2. User-plane: Less than 10 msec from UE

    to Server

    Mobility 1. Optimized for low speeds (0-15 km/hr)

    2. High performance at speeds up to 120

    km/hr

    3. Maintain link at speeds up to 350 km/hr

    Coverage 1. Full performance up to 5 km

    2. Slight degradation 5 km30 km

    3. Operation up to 100 km should not be

    precluded by standard

    II. TURBO CODES

    Turbo codes were first introduced in 1993 by Berrou,

    Glavieux, and Thitimajshima, [2] where a scheme is

    described that achieves a bit-error probability of 10-5 using a

    rate 1/2 code over an additive white Gaussian noise (AWGN)

    channel and BPSK modulation at an Eb/N0 of 0.7 dB. The

    codes are constructed by using two or more component codes

    on different interleaved versions of the same information

    sequence. Turbo codes are a high performance forward error

    correction at a given code rate. These codes are especially

    used in deep space satellite communication and the

    application, which requires reliable transformation of

    information over the communication links in the presence of

    data corrupting noise. At present, these codes are competing

    with Low Density Parity Check (LDPC) codes, which

    produce similar performance. Turbo code implementation is

    by a parallel concatenation of two recursive systematic

    convolutional encoder codes depend on pseudo-random

    permutation (the interleaver). The encoder performs a long bit

    information frame. The interleaver to produce permuted

    frame interleaves this input bit. The first encoder RSC1

    encodes the original input and the interleaved frame

    (permuted frame) is encoded by RSC2. Then the two encoded

    bits are merged together with the real input bits to produce the

    output.

    III.FUNDAMENTALTURBOCODES

    The fundamental turbo code encoder is built using two

    identical recursive systematic convolutional (RSC) codes

    with parallel concatenation [3] as shown in Figure 1. An RSC

    encoder is typically a rate 1/2 encoder and is termed a

    constituent encoder. The input to the second constituent

    encoder is interleaved using an internal turbo codeinterleaver. Only one of the systematic outputs from the two

    component encoders is used. This is because the systematic

    Performance of Turbo Encoder and Turbo

    Decoder for LTEPatel Sneha Bhanubhai, Mary Grace Shajan, Upena D. Dalal

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    ISSN: 2277-3754ISO 9001:2008 Certified

    International Journal of Engineering and Innovative Technology (IJEIT)

    Volume 2, Issue 6, October 2012

    126

    output from the other component encoder is just a permuted

    version of the chosen systematic output.

    Fig 1: Turbo Code Encoder [3]

    Fig 2: Conventional Convolution Encoder and Equivalent RSC

    Encoder [3]

    IV.MATH

    A conventional convolution encoder shown in [Fig. 2] is

    represented by the generator sequences

    g0(D) = 1+D2+D3 andg1(D) = 1+D+D3..(1)

    It can equivalently be represented in a more compact form as

    G = [g0(D),g1(D)].(2)

    The RSC encoder of this conventional convolutional encoder

    is represented as

    G(D) =[1,g1(D)/g0(D)]..(3)

    where the first output represented byg0(D) is fed back to the

    input. In the above representation, 1 denotes the systematic

    output, g1(D) denotes the feed-forward output and g0(D) is

    the feedback to the input of the RSC encoder.

    V.CHANNELCODINGSCHEMEINLTEThe major channel coding schemes [3] used for different

    transport channels in the LTE system are summarized in

    Figure 3. The turbo coding is used for large data packets,

    which is the case for downlink and uplink data transmission,

    paging and broadcast multicast (MBMS) transmissions. A

    rate 1/3 tail biting convolutional coding is used for downlink

    control and uplink control as well as broadcast control

    channel (BCH).

    Fig 3: Channel Coding Schemes in the LTE System [3].

    VI.TURBODECODERSTRUCTURE

    The basic structure of a Turbo decoder is functionally

    illustrated in Fig.2. A turbo decoder consists of two maximum

    a posteriori (MAP) decoders separated by an interleaver that

    permutes the input sequence. The decoding is an iterative

    process in which the so-called extrinsic information is

    exchanged between MAP decoders. Each Turbo iteration isdivided in to two half iterations. During the first half iteration,

    MAP decoder 1 is enabled. It receives the soft channel

    information (soft valueLs for the systematic bit and soft value

    Lp1 for the parity bit) and the a priori information La1 from

    the other constituent MAP decoder through deinterleaving to

    generate the extrinsic informationLe1 at its output. Likewise,

    during the second half iteration, MAP decoder 2 is enabled,

    and it receives the soft channel information (soft valueLs for a

    permuted version of the systematic bit and soft valueLp 2 for

    the parity bit) and the a priori information La2 from MAP

    decoder1 through interleaving to generate the extrinsic

    informationLe2 at its output. This iterative process repeatsuntil the decoding has converged or the maximum number of

    iterations has been reached.

    Turbo Coding

    (1/3)

    DL-SCH

    PCH

    MCH

    Tail biting

    Convolutional

    Coding (1/3)

    BCH

    DCI

    UCIBlock Code w/

    variable Rate

    Block Code 1/16 CFI

    RSC encoder 1

    Xk

    Zk

    Turbo code

    internal interleaver RSC encoder 2 Zk

    Ck

    UL-SCH

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    ISSN: 2277-3754ISO 9001:2008 Certified

    International Journal of Engineering and Innovative Technology (IJEIT)

    Volume 2, Issue 6, October 2012

    127

    Fig 4: Basic Structure of an Iterative Turbo Decoder [4].

    VII. CONVOLUTIONALINTERLEAVER

    A convolutional interleaver consists of N rows of shift

    registers, with different delay in each row. In general, each

    successive row has a delay which is J symbols duration higher

    than the previous row as shown in Fig. 5. The code word

    symbol from the encoder is fed into the array of shift registers,

    one code symbol to each row. With each new code word

    symbol the commutator switches to a new register and the new

    code symbol is shifted out to the channel. The i-th (1 i

    N-1) shift register has a length of (i-1)J stages where J = M/N

    and the last row has M-1 numbers of delay elements.

    Fig 5: Convolutional Interleaver [4]

    The convolutional deinterleaver performs the inverseoperation of the interleaver and differs in structure of the

    arrangement of delay elements. Zeroth row of interleaver

    becomes the N-1 row in the deinterleaver. 1st row of the

    former becomes N-2 row of later and so on.

    Fig 6: Block diagram of 8 bit convolution interleaver [4].

    In order to verify the Verilog HDL models for the

    interleaver and deinterleaver the authors have developed

    another top level Verilog HDL model, combining interleaver

    and deinterleaver [8]. The scrambled code words from the

    output of the interleaver is applied as input to thedeinterleaver block along with clock as synchronization

    signal. It is observed in Fig 4 that the scrambled code word is

    converted into its original form at the output of the

    deinterleaver block.

    VIII.SOFTWAREMODEL

    Fig 7: Parallel Concatenated Convolutional coding: Turbo

    codes [7]

    Table II. RESULTS

    Block

    length

    512 BER-1024 BER-2048

    Eb/No BER

    0 0.4825 0.4875 0.4906

    3 0.4757 0.4829 0.4879

    6 0.4655 0.4765 0.4829

    9 0.4519 0.4668 0.4755

    12 0.4327 0.4517 0.4657

    [A]. Turbo Encoder Software Model

    [B]. Turbo Decoder Software Model

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    ISSN: 2277-3754ISO 9001:2008 Certified

    International Journal of Engineering and Innovative Technology (IJEIT)

    Volume 2, Issue 6, October 2012

    128

    Fig 8: The plot of BER along Y-axis and SNR along X-axis.

    VIII.CONCLUSION

    The decoding performance improves with an increase in

    the block lengths. For larger block lengths the BER is found to

    be less for a given value of Eb/No .Here the computation time

    varies as the number of samples per frame increases; these

    cases also provide the BER of order 10-3

    .

    REFERENCES[1] ERICSSON press backgrounder on mobile broadband and

    LTE February 2011 http:/www.3gpp.org/LTE[2] Barnard Sklar Fundamental and Application Second

    Edition (Prentice-Hall, 2001, ISBN 0-13-084788-7).

    [3] Farooq Khan,Samsung Telecommunications America. LTEfor 4G Mobile Broadband http://www.cambridge.org

    [4] Manjunatha K N, Kiran B, Prasanna Kumar.C/ Design andASIC Implementation of a 3GPP LTE- Advance Turbo

    Encoder and Turbo Decoder International Journal of

    Engineering Research and Applications (IJERA) ISSN:

    2248-9622 www.ijera.com Vol. 2, Issue 4, July-August 2012,

    pp.006-010.

    [5] S M Chadchan ,Member IEEE and C. B.Akki 3GPPLTE/SAE International Journal of computer and Electricalengineering Vol 2,NO 5 October, 2010.

    [6] 3GPP TS 36.212 version 9.2.0: Evolved Universal TerrestrialRadio Access (E-UTRA); Multiplexing and channel coding,

    May 2010 http:/www.3gpp.org

    [7] Copyright 2010 The mathworks, Inc.Published [email protected] www.mathworks.com/trademarks.

    AUTHORS PROFILE

    Patel Sneha B.received BE in Electronicsand communication from Charotar Institute

    of Technology, Changa.Currently she is

    studying ME EC at Parul Institute of

    Technology, Baroda in Gujarat Technology

    University.

    Mary Grace Shajan Reader in Electronics and

    communications, Parul Institute of

    Engineering and Technology, Completed

    Under graduation in Electronics from M.S

    University Baroda in 1985. Post graduation

    in Electronics and Communications from

    Dharmsinh Desai Institute of Technology

    Nadiad in 2004. Professional Experience of

    26 Years in the field of Communications

    Area of Wireless Communication.

    Dr. Upena D. Dalal, M. E (EC and Comm.

    Systems) and Ph.D. in Wireless

    Communication at National Institute of

    Technology Surat. Currently she is anAssociate Professor in Electronics

    Department at Sardar Vallabhbhai National

    Institute of Technology, Surat.

    mailto:[email protected]:[email protected]