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Linearity Enhancement Algorithms for I-Q Signal Generation

- DWA and Self-Calibration Techniques -

M. Murakami H. Kobayashi

S. N. B. Mohyar T. Miki O. Kobayashi

Gunma University STARC

B6-1 10:15-10:45 Nov. 6, 2015 (Fri)

Invited paper

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Outline

● Research Background

● Complex Multi-BP ΔΣ DA Modulator

● DWA Algorithm

- Conventional Algorithm

- Proposed Algorithm

● Self-Calibration

● Conclusion

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Outline

● Research Background

● Complex Multi-BP ΔΣ DA Modulator

● DWA Algorithm

- Conventional Algorithm

- Proposed Algorithm

● Self-Calibration

● Conclusion

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Necessity of I,Q signal

RF analog front-end of Receiver IC

Need testing!

mixer

RF In-phase

Quadrature-phase

•••

•••

DSP ADC

cos(ωLOt)

-sin(ωLOt)

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Research Goal

Demand for low cost testing of communication IC

High quality I,Q test signal generation for receiver IC

with

Low cost ￥

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③ Digital centric（2）

I,Q Signal Generation

① Analog centric

② Digital centric（1）

DSP

DSP

DSP

10〜14 bit

1〜3 bit

1〜3 bit

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① Analog Centric

Steep analog filters

and

Large Nyquist-rate DACs

DSP Nyquist DAC

10〜14 bit

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Delta Sigma DA Converter

signal

noise

signal

noise

signal

② 2 real-BP ΔΣ DACs

1〜3 bit DAC

Digital centric

• Digital modulator • 1~3 bit DAC • Oversampling

Delta Sigma

Relaxes analog filters

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Delta Sigma DA Converter

signal

noise

signal

noise

signal

② 2 real-BP ΔΣ DACs

1〜3 bit DAC

Digital centric

Unused band Signal band

• Digital modulator • 1~3 bit DAC • Oversampling

Relaxes analog filters

Delta Sigma

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Delta Sigma DA Converter

signal

noise

1〜3 bit DAC

signal

noise

signal

noise

signal

1〜3 bit DAC

② 2 real-BP ΔΣ DACs

③ 1 complex-BP ΔΣ DAC

Real vs Complex

Signal band

Unused band Signal band

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Complex Delta Sigma is Superior

Wide band, High SNR

signal

noise

1〜3 bit DAC

signal

noise

signal

noise

signal

1〜3 bit DAC

② 2 real-BP ΔΣ DACs

③ 1 complex-BP ΔΣ DAC

Real vs Complex

Get

Wasted

signal

noise

signal

1〜3 bit DAC

② 2 real-BP ΔΣ DACs

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Complex Delta Sigma is Superior

High quality I,Q signals

signal

noise

signal

noise

signal

noise

signal

15dB better SNDR for complex BP ΔΣ modulator

Real

Complex

SNDR | Signal to Noise and Distortion Ratio

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Complex Signal

Complex signal processing is NOT complex. (K.Martin)

Real signal Iin Qin

Complex signal Iin + jQin j = √-1

,

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I,Q Signal Generation

DSP, DAC

＋

ΔΣ

＋

Complex ＝

Low cost, high quality signal !

Digital rich !

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Outline

● Research Background

● Complex Multi-BP ΔΣ DA Modulator

● DWA Algorithm

- Conventional Algorithm

- Proposed Algorithm

● Self-Calibration

● Conclusion

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Principle of Complex BP Noise Shape

Power

ω

Complex resonator

Quantization noises

Signal Transfer Function = 1

Noise Transfer Function = 0

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Principle of Complex BP Noise Shape

1

Power

ω

0

Complex resonator

Quantization noises

Signal Transfer Function = 1

Noise Transfer Function = 0

18 /55 2nd-order Complex Multi-BP ΔΣ DAC

Output spectrum

Single-band Multi-band

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Necessity of Multi-Tone Signal

✓ Mixer ✓ Up/Down converter ✓ Radio communication system , etc.

Linearity testing

of

Noise Power Ratio （NPR）

Multi-tone signal

ω

DUT Input Output

Distortion by DUT NPR

ω

DUT：Device Under Test

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Necessity of Multi-tone Signal

Multi-tone signal

Need!

ω

DUT Input Output

Distortion by DUT NPR

ω

DUT：Device Under Test

✓ Mixer ✓ Up/Down Converter ✓ Radio communication system etc...

Noise Power Ratio （NPR）

of

Linearity testing

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Complex Resonator

Output spectrum

Pow

er

ωin / ωs -0.5 0.5

pole pole pole pole

-0.5 0.5 ωin / ωs

pole

Single-band Multi-band

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Complex Resonator

Output spectrum

Pow

er

ωin / ωs -0.5 0.5

pole pole pole pole

-0.5 0.5 ωin / ωs

pole

Single-band Multi-band

Asymmetric Asymmetric

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Outline

● Research Background

● Complex Multi-BP ΔΣ DA Modulator

● DWA Algorithm

- Conventional Algorithm

- Proposed Algorithm

● Self-Calibration

● Conclusion

DWA: Data Weighted Averaging

One of Data Element Matching (DEM) algorithms

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Multi-bit DA modulator

Multi-bit DA modulator（2~3bit）

Quantization noise reduction Linearity degradation

1bit

Multi-bit

Error

Down

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Multi-bit DAC

Normal unary DAC

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Multi-bit DAC

Accumulate mismatch of particular cell

Normal unary DAC

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Multi-bit DAC ＋ DWA

DWA* DAC *Data Weighted Averaging ｜Select the element with DSP algorithm

Memorize next cell selection start point

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DWA ＝ ΔΣ

DAC Pointer

Input Output

Equivalent circuit for implementation Memorize next cell selection start point

z - 1

DAC Output

z - 1

Input

δ Non-Linearity

Can’t be realized directly

Integration Differentiation

δ affected by only Differentiation

δ

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Effect of DWA

Normal DWA

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Signal Band

zero point at DC

COMPLEX

REAL

ωin / ωs

LowPass

High Pass

Asymmetry with respect to ω=0.

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Type of DWA

① ② ③

①

②

③

DWA ＝

DSP algorithm

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Outline

● Research Background

● Complex Multi-BP ΔΣ DA Modulator

● DWA Algorithm

- Conventional Algorithm

- Proposed Algorithm

● Self-Calibration

● Conclusion

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Equivalent Circuit of Complex DWA

δI

z - N

DAC1

DAC2

z - N

z - N

z - N δQ

Iin

Qin

Iout

Qout

Complex resonance

Complex notch

+

+

δI , δQ affected by only complex notch

Can’t be realized directly

DAC input can be ∞

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Equivalent Circuit Implementation

✦ Attach pointers ✦ Exchange upper-path and lower-path every N clock

Complex DWA is realized.

Iin

Qin

Iout

Qout

35 /55 Complex Multi-Bandpass DWA Algorithm

DAC2 （HP operation） DAC１ （LP operation）

DA

C Inp

ut

DA

C Inp

ut Iin Qin I0 I1 I2 I3 I4 I5 I6 I7

4 2

3 2

2 6

2 1

6 7

1 5

7 4

5 3

Iin Qin I0 I1 I2 I3 I4 I5 I6 I7

4 2

3 2

2 6

2 1

6 7

1 5

7 4

5 3

N = 4（four zero points）

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37 /55 Simulation Result ~Actual Non-Linear DAC~

δI

δQ

Notches filled with noise

38 /55 Simulation Result ~Actual Non-Linear DAC ＋ DWA~

DWA

δI

δQ

Notches filled with noise

39 /55 Simulation Result ~Actual Non-Linear DAC ＋ DWA~

DWA

δI

δQ

DWA

Steep Notches Notches filled with noise

DWA

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N (number of notches)

N increases SNDR decreases

Simulation Result ~Actual Non-Linear DAC ＋ DWA~

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Outline

● Research Background

● Complex Multi-BP ΔΣ DA Modulator

● DWA Algorithm

- Conventional Algorithm

- Proposed Algorithm

● Self-Calibration

● Conclusion

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Look Up Table

Cat Age Human Age

1 20

2 27

3 33

4 39

5 45

6 50

7 55

8 60

Example

LUT 3 33

Memory

address data

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Look Up Table

Cat Age Human Age

1 20

2 27

3 33

4 39

5 45

6 50

7 55

8 60

Example

LUT 7 55

Memory

address data

44 /55 DAC Nonlinearity Measurement Results are stored in LUTs

ΔΣADC inside SoC

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ΔΣ DAC with Self-Calibration of DAC1, DAC2

CLK(1)

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ΔΣ DAC with Self-Calibration of DAC1, DAC2

CLK(2)

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ΔΣ DAC with Self-Calibration of DAC1, DAC2

CLK(3)

48 /55 Simulation Conditions : DAC Unit Cell Variation

DAC1

DAC2

＋

＋ ＋

＋

2

2

0.96

0.97

0.99

1.00

1.01

1.03

1.04

I0 I1 I2 I3 I4 I5 I6 I7

DAC 1 DAC 2

Current Amount of Each Unit Cell

Standard deviation 1.0%

DAC1 Total Current ：7.98

DAC2 Total Current：7.96

Nonlinearity

Nonlinearity

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Simulation Results Simulation Conditions ① ② ③

δ=1.0% δ=0.9% δ=0.7%

δ=0.5% δ=0.3% δ=0.1%

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Simulation Results Simulation Conditions ① ② ③

δ=1.0% δ=0.9% δ=0.7%

δ=0.5% δ=0.3% δ=0.1%

When DAC nonlinearity is large, self-calibration （③) is more effective than DWA（②）.

51 /55 Pros and Cons of Self-Calibration

Pros

Cons

DWA Self-Calibration

DAC Nonlinearity Noise Shaping Specific Bands All Bands

● DAC nonlinearity measurement withΔΣ ADC inside SoC is required. ● Digital modulator circuit size becomes large (due to 2 LUTs and fixed-point (instead of integer) arithmetics.

● Better SNDR than DWA is obtained.

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Further Applications

𝑌 = cos 𝜔𝑖𝑛𝑡 ⋅ cos 𝜔𝑐𝑡 − sin 𝜔𝑖𝑛𝑡 ⋅ sin 𝜔𝑐𝑡 = cos(𝜔𝑖𝑛+𝜔𝑐)𝑡.

● High frequency signal generation

● Sine wave generation with fine time shift ● Image rejection ratio measurement

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Outline

● Research Background

● Complex Multi-BP ΔΣ DA Modulator

● DWA Algorithm

- Conventional Algorithm

- Proposed Algorithm

● Self-Calibration

● Conclusion

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Conclusion

‣ I,Q signal generation with digital centric for communication IC.

‣ Complex multi-BP ΔΣ DAC

‣ Multi-bit DAC

◎ Relaxes the analog filter requirements

× Degrades system linearity

DWA algorithm Self-calibration algorithm

Low cost, high quality I,Q signal generation.

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Final Statement

Thank you for your kind attention

謝 謝

Signal processing algorithms can enhance analog circuit performance.