High-Speed Serial Interface Circuits and Systems

Woo-Young Choi

Dept. of Electrical and Electronic Engineering

Yonsei University

Lecture 1: Introduction

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● Goals

● Prerequisite

Broad perspectives for datacom wireline connectivity

● Lecturer: Prof. Woo-Young Choi (최우영) 연세대학교 전기전자공학과wchoi@yonsei.ac.kr

Introduction to basics of high-speed serial interface circuits and systems

Design exercises for high-speed serial interface circuits

Basic knowledge of electronic engineering especially CMOS circuit design

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High-Speed Serial Interface

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Interfaces inside Desktop Computers

PCH: Platform Controller Hub

DMI: Direct Media Interface

Interface between CPU and PCH

DDR: Double Data Rate

PCIe:

PCIe 3.0:

Peripheral Component Interconnect Express

7.877Gb/s per lane with 128/130 bit coding

8GT/s per lane, total 16 lanes

DDR4: 3.2GT/s (25.6Gb/s per module)

Interface for video card, network card, etc

USB: Universal Serial Bus

USB 2.0 : 480 Mb/sSATA: Serial Advanced Technology Attachment

SATA 3.0: 6 Gb/s

SATA 3.2: 16 Gb/s

PCIe 4.0: 16GT/s PCIe 5.0: 32GT/s

USB 3.0: 5 Gb/s, (3.1 10 Gb/s, 3.2 20 20Gb/s)

USB 4: 40 Gb/s

DDR5: 6.0GT/s or higher

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Interfaces inside Smartphone

mipi: Mobile Industry Processor Interface

D-PHY: 80Mbs to 1Gbps, no symbol coding, no CDRM-PHY: up to 5Gbps, 8B10B, CDR

LLI: Low Latency Interface SSIC: Super Speed InterChipUniPort: Unified Protocol

UFS: Universal Flash StorageDigRF: Digital RF

DSI: Display Serial InterfaceCSI: Camera Serial Interface

SLIMBus: Serial Low-Power Inter-Chip Media Bus

SPMI: System Power Management Interface

BIF: Battery Interface

GBT: Giga Bit Trace

RFFE: RF Front-End

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Interface for Display

Higher Resolution and More Data - 8K UHD in 2018(7680x4320)

- HDMI 2.1 12 Gbps x 4 lanes = 48 Gbps

( 3 colors/pixel x 10-16 bits for color depth x 60,120 fps)

Tens of Gbps

- 10K UHD(10240x4320)

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Interfaces inside Data Centers

Cloud Computing/Service

Data Center

Largest Data Center: Switch SuperNAP3.5 million sq foot ( 축구장 약 45개)

> 100,000 servers

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Interfaces inside Data Centers

Several standards exist: IEEE 802.3

OIF-CEI (Optical Internetworking Forum – Common Electrical Interface)

(Ethernet)

Fiber Channel

InfiniBand

Ethernet: 400G AUI-16, 26.5625 Gb/s NRZ x 16, Max 10cm (AUI: Attachment Unit Interface

OIF-CEI: CEI-56G-VSR-NRZ, (VSR: Very Short Reach)

Fiber Channel: 256GFC*, 29.027 GBaud/s, PAM4, 4 lanes,

InfiniBand: 200G HDR, 26.5625 GBaud/s, PAM4, 4 lanes,

Getting faster and faster Driving force for IT industry growth

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Super Computer (High-Performance Computing)

IBM Summit (Oak Ridge National Lab in US)

( www.top500.org )

Interfaces inside High-Performance Computing

#2 HPC in the world with 148.6 Peta Flop/s

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IBM Summit

- 4,608 computing nodes, each with 2 CPUs and 6 GPUs

- About 300km of optical fiber

High computing performance with parallel processing

Connectivity extremely important

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Channel

Channel

DATAN

CLK

Channel

Channel

DATA1

DATA2

Tx Rx

N+1 pins!

Sampler

Sampler

Sampler

– Pin count / package / PCB wiring constraint

– Skew

High-Speed Serial Interface

Parallel interface possible

Send only data / Recover clock at Rx

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High-Speed Serial Interface

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Key Block Diagram

SerializerTx

DriverRx

EqualizerSampler

ClockRecovery

Deserializer

PLL

Channel

Tx Rx

12

n

12n …

12

n

- High-speed interface- High-speed digital I/O - High-speed serdes (Serializer/Deserializer)

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Progress of High-Speed Serial Interface ICs

(From “Through the Looking Glass-2020 Edition: Trends in Solid-State Circuits ",IEEE Solid-Sate Circuits Magazine, 2020)

Data Rate for Various Standards Published Transceiver Data Rates

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● Classes (Blended)

● Evaluation

- 출석(40%)- Design Exercise Homework (40%),- Design Projects (20%)

- Wed. (90 mins): Pre-recorded ppt presentation (voice) on YSCEC

Attendance check by homework uploaded to YSCEC before Monday class

- Mon. (90 mins): Real-time design exercise on Zoom ( 2:00 ~ 3:30)

Students should have access to his/her own PC with YONSEI IP address

Accounts will be set up for students on a server so that CADENCEcan be used during Zoom session

Email your YONSEI IP address to 김현규 (hkkim314121@gmail.com)by the end of Thursday

Design exercise classes have homework due Wednesday