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Lecture 8 Galileo Peripheral: PCI, WiFi, and JTAG 學生: 吳雅就、詹士賢、邱逸祥 指導老師: 范倫達、曾煜棋 國立交通大學 資訊工程學系 Spring, 2016

Lecture 8 Galileo Peripheral: PCI, WiFi, and JTAGviplab.cs.nctu.edu.tw/course/DSD2016_Spring/DSD_Lecture_08.pdf · Intel® Galileo Board is the first Arduino board to provide a mini

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Lecture 8 Galileo Peripheral: PCI, WiFi,

and JTAG

學生: 吳雅就、詹士賢、邱逸祥

指導老師: 范倫達、曾煜棋

國立交通大學 資訊工程學系

Spring, 2016

Lecture 8

Content Relationships

Digital System Design

Embedded System: Edison

DSP System: Adder, Mul, Filter

Computer Architecture

2

Embedded System: Galileo

Lecture 8

Outline

PCI & PCI-e

Mini PCI-e on Galileo

Wi-Fi

JTAG

Source Level Debug on Galileo

Lecture 8

What is PCI?

Peripheral Component Interconnect

Created by Intel in 1990

A local computer bus for attaching hardware devices

(ex. Network card, sound card, extra ports…)

Lecture 8

Hardware Specifications

33.33 MHz clock with synchronous transfers

Peak transfer rate of 133 MB/s for 32-bit bus width

32- or 64-bit memory address space

32-bit I/O port space

5-volt signaling

Lecture 8

32-bit & 64-bit PCI

Lecture 8

Timeline

1992 PCI Intel

1996 AGP Intel

1998 PCI-X IBM, HP, Compaq

2004 PCI Express Intel, Dell, HP, IBM

Lecture 8

PCI Express

Developed by the PCI-SIG

A high-speed serial computer expansion bus

standard designed to replace the older PCI

higher maximum system bus throughput

Can have more power consumption than

conventional PCI

Lecture 8

Version History

Version Per-lane data

rate

16-lane data

rate Transfer rate Year

1.0 250MB/s 4GB/s 2.5GT/s 2002

1.0a 250MB/s 4GB/s 2.5GT/s 2003

1.1 250MB/s 4GB/s 2.5GT/s 2005

2.0 500MB/s 8GB/s 5.0GT/s 2006

2.1 500MB/s 8GB/s 5.0GT/s 2009

3.0 1GB/s 16GB/s 8.0GT/s 2010

4.0 2GB/s 32GB/s 16.0GT/s 2014

Lecture 8

More about PCIe

Lecture 8

PCI on Galileo (Mini PCIe)

based on PCI Express

Most laptop computers after 2005 adopt PCI Express

Intel® Galileo Board is the first Arduino board to

provide a mini PCI Express slot.

Lecture 8

More about Mini PCIe

PCIe x1

USB 2.0

Future extension for another PCIe lane

1.5 and 3.3 volt power

Lecture 8

Application

WiFi

Video card

Video capture card

FPGA

Lecture 8

Wi-Fi

In short, Wi-Fi is a technology that can make you

connect to Internet wirelessly.

The protocol,IEEE802.11, defined Wi-Fi’s MAC Layer

(ex. PCF,DCF…..) and Physical layer (ex. frequency,

modulation….) in 1997.

Has 5 generations until now

Lecture 8

Generation

1st:IEEE802.11

2nd:IEEE802.11b

3rd:IEEE802.11g/a

4th:IEEE802.11n

5th:IEEE802.11ac

Lecture 8

Comparison

IEEE

802.11

IEEE

802.11b

IEEE

802.11g/a

IEEE

802.11n

IEEE

802.11ac

Release Jun 1997 Sep 1999 a:Sep 1999

g:Jun 2003

Oct 2009 Dec 2013

Frequency 2.4GHz 2.4GHz

a:5GHz

g:2.4GHz

2.4GHz or

5GHz

5 GHz

Maximum

Data rate

2Mbps 11Mbps 54Mbps 600Mbps 6.93Gbps

Physical

layer

FHSS

DSSS

DSSS DSSS

OFDM

OFDM

OFDM

range 20~100m 50~100m 50~100m 70~250m

Lecture 8

OFDM

A multi-carrier technique

Apply Fourier Transform and Inverse Fourier

Transform

Lecture 8

Other Application of Wifi

RTLS (Real-time locating system)

Combine RFID and WiFi together to provide accurate

location of objects.

Lecture 8

JTAG

Lecture 8

What is JTAG

Joint Test Action Group (JTAG)

IEEE 1149.1 Standard Test Access Port and

Boundary-Scan Architecture

4/5pins-TDI,TDO,TCK,TMS,TRST(optional)

Be used for IC debug ports

Useful for embedded systems development

Lecture 8

Daisy-chained JTAG

Lecture 8

Boundary Scan

Lecture 8

TAP (test access port)

Controlled by TMS

DR: Data Register

IR: Instruction Register

Lecture 8

Source Level Debug on Galileo

Requirements

Linux host system

Quark-patched OpenOCD

GDB

Eclipse

Quark Kernel compiled with debug symbols

Git

OpenOCD supported JTAG debugger

https://communities.intel.com/docs/DOC-22203

Lecture 8

What the debugger can do?

Remote debug the program on Galileo

Single-steping

Breakpoint

Show the location in the original code when the program

crashes

Lecture 8

References

http://www.intel.com/content/www/us/en/do-it-yourself/galileo-maker-quark-

board.html Introducing the Intel® Galileo Development Board

http://en.wikipedia.org/wiki/Conventional_PCI Conventional PCI

http://en.wikipedia.org/wiki/Accelerated_Graphics_Port AGP

http://en.wikipedia.org/wiki/PCI-X PCI-X

http://en.wikipedia.org/wiki/PCI_Express PCI Express

https://communities.intel.com/message/210246 Video cards compatible with

Intel Galileo?

http://en.wikipedia.org/wiki/Wi-Fi Wi-Fi

http://ironbark.xtelco.com.au/subjects/DC/lectures/22/ Lecture #22 - Wireless

Networking

http://www.ice.rwth-aachen.de/research/algorithms-

projects/entry/detail/techniques-for-uwb-ofdm/ Techniques for UWB-OFDM

Lecture 8

References

http://www.cisco.com/c/en/us/solutions/collateral/service-provider/service-

provider-wi-fi/white_paper_c11-716080.html Challenges of Unlicensed Wi-Fi

Deployments: A Practical Guide for Cable Operators

http://www.malinov.com/Home/sergey-s-blog/intelgalileo-addingwifi Intel Galileo

Meets Wireless

http://www.ekahau.com/real-time-location-system/technology Real-Time

Location System

https://communities.intel.com/docs/DOC-22203 Source Level Debug using

OpenOCD/GDB/Eclipse on Intel® Quark SoC X1000 Application Note

http://en.wikipedia.org/wiki/Joint_Test_Action_Group JTAG

http://www.enel.ucalgary.ca/People/Smith/2007webs/encm415_07/07Reference

Material/JTAGchip.pdf Boundary Scan Standard: Chip Level Architecture

https://www.olimex.com/Products/ARM/JTAG/ARM-USB-OCD-H/ ARM-USB-

OCD-H