Microcomputer Principle and Interface Technology - Introduction 计算机学院李征 Tel ： 13882153765 Email ： [email protected] [email protected] OICQ: 1340915

Microcomputer Principle and Microcomputer Principle and Interface Technology - Interface Technology -

IntroductionIntroduction

计算机学院李征计算机学院李征TelTel ：： 1388215376513882153765

EmailEmail ：： [email protected]@cs.scu.edu.cnOICQ: 1340915OICQ: 1340915

Course ContentCourse Content

Architecture and Mechanism of 8088/8086 CPUArchitecture and Mechanism of 8088/8086 CPU

8088/8086 Instruction System and Programming 8088/8086 Instruction System and Programming with Assembler Languagewith Assembler Language

Architecture and Mechanism of PC System (PC Architecture and Mechanism of PC System (PC Bus)Bus)

Basic I/O Interface and Basic Programming for Basic I/O Interface and Basic Programming for I/O InterfaceI/O Interface

Content of this chapterContent of this chapter

1. Basic architecture of microcomputer1. Basic architecture of microcomputer

2. Basic signals and temporal 2. Basic signals and temporal procedure in microcomputerprocedure in microcomputer

3. Machine instruction and assembler 3. Machine instruction and assembler languagelanguage

Essential Parts of ComputerEssential Parts of Computer

Center Process UnitCenter Process UnitBusBusMemoryMemoryI/O InterfaceI/O InterfaceI/O DeviceI/O Device

Five essential parts are necessary for all Five essential parts are necessary for all computers.computers.

General Architecture of ComputerGeneral Architecture of Computer

CPU

Bus （ Data, Address, Control）

Memory

I/O Interface I/O Interface I/O Interface

I/O Device I/O Device I/O Device

Essential Storage Cell in ComputerEssential Storage Cell in Computer

Register in CPURegister in CPUMemory CellMemory CellI/O Port (Register in I/O Interface)I/O Port (Register in I/O Interface)

Three types of essential storage cell in all Three types of essential storage cell in all computers.computers.

Questions:Questions:1. What is the main function of the bus?1. What is the main function of the bus?2. What do our programs mainly do?2. What do our programs mainly do?

AddressAddress

Every storage cell has an Every storage cell has an unique unique addressaddress..

The address must be provided on the bus The address must be provided on the bus before a storage cell can be operated.before a storage cell can be operated.

Binary InformationBinary Information

Although we use decimal numbers in the Although we use decimal numbers in the program design, program design, all informationall information in in computer is computer is binarybinary..

There only two signal types in computer, There only two signal types in computer, which is 0 and 1.which is 0 and 1.

The basic unit of a storage cell is The basic unit of a storage cell is bitbit..

Basic storage unitBasic storage unit

0 1

0 1

1 0

SD RD Qn Qn+1

11001100

11110000

01010101

0111001*1*

RDSD

Q Q

1 1

1 1

1 0

10

维持置 1 清 0 非法

Basic storage unitBasic storage unit

Basic Address Unit - ByteBasic Address Unit - Byte

ByteByte is composed of is composed of 8 bits8 bits..

In microcomputer, every unique storage In microcomputer, every unique storage cell in memory is a byte which cell in memory is a byte which has an has an unique address.unique address.

Word length Word length is the maximal bit number is the maximal bit number which CPU can process synchronously.which CPU can process synchronously.

(1) Center Process Unit(1) Center Process Unit

80386

Pentium

Pentium 4

8088CPU

(1) Center Process Unit(1) Center Process Unit

(1) CPU control other parts of computer (1) CPU control other parts of computer with temporal logic automatically.with temporal logic automatically.

(2) CPU execute programs in the memory.(2) CPU execute programs in the memory.

Temporal ProcedureTemporal Procedure

Temporal procedure is the control Temporal procedure is the control procedure performed step by step and procedure performed step by step and orderly.orderly.

Two types of temporal procedure are Two types of temporal procedure are performed by CPU.performed by CPU.


1) Non-instruction execution: 1) Non-instruction execution:

reading instruction bytes from memory,reading instruction bytes from memory,

Interrupt procedure, etc.Interrupt procedure, etc.

2) Instruction execution (Program is 2) Instruction execution (Program is composed of instructions stored in composed of instructions stored in memory)memory)

Most operations in temporal Most operations in temporal procedureprocedure

reading or writing registers in CPU, reading or writing registers in CPU, memory cell, or I/O portmemory cell, or I/O port

performing arithmetic or logic operation performing arithmetic or logic operation with ALU (Arithmetic Logic Unit)with ALU (Arithmetic Logic Unit)

(2) System Bus(2) System Bus

PCI Bus

ISA Bus


Bus provide necessary signal connections Bus provide necessary signal connections between CPU, memory and I/O Interface.between CPU, memory and I/O Interface.

There are There are three typesthree types of bus in bus of bus in bus architecture, which are architecture, which are addressaddress bus, bus, datadata bus and bus and controlcontrol bus. bus.


Microcomputer Architecture

Control Bus (CB)

Data Bus (DB)

Address Bus ( AB)BusGenerator

CPU Subsystem

I/O Device

I/O Interface

Memory

System Bus

Bus Operation in Temporal Bus Operation in Temporal ProcedureProcedure

When memory cell or I/O port is to be When memory cell or I/O port is to be operated, bus operation is necessary in operated, bus operation is necessary in temporal procedure.temporal procedure.

Operation of registers in CPU does not Operation of registers in CPU does not need system bus.need system bus.

Address BusAddress Bus

Cell Address must be provided on address Cell Address must be provided on address bus when cell is to be operated (reading or bus when cell is to be operated (reading or writing). writing).

Generally, higher part of address is for Generally, higher part of address is for chip selection, and lower part of address is chip selection, and lower part of address is for cell selection.for cell selection.

Address bus is unidirectional bus.Address bus is unidirectional bus.

Data BusData Bus

When CPU write a binary data to a When CPU write a binary data to a memory cell or I/O port, it output data memory cell or I/O port, it output data signals to data bus.signals to data bus.

When CPU read a binary data from a When CPU read a binary data from a memory cell or I/O port, it input data memory cell or I/O port, it input data signals from data bus.signals from data bus.

Data bus is bidirectional.Data bus is bidirectional.

Control BusControl Bus

CPU send basic control signals by control bus to CPU send basic control signals by control bus to memory or I/O interface. (For example, RD and memory or I/O interface. (For example, RD and WR signals).WR signals).

I/O interface send basic status signals by control I/O interface send basic status signals by control bus to CPU (For example, Interrupt signal).bus to CPU (For example, Interrupt signal).

Observed individually, Control bus is Observed individually, Control bus is unidirectional. As a whole, it is bidirectional.unidirectional. As a whole, it is bidirectional.

(3) Memory(3) Memory

(3) Memory(3) Memory

Memory is the storage center of computer.Memory is the storage center of computer.

If a program is expected to be performed, If a program is expected to be performed, it must be loaded in memory first.it must be loaded in memory first.

The instructions which form the program, The instructions which form the program, and the data which used by program are and the data which used by program are all stored in memory.all stored in memory.

(4) I/O Interface(4) I/O Interface

I/O interface is a circuit which I/O interface is a circuit which connect the connect the system bus and I/O devicesystem bus and I/O device..

Why there is an interface needed between bus Why there is an interface needed between bus and device?and device?

1) 1) Signal DifferenceSignal Difference: Signals in I/O devices is : Signals in I/O devices is much different from signals in system bus.much different from signals in system bus.

2) 2) Transfer Rate DifferenceTransfer Rate Difference: Data transfer rates : Data transfer rates of I/O device and CPU may be very different.of I/O device and CPU may be very different.

(4) I/O Interface(4) I/O Interface

I/O PortI/O Port

Registers in I/O interface are called I/O Registers in I/O interface are called I/O ports in program design.ports in program design.

There are There are three typesthree types of I/O port in of I/O port in interface, which are interface, which are data, command, data, command, status portstatus port separately. separately.

Functions of I/O InterfaceFunctions of I/O Interface

1) It provides signal transformation 1) It provides signal transformation between I/O device and system bus.between I/O device and system bus.

2) It provides data buffer to avoid data lost 2) It provides data buffer to avoid data lost in transfer because of the transfer rate in transfer because of the transfer rate difference between device and CPU. difference between device and CPU.

Functions of I/O InterfaceFunctions of I/O Interface

3) It provides interaction ways between 3) It provides interaction ways between CPU and I/O devices.CPU and I/O devices.

4) It make devices can be controlled by 4) It make devices can be controlled by program.program.

Signal TransformationSignal Transformation

1) Transformation between Analog signal 1) Transformation between Analog signal and Digital signaland Digital signal

Example: Sound input and outputExample: Sound input and output

2) Transformation between different digital 2) Transformation between different digital signalssignals

Signal TransformationSignal Transformation

For input device, input signal is For input device, input signal is transformed to binary data, and stored in transformed to binary data, and stored in data port by interface, waiting for reading data port by interface, waiting for reading by CPU.by CPU.

For output device, CPU writes the output For output device, CPU writes the output binary data into data port, waiting for binary data into data port, waiting for outputting by interface.outputting by interface.

Data BufferData Buffer

For input device, if device provides an For input device, if device provides an input input when CPU is busywhen CPU is busy, the interface , the interface stored the input data in data port.stored the input data in data port.

For output device, if CPU provides an For output device, if CPU provides an output output when interface is busywhen interface is busy, the , the interface stored the output data in data interface stored the output data in data port.port.

Interaction between I/O interface Interaction between I/O interface and CPUand CPU

1) CPU send commands to interface with 1) CPU send commands to interface with command port.command port.

For example:For example:

Setting the operation mode of interface or Setting the operation mode of interface or devicedevice


2) CPU check the status of the interface with 2) CPU check the status of the interface with status port.status port.


CPU check the input status to know if there is CPU check the input status to know if there is input data in data port.input data in data port.

CPU check the output status to know if the CPU check the output status to know if the output data in data port has been outputted.output data in data port has been outputted.


3) Interrupt (active status)3) Interrupt (active status)


If there is input data in data port, interface If there is input data in data port, interface send interrupt signal to CPU.send interrupt signal to CPU.

Programmable InterfaceProgrammable Interface

CPU interacts with I/O interface by I/O port CPU interacts with I/O interface by I/O port operations (mostly by I/O instructions).operations (mostly by I/O instructions).

Generally, these I/O port operations are Generally, these I/O port operations are performed orderly and logically.performed orderly and logically.

If we make a program to perform these I/O If we make a program to perform these I/O port operations, this program is called a port operations, this program is called a driver.driver.

(5) I/O Device(5) I/O Device





Basic SignalsBasic Signals

Clock (CLK, sent by Clock Generator)Clock (CLK, sent by Clock Generator)

Read (RD, sent by CPU)Read (RD, sent by CPU)

Write (WR, sent by CPU)Write (WR, sent by CPU)

Chip Select (CS, generated on Address Chip Select (CS, generated on Address Bus)Bus)

Interrupt (INT, sent by interface)Interrupt (INT, sent by interface)

Interrupt Acknowledge (INTA sent by Interrupt Acknowledge (INTA sent by CPU)CPU)

ClockClock

Clock: A periodic signal sent by clock Clock: A periodic signal sent by clock generator, its cycle is called generator, its cycle is called clock cycleclock cycle（时钟周期，节拍）（时钟周期，节拍） ..

The clock signal is necessary for CPU The clock signal is necessary for CPU temporal procedure.temporal procedure.

The clock cycle is the The clock cycle is the basic time unitbasic time unit in in temporal procedure.temporal procedure.

ClockClock

Ttime

ClockClock

Any temporal procedure is composed of Any temporal procedure is composed of multiple clock cyclesmultiple clock cycles..

The clock cycle also used to describe the The clock cycle also used to describe the process speed of CUP.process speed of CUP.

Shorter cycle implied faster processing.Shorter cycle implied faster processing.

Read and WriteRead and Write

The bus operations (temporal procedure The bus operations (temporal procedure with system bus) performed by CPU can with system bus) performed by CPU can be summarized as reading and writing.be summarized as reading and writing.

When CPU expect to read or write a When CPU expect to read or write a memory cell or I/O port, it sends read or memory cell or I/O port, it sends read or write signal to control bus.write signal to control bus.

Reading and Writing CycleReading and Writing Cycle

The time consumed in reading or writing The time consumed in reading or writing procedure is always composed of multiple procedure is always composed of multiple clock cycles.clock cycles.

The time consumed in reading or writing The time consumed in reading or writing procedure is called reading or writing procedure is called reading or writing cycles.cycles.

Chip SelectChip Select

When CPU expect to read or write a cell outside, When CPU expect to read or write a cell outside, cell address must be provided on the address cell address must be provided on the address bus.bus.

The The address decoderaddress decoder (on address bus or in (on address bus or in chips) decode the higher part of cell address to chips) decode the higher part of cell address to generate chip select signal.generate chip select signal.

Chip select signal is used to select memory chip Chip select signal is used to select memory chip or I/O interface chip, and the lower part address or I/O interface chip, and the lower part address is used to locate the cell.is used to locate the cell.

Address DecoderAddress Decoder

Address Decoder

Input ： n

Output ： <=2n

Chip SelectChip Select

Important: Only when chip select is valid Important: Only when chip select is valid for a chip, the cells in it can be operated.for a chip, the cells in it can be operated.

Interrupt and Interrupt Interrupt and Interrupt AcknowledgeAcknowledge

When an input device expect transfer input When an input device expect transfer input data to CPU data to CPU

or an output device expect output data or an output device expect output data from CPU, from CPU,

it can send interrupt signal to CPU with it can send interrupt signal to CPU with control bus.control bus.


If interrupt acknowledge of CPU is If interrupt acknowledge of CPU is allowed,allowed,

and when the current instruction has been and when the current instruction has been finished by CPU,finished by CPU,

CPU send interrupt acknowledge signal to CPU send interrupt acknowledge signal to I/O interface.I/O interface.


If CPU does not accept the interrupt, the If CPU does not accept the interrupt, the I/O interface maintain the interrupt on I/O interface maintain the interrupt on control bus until CPU accept it.control bus until CPU accept it.

Interrupt Acknowledge CycleInterrupt Acknowledge Cycle

The temporal procedure of interrupt The temporal procedure of interrupt acknowledge is complex.acknowledge is complex.

The time consumed in interrupt The time consumed in interrupt acknowledge procedure is called interrupt acknowledge procedure is called interrupt acknowledge cycle.acknowledge cycle.


Temporal procedure is the control Temporal procedure is the control procedure (procedure (signal interaction proceduresignal interaction procedure) ) performed step by step and orderly.performed step by step and orderly.

Clock cycle is the basic time unit of Clock cycle is the basic time unit of temporal procedure, and temporal procedure, and each cycle each cycle finish a single stepfinish a single step..


Example: Memory Reading CycleExample: Memory Reading Cycle

T1 cycle : CPU put cell address on T1 cycle : CPU put cell address on address bus, and the address decoding address bus, and the address decoding begins.begins.

T2 cycle: CPU send RD signal to control T2 cycle: CPU send RD signal to control bus, and the CS (chip select) is valid.bus, and the CS (chip select) is valid.


T3 cycle: RD, address, and CS are all T3 cycle: RD, address, and CS are all stable, and the data in memory cell is put stable, and the data in memory cell is put on data bus.on data bus.

T4 cycle: Data on bus is stable, and CPU T4 cycle: Data on bus is stable, and CPU read it from the data bus.read it from the data bus.





Machine InstructionMachine Instruction

Machine instructionMachine instruction is a sort of is a sort of binary binary codecode..

Its code is corresponding with its function.Its code is corresponding with its function.

All instructions supported by a CPU type All instructions supported by a CPU type form the form the instruction systeminstruction system of this CPU of this CPU type.type.

Instruction Reading CycleInstruction Reading Cycle

Originally, instructions are stored in Originally, instructions are stored in memory cells.memory cells.

Before an instruction can be executed, it Before an instruction can be executed, it must be loaded in the CPU.must be loaded in the CPU.

Instruction Reading CycleInstruction Reading Cycle

The time consumed in reading instruction The time consumed in reading instruction is called is called instruction reading cycleinstruction reading cycle..

Instruction reading cycle is executed by Instruction reading cycle is executed by CPU automatically.CPU automatically.

Instruction Executing CycleInstruction Executing Cycle

When an instruction is loaded in CPU, When an instruction is loaded in CPU, CPU executed it automatically.CPU executed it automatically.

The time consumed in instruction The time consumed in instruction execution is called execution is called instruction executing instruction executing cycle.cycle.


1) Instruction code is decoded (by 1) Instruction code is decoded (by instruction decoder) and all relative control instruction decoder) and all relative control signals are generated.signals are generated.

2) Based on the temporal logic provided 2) Based on the temporal logic provided by this instruction, control signals are send by this instruction, control signals are send to bus step by step.to bus step by step.


When current instruction has been When current instruction has been executed, executed,

and there is no instructions in CPU for and there is no instructions in CPU for execution, execution,

CPU automatically enter instruction CPU automatically enter instruction reading cycle.reading cycle.

Some ProblemsSome Problems

Now, with the concept of instruction, what does Now, with the concept of instruction, what does CPU do all the time?CPU do all the time?

Can program control Can program control whenwhen CPU read its CPU read its instructions or execute them?instructions or execute them?

So what can program control?So what can program control?

Read and execute instructions one by one

No, these temporal procedures are executed by CPU automatically.

Temporal procedure prescribed by instruction

Atom Property of InstructionAtom Property of Instruction

(1) Generally, the execution of instruction (1) Generally, the execution of instruction can not be disturbed. (except DMA can not be disturbed. (except DMA request)request)

When interrupt occurs, CPU will finish When interrupt occurs, CPU will finish current instruction execution before it can current instruction execution before it can accept interrupt. accept interrupt.

Atom Property of InstructionAtom Property of Instruction

(2) For temporal procedure in one single (2) For temporal procedure in one single instruction, if it is executed, it must be instruction, if it is executed, it must be executed integrally.executed integrally.

An instruction may be executed integrally An instruction may be executed integrally or may not be executed.or may not be executed.

But it can not be executed partly.But it can not be executed partly.

Instruction SystemInstruction System

In different CPU types, instruction In different CPU types, instruction decoders are different.decoders are different.

So, instruction code, and temporal So, instruction code, and temporal procedure of instruction are also different procedure of instruction are also different in different CPU types.in different CPU types.

Assembler InstructionAssembler Instruction

Machine instructions are binary codes, Machine instructions are binary codes, and they are difficult for programmers to and they are difficult for programmers to remember.remember.

Assembler instruction is the character Assembler instruction is the character code of machine instruction.code of machine instruction.

Because its clear meaning, assembler Because its clear meaning, assembler instruction is easy to remember.instruction is easy to remember.

Assembler InstructionAssembler Instruction


MOVMOV : This instruction move data in one : This instruction move data in one cell (register or memory cell) to the other.cell (register or memory cell) to the other.

ADDADD : This instruction add data in one cell : This instruction add data in one cell with the other.with the other.

Assembler LanguageAssembler Language

Example:Example:

x, y, and z are three variables. If x+y-z>0, x, y, and z are three variables. If x+y-z>0, store the calculation result in variable var1; store the calculation result in variable var1; or else, store zero in var1.or else, store zero in var1.

C programC program::

if((var1=x+y-z)<=0) var1 = 0;if((var1=x+y-z)<=0) var1 = 0;

Feature of C programFeature of C program

(1) simple, easy to read(1) simple, easy to read

(2) can not observe the machine operation (2) can not observe the machine operation with this programwith this program


Assembler programAssembler program:: mov al, xmov al, x

add al, yadd al, y sub al, zsub al, z ja l1ja l1 jmp l2jmp l2l1: mov var1, all1: mov var1, al jmp l3jmp l3l2: mov var1, 0l2: mov var1, 0l3: ……l3: ……

Feature of assembler programFeature of assembler program

(1) complex, difficult to read(1) complex, difficult to read

(2) One instruction in one line, easy to (2) One instruction in one line, easy to understand the machine operationunderstand the machine operation

(3) Because use instructions directly in (3) Because use instructions directly in program, temporal and spatial efficiency is program, temporal and spatial efficiency is great.great.

Assembler program vs. C programAssembler program vs. C program

程序设计语言程序设计语言可执行程序占用字节数可执行程序占用字节数

高级语言高级语言（（ CC ））

CSUM.EXECSUM.EXE 43304330

汇编语言汇编语言（（ MASMMASM ））

ASMSUM.COMASMSUM.COM 2121

机器语言机器语言（（ IBM PCIBM PC ））

MACHINE.COMMACHINE.COM 2121

High-level LanguageHigh-level Language

Application orientedApplication oriented

Easy to learnEasy to learn

Development cycle is shortDevelopment cycle is short

Good portabilityGood portability

Less efficientLess efficient

Low-level LanguageLow-level Language

Machine orientedMachine oriented

Hard to learnHard to learn

Development cycle is longDevelopment cycle is long

Bad portabilityBad portability

More efficientMore efficient


Based on assembler instruction system,Based on assembler instruction system,

assisted by other syntax,assisted by other syntax,

assembler language is a low-level and assembler language is a low-level and machine oriented language.machine oriented language.

Why learn Assembler Language?Why learn Assembler Language?

(1) Because most temporal procedures (1) Because most temporal procedures are caused by instructions, are caused by instructions,

understanding assembler language is understanding assembler language is basic and necessary to learn machine basic and necessary to learn machine operation.operation.

Why learn Assembler Language?Why learn Assembler Language?

(2) program analysis without source code(2) program analysis without source code

(3) obtain most efficient design(3) obtain most efficient design

Notation System in Assembler Notation System in Assembler LanguageLanguage

Decimal: 352Decimal: 352

Binary: 10110011Binary: 10110011BB

Octal: 3765Octal: 3765OO

Hex: 2A4FHex: 2A4FHH

Data Code in Assembler LanguageData Code in Assembler Language

Unsigned numberUnsigned number::

For byte, its range is 0~255For byte, its range is 0~255

For word, its range is 0~65535For word, its range is 0~65535

Complementary codeComplementary code (Signed number): (Signed number):

For byte, its range is -128~127For byte, its range is -128~127

For word, its range is -32768~32767For word, its range is -32768~32767

Complementary Code (Complementary Code ( 补码补码 ))

[X][X] 补补 = M+X= M+X

M=2M=2nn

n is the binary data lengthn is the binary data length


The complementary code of positive The complementary code of positive integer and zero is the data itself.integer and zero is the data itself.

Example:Example:

[+59][+59] 补补 = 2= 288+ 00111011 = + 00111011 =

100000000 + 00111011 =100000000 + 00111011 =

11 （舍去）（舍去） 00111011 00111011 （（ 88 位以内的部分位以内的部分为补码）为补码）


However, the complementary code of However, the complementary code of negative integer is very different from the negative integer is very different from the data.data.

Example:Example:

[-59][-59] 补补 = 2= 288++ （（ -00111011-00111011 ）） = =

100000000 - 00111011 = 11000101100000000 - 00111011 = 11000101


[A][A] 补补 +[-A]+[-A] 补补 = [0]= [0] 补补

Example:Example:

[+59][+59] 补补 +[-59]+[-59] 补补 = 00111011+11000101 == 00111011+11000101 =

100000000 = 2100000000 = 288

Fast Calculation of Complementary Fast Calculation of Complementary CodeCode

Example:Example:

真值：真值： - 01011001 - 01011001 相反数：相反数： 0101100101011001

变反：变反： 1010011010100110

加加 11 ：： 1010011110100111


验算：验算： 01011001+10100111 = 001011001+10100111 = 0 （舍去第（舍去第88 位）位）

验算过程解释验算过程解释：： 0101100101011001 （（正数补码正数补码）） + + 1010011010100110 （（值变反的结果值变反的结果）） ++11 = = 11111111+111111111+1


总结变反加总结变反加 11 方法可用的场合：方法可用的场合：

11 ）） Obtain complementary code of negative Obtain complementary code of negative data (data ( 求负数真值对应的补码求负数真值对应的补码 ))

22 ）） Obtain data of negative complementary Obtain data of negative complementary code (code ( 求负数补码对应的真值求负数补码对应的真值 ))

33 ）） Obtain contrary complementary code Obtain contrary complementary code (( 求已知补码的相反数补码求已知补码的相反数补码 ))


[X][X] 补补 +[Y]+[Y] 补补 = [X+Y]= [X+Y] 补补

[X][X] 补补 -[Y]-[Y] 补补 = [X]= [X] 补补 +[-Y]+[-Y] 补补 = [X-Y]= [X-Y] 补补


Subtraction operation is not needed in Subtraction operation is not needed in ALU:ALU:

AdditionAddition ：： [X][X] 补补 +[Y]+[Y] 补补

SubtractionSubtraction ：： [X][X] 补补 -[Y]-[Y] 补补 =[X]=[X] 补补 +[-Y]+[-Y] 补补

Sign ExpandingSign Expanding

The sign bit of complementary code can The sign bit of complementary code can be expanded without limit.be expanded without limit.

Example:Example:

0010 => 0000 0000 00100010 => 0000 0000 0010

1111 => 1111 1111 11111111 => 1111 1111 1111

Multiple explanation of data codeMultiple explanation of data code

Example:Example:

(AL) = 00000010B(AL) = 00000010B

(BL) = 11111111B(BL) = 11111111B

ADD AL, BLADD AL, BL

Multiple explanation of data codeMultiple explanation of data code

0000001000000010+ 11111111+ 111111111 000000011 00000001

Explanation of unsigned number:Explanation of unsigned number:2+255 = 2572+255 = 257Explanation of Complementary Code: Explanation of Complementary Code: 2+(-1) = 12+(-1) = 1

ReferenceReference

8086/8088 8086/8088 系列微型计算机宏汇编语言程序设计，系列微型计算机宏汇编语言程序设计，电子科技大学出版社，王正智苟大举徐洁黄海电子科技大学出版社，王正智苟大举徐洁黄海于编著于编著

汇编语言程序设计汇编语言程序设计————从从 DOSDOS 到到 WindowsWindows ，清，清华大学出版社，张雪兰等编著华大学出版社，张雪兰等编著

16 / 3216 / 32 位微机原理、汇编语言及接口技术，机械位微机原理、汇编语言及接口技术，机械工业出版社，钱晓捷、陈涛编著工业出版社，钱晓捷、陈涛编著

Documents

Microcomputer Principle and Interface Technology - Introduction 计算机学院 李征 Tel ： 13882153765 Email ： [email protected] [email protected] OICQ: 1340915

Microcomputer Principle and Interface Technology - Introduction 计算机学院李征 Tel ： 13882153765 Email ： [email protected] [email protected] OICQ: 1340915