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April 1997

NDS351AN

N-Channel Logic Level Enhancement Mode Field Effect Transistor

General Description Features

_________________________________________________________________________________

Absolute Maximum Ratings T A = 25C unless otherwise notedSymbol Parameter NDS351AN Units

VDSS Drain-Source Voltage 30 V

VGSS Gate-Source Voltage - Continuous 20 V

ID Maximum Drain Current - Continuous (Note 1a) 1.2 A

- Pulsed 10

P D Maximum Power Dissipation (Note 1a) 0.5 W(Note 1b) 0.46

TJ ,T STG Operating and Storage Temperature Range -55 to 150 C

THERMAL CHARACTERISTICS

R JA Thermal Resistance, Junction-to-Ambient (Note 1a) 250 C/W

R JC Thermal Resistance, Junction-to-Case (Note 1) 75 C/W

NDS351AN Rev. C

1.2A, 30 V. R DS(ON) = 0.25 @ V GS = 4.5 V R DS(ON) = 0.16 @ V GS = 10 V.

Industry standard outline SOT-23 surface mount packageusing proprietary SuperSOT TM-3 design for superior

thermal and electrical capabilities.

High density cell design for extremely low R DS(ON) .

Exceptional on-resistance and maximum DC currentcapability.

Compact industry standard SOT-23 surface mount

D

SG

These N-Channel logic level enhancement mode power fieldeffect transistors are produced using Fairchild's proprietary,high cell density, DMOS technology. This very high densityprocess is especially tailored to minimize on-state resistance.These devices are particularly suited for low voltageapplications in notebook computers, portable phones, PCMCIAcards, and other battery powered circuits where fastswitching, and low in-line power loss are needed in a very smalloutline surface mount package.

19 97 Fairchild Semiconduct or Corporat ion

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Electrical Characteristics (T A = 25C unless otherwise noted)Symbol Parameter Conditions Min Typ Max Units

OFF CHARACTERISTICS

BVDSS Drain-Source Breakdown Voltage V GS = 0 V, I D = 250 A 30 V

IDSS Zero Gate Voltage Drain Current VDS = 24 V, V GS = 0 V 1 A

TJ =125C 10 AIGSSF Gate - Body Leakage, Forward V GS = 20 V DS = 0 V 100 nA

IGSSR Gate - Body Leakage, Reverse VGS = -20 V, V DS = 0 V -100 nA

ON CHARACTERISTICS (Note 2)

VGS(th) Gate Threshold Voltage V DS = VGS , ID = 250 A 0.8 1.7 2 V

TJ =125C 0.5 1.3 1.5

RDS(ON) Static Drain-Source On-Resistance VGS = 4.5 V, I D = 1.2 A 0.19 0.25

TJ =125C 0.28 0.37

VGS = 10 V, I D = 1.4 A 0.125 0.16

ID(ON) On-State Drain Current VGS = 4.5 V, V DS = 5 V 3.5 A

gFS Forward Transconductance VDS = 5 V, I D= 1.2 A, 1.8 S

DYNAMIC CHARACTERISTICSC iss Input Capacitance VDS = 10 V, V GS = 0 V,

f = 1.0 MHz125 pF

C oss Output Capacitance 100 pF

C rss Reverse Transfer Capacitance 90 pF

SWITCHING CHARACTERISTICS (Note 2)

td(on) Turn - On Delay Time V DD = 10 V, I D = 1 A,VGS = 10 V, R GEN = 50

6 15 ns

tr Turn - On Rise Time 15 30 ns

td(off) Turn - Off Delay Time 14 30 ns

tf Turn - Off Fall Time 18 40 ns

Q g Total Gate Charge V DS = 10 V, I D = 1.2 A,VGS = 4.5 V

1.9 2.7 nC

Q gs Gate-Source Charge 0.5 nC

Q gd Gate-Drain Charge 0.9 nC

NDS351AN Rev. C

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Electrical Characteristics (T A = 25C unless otherwise noted)Symbol Parameter Conditions Min Typ Max Units

DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

IS Maximum Continuous Drain-Source Diode Forward Current 0.42 A

ISM Maximum Pulsed Drain-Source Diode Forward Current 5 A

VSD Drain-Source Diode Forward Voltage V GS = 0 V, I S = 1.2 A (Note 2) 0.8 1.2 VNotes:

1. R JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the sol der mounting surface of the drain pins. R JC is

guaranteed by design while R CA is determined by the user's board design.

P D (t ) =T J T AR JA (t )

=T J T A

R JC + R CA (t )= I D

2 (t ) R DS (ON ) T J

Typical R JA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:

a. 250 oC/W when mounted on a 0.02 in 2 pad of 2oz copper.b. 270 oC/W when mounted on a 0.001 in 2 pad of 2oz copper.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.

NDS351AN Rev. C

1 a 1b

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NDS351AN Rev. C

Figure 1. On-Region Characteristics .

0 1 2 30

1

2

3

4

5

V , DRAIN-SOURCE VOLTAGE (V)

I , D

R A I N - S

O U R C E C U R R E N T ( A )

3.5

3.0

6.0V =10VGS

DS

D

4.04.5

5.0

Figure 2. On-Resistance Variationwith Drain Current and Gate Voltage .

0 1 2 3 40.4

0.6

0.8

1

1.2

1.4

1.6

1.8

I , DRAIN CURRENT (A)

D R A I N - S

O U R C E O N - R

E S I S T A N C E

T = 125CJ

25C

D

V = 4.5 VGS

-55C R

, N O R M A L I Z E D

D S ( o n )

Figure 4. On-Resistance Variationwith Drain Current and Temperature .

-50 -25 0 25 50 75 100 125 1500.6

0.8

1

1.2

1.4

1.6

1.8

T , JUNCTION TEMPERATURE (C)

D R A I N - S

O U R C E O N - R

E S I S T A N C E

J

V = 4.5VGS

I = 1.2AD

R


D S ( O N )

Figure 3. On-Resistance Variationwith Temperature .

0.5 1 1.5 2 2.5 3 3.5 4 4.5 50

1

2

3

4

5

V , GATE TO SOURCE VOLTAGE (V)

I , D

R A I N C U R R E N T ( A )

25C

125C

V = 5.0VDS

GS

D

T = -55CJ

Figure 5. Transfer Characteristics.

-50 -25 0 25 50 75 100 125 1500.6

0.7

0.8

0.9

1

1.1

1.2


G A T E - S

O U R C E T H R E S H O L D V O L T A G E

J

I = 250ADV = VDS GS

V , N

O R M A L I Z E D

t h

Figure 6. Gate Threshold Variationwith Temperature .

0 1 2 3 40.4

0.6

0.8

1

1.2

1.4

1.6

1.8


D R A I N - S

O U R C E O N - R

E S I S T A N C E

V = 3.5VGS

D

4. 0

7. 06.0

10

5.04.5

R D S ( o n ) , N

O R M A L I Z E D

Typical Electrical Characteristics

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NDS351AN Rev. C

Typical Electrical Characteristics (continued)

- 50 -25 0 25 5 0 75 10 0 1 2 5 1500.92

0.96

1

1.04

1.08

1.12


D R A I N - S

O U R C E B R E A K D O W

N V O L T A G E

I = 2 5 0 AD

B V


D S S

J

Figure 7. Breakdown Voltage Variation withTemperature .

0.1 0.2 0.5 1 2 5 10 20 3050

80

100

150

200

300

400

V , DRAIN TO SOURCE VOLTAGE (V)

C A P A C I T A N C E ( p F )

DS

C iss

f = 1 MHzV = 0VGS

C oss

C rss

Figure 9. Capacitance Characteristics .

0 0.2 0.4 0.6 0.8 1 1.20.0001

0.001

0.01

0.1

1

5

V , BODY DIODE FORWARD VOLTAGE (V)

I , R

E V E R S E D R A I N C U R R E N T ( A )

T = 125CJ

25C

-55C

V = 0VGS

SD

S

Figure 8. Body Diode Forward Voltage Variation withSource Current and Temperature .

0 1 2 3 40

2

4

6

8

10

Q , GATE CHARGE (nC)

V

, G A T E - S

O U R C E V O L T A G E ( V )

g

G S

I = 1.2AD 10V

15V

V = 5VDS

Figure 10. Gate Charge Characteristics .

G

D

S

VDD

R LV

V

IN

OU T

VGSDU TR GEN

Figure 11. Switching Test Circuit . Figure 12. Switching Waveforms .

10 %

50 %

90 %

10 %

90 %

90 %

50 %V IN

VOU T

on off

d(off) f r d(on)

t tt ttt

INVERTED10 %

PULSE WIDTH

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NDS351AN Rev. C

Typical Electrical Characteristics (continued)

0 1 2 3 4 50

1

2

3

4

5


g

, T R A N S C O N D U C T A N C E ( S I E M E N S )

T = -55CJ

25C

D

F S

V = 5.0VDS

125C

Figure 13. Transconductance Variation withDrain Current and Temperature .

0 0.1 0.2 0.3 0.40

0.2

0.4

0.6

0.8

1

2oz COPPER MOUNTING PAD AREA (in )

S T E A D Y - S

T A T E P O W E R D I S S I P A T I O N ( W )

2

1b

1a

4.5"x5" FR-4 BoardT = 25 CStill Air A

o

Figue 15. SuperSOT TM _ 3 Maximum Steady-StatePower Dissipation versus Copper Mounting Pad Area.

0.1 0.2 0.5 1 2 5 10 20 30 500.01

0.03

0.1

0.3

1

35

10

20

V , DRAI N-SOURCE VOLTAGE (V)

I , D

R A I N C U R R E N T ( A )

DS

D D C

1 s

1 0 m s

1 0 0 m s

1 0 s

1 m s

R D S ( O N

) L I M I T

V = 4.5VSINGLE PULSE

R =See Note1bT = 25C

GS

A

JA

Figure 14. Maximum Safe Operating Area.

0 0.1 0.2 0.3 0.40. 8

1

1. 2

1. 4

1. 6

2oz COPPER MOUNTING PAD AREA (in )

I , S

T E A D Y - S

T A T E D R A I N C U R R E N T ( A )

2

1b

1a

D

4.5"x5" FR-4 Board

T = 25 C

Still Air

V = 4 .5V

Ao

GS

Figure 16. Maximum Steady-State DrainCurrent versus Copper Mounting Pad Area .

0.0001 0.001 0.01 0.1 1 10 100 3000.001

0.002

0.005

0.01

0.02

0.05

0.1

0.2

0.5

1

t , TIME (sec)

T R A N S I E N T T H E R M A L R E S I S T A N C E

Duty Cycle, D = t /t1 2

R (t) = r(t) * RR = See Note 1b

JAJA

JA

T - T = P * R (t)JA A

J

P(pk)

t1t 2

r ( t ) , N O R M A L I Z E D E F F E C T I V E

1

Single Pulse

D = 0.5

0.1

0.05

0.02

0.01

0.2

Figure 17. Transient Thermal Response Curve.Note : Characterization performed using the conditions described in note 1b. Transient thermal response will

change depending on the circuit board design.

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