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cng bi ging mn : PLC Bi V n Dn

p trnh vi SPS S7-300 1

Trng i hc Sphm K thut Hng Yn

Khoa in -in t

cng bi ging

MN HC : PLC

(Bin son: Bi Vn Dn)

ng Yn, thng 08, nm 2008

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p trnh vi SPS S7-3001

Chng1.Gii thiu tng quan v PLC.

1.1.Khi nim h thng u khin PLC:

PLC vit tt ca Programmable Logic Controller , l thit bu khin lp trnh

c (kh trnh) cho php thc hin linh hot cc thut ton u khin logic thng qua mt

ngn ng lp trnh. Ngi s dng c th lp trnh thc hin mt lot trnh t cc s

kin. Cc s kin ny c kch hot bi tc nhn kch thch (ng vo) tc ng vo PLC

hoc qua cc hot ng c tr nh thi gian nh th hay cc s kin c m. Mt khi s

kin c kch hot tht s, n bt ON hay OFF thit bu khin bn ngoi c gi l

thit b vt l. Mt bu khin lp trnh s lin tc trong chng trnh do ngi s

dng lp ra chtn hiu ng vo v xut tn hiu ng ra ti cc thi m lp trnh.

PLC (Programable Logic Controler) l mt thit b iu khin s dng mtb

nh c th lp trnh, b nh ny slu gi cc cu trc lnh (logic, thi gian, b m, cc

hm ton hc...) thc hin cc chc nng iu khin.

1.2. Cspht trin ca PLC:

khc phc nhng nhc m ca bu khin dng dy ni ( bu khin bng

Relay) ngi ta ch to ra b PLC nhm tha mn cc yu cu sau :

Lp trnh d dng , ngn ng lp trnh d hc .

Gn nh, d dng bo qun , sa cha.

Dung lng b nhln c th cha c nhng chng trnh phc tp .

Hon ton tin cy trog mi trng cng nghip .

Bm

Cm binquang

n

C truy n ng

P L C

Nt n

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Giao tip c vi cc thit b thng minh khc nh : my tnh , ni mng , cc mi

Modul mrng.

Gi c c th cnh tranh c.

S khc nhau gia hu khin bng Rle in v lp trnh c nh c th minh ho

bng mt v d sau:

V D: iu khin h thng 3 my bm n c qua 3 khi ng tK1, K2, K3. Trnh

tu khin nhsau: Cc my bm hot ng tun tngha l K1 ng trc tip n

l K2 ri cui cng l K3 ng.

thc hin nhim v theo yu cu trn mch u khin ta thit k nh sau:

Trong cc nt n S1, S2, S3, S4 l cc phn t nhp tn hiu.

Cc tip m K1, K2, K3 v cc mi lin kt l cc phn x l.

Cc khi ng t K1, K2, K3 l kt qu x l.

Hnh 1-3:Su khin

Nu ta thay bng thit bu khin PLC ta c th m t nh sau:

-Tn hiu vo: S1, S2, S3, S4 vn gi nguyn.-Tn hiu ra: K1, K2, K3 l cc khi ng t vn gi nguyn.

-Phn t x l:c thay th bng PLC.

Hnh 1-4: S ni dy thc hin bng

Khi thc hin bng chng trnh iu khin c nhPLC ta ch cn thc hin ni mch

theo s sau:

S1

S2

K1

S3

K2

S4

K3

K2K1

K1 K2 K3

Nhp li u

l

t

S1

S2 K1 S3 K2 S4 K3

K2K1

K1 K2 K3

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Hnh 1-5:S ni dy thc hin bng PLC

Nu by gi nhim vu khin thay i v d nh cc bm 1,2,3 hot ng theo

nguyn tc l ch mt trong s cc bm c hot ng c lp. Nh vy i vi mch ukhin dng Rle ta phi tin hnh lp gip li ton b mch u khin, trong khi i vi

mch u khin dng PLC th ta li ch cn son tho li chng trnh ri np li vo CPU

th ta s c ngay mt su khin theo yu cu nhim v mi m khng cn phi ni li

dy trn mch u khin.

Nh vy mt cch tng qut c th ni h thng u khin PLC l tp hp cc thit b

v linh kin n t. m bo tnh n nh, chnh xc v an ton.. trong qu trnh sn

xut, cc thit b ny bao gm nhiu chng loi, hnh dng khc nhau vi cng sut t rt

nhn rt ln. Do tc pht trin qu nhanh ca cng ngh v p ng c cc yucu u khin phc tp nn h thng u khin phi c h thng tng ho cao. Yu cu

ny c th thc hin c bng h lp trnh c nhPLC kt hp vi my tnh, ngoi ra cn

cn c cc thit b ngoi vi khc nh: Bng u khin, ng c, cm bin, tip m, cng

tc t,...

Kh nng truyn d liu trong h thng rt rng thch hp cho h thng x l v cng rt

linh ng trong cc h thng phn phi .

1.3. Cu trc ca PLC:

1.3.1. Cu trc:

Mi mt thnh phn trong h thng u khin c mt vai tr quan trng nhc trnh

by trong hnh v sau.

S1 S2 S3 S4

K1 K2 K3

PLC

24V

N

Nhp sliu

l

t qu

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Hnh 1-6: M hnh h thng u khin PLC

Tt c cc PLC u c thnh phn chnh l :

Mt b nhchng trnh RAM bn trong ( c th mrng thm mt s b nhngoi

EPROM ).

Mt b vi x l c cng giao tip dng cho vic ghp ni vi PLC .

Cc Modul vo /ra.

Bn cnh , mt b PLC hon chnh cn i km thm mt n v lp trnh bng tay

hay bng my tnh. Hu ht cc n v lp trnh n gin u c RAM cha ng

chng trnh di dng hon thin hay b sung . Nu n v lp trnh l n v xch tay ,

RAM thng l loi CMOS c pin d phng, ch khi no chng trnh c kim tra v

sn sng s dng th n mi truyn sang b nh PLC . i vi cc PLC ln thng lp

trnh trn my tnh nhm h trcho vic vit, c v kim tra chng trnh . Cc n v lptrnh ni vi PLC qua cng RS232, RS422, RS458,

V d : mt modul CPU S7 - 300

Kha mode c 4 v tr:

RUN-P ch lp trnh v chy

RUN ch chy chng trnh

STOP ngng chy chng trnh

MRES reset b nh

Th nhc th c dung lng t 16KB n 4MB, cha chng trnh t PLC chuyn

qua v chuyn chng trnh ngc trli cho CPU.

Pin nui gip nui chng trnh v d liu khi b mt ngun (ti a 1 nm), ngoi ra

cn nui ng h thi gian thc. Vi loi CPU khng c pin nui thi cng c mt phn

vng nhc duy tr.

Thng qua cng truyn thng MPI (MultiPoint Interface) c th ni : my tnh lp trnh,

mn hnh OP (Operator panel) , cc PLC c cng MPI (S7-300, M7-300, S7-400, M7-

Khi x ltrung tmGiao tip ng

vo nh

Giaotip

ng

ra

tip

mmbin

n cundy, m,....

Ngunnui

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400, C7-6xx), S7-200, vn tc truyn n 187.5kbps (12Mbps vi CPU 318-2, 10.2 kbps

vi S7-200) . Cng Profibus DP ni cc thit b trn theo mng Profibus vi vn tc

truyn ln n 12Mbps.

b. Nguyn l hot ng ca PLC

v n v xl trung tm

CPU u khin cc hot ng bn trong PLC. B x l sc v kim tra

chng trnh c cha trong b nh, sau s thc hin th t tng lnh trong

chng trnh , sng hay ngt cc u ra. Cc trng thi ng ra y c pht ti cc

thit b lin kt thc thi. V ton b cc hot ng thc thi u ph thuc vo

chng trnh u khin c gi trong b nh.

v H thng bus

H thng Bus l tuyn dng truyn tn hiu, h thng gm nhiu ng tn hiu

song song :

Address Bus : Bus a ch dng truyn a chn cc Modul khc nhau.

Data Bus : Bus dng truyn dliu.

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Control Bus : Bus iu khin dng truyn cc tn hiu nh th v iu khin

ng b cc hot ng trong PLC .

Trong PLC cc s liu c trao i gia b vi x l v cc modul vo ra thng qua

Data Bus. Address Bus v Data Bus gm 8 ng, cng thi m cho php truyn 8 bit

ca 1 byte mt cch ng thi hay song song.

Nu mt modul u vo nhn c a ch ca n trn Address Bus , n s chuyntt c trnh thi u vo ca n vo Data Bus. Nu mt a ch byte ca 8 u ra xut hin

trn Address Bus, modul u ra tng ng s nhn c d liu t Data bus. Control Bus s

chuyn cc tn hiu u khin vo theo di chu trnh hot ng ca PLC .

Cc a ch v s liu c chuyn ln cc Bus tng ng trong mt thi gian hn ch.

H thng Bus s lm nhim v trao i thng tin gia CPU, b nhv I/O . Bn cch

, CPU c cung cp mt xung Clock c tn s t 1(8 MHZ. Xung ny quyt nh tc

hot ng ca PLC v cung cp cc yu t vnh thi, ng h ca h thng.

v B nh

PLC thng yu cu b nhtrong cc trng hp :

Lm bnh thi cho cc knh trng thi I/O.

Lm bm trng thi cc chc nng trong PLC nhnh thi, m, ghi cc Relay.

Mi lnh ca chng trnh c mt v tr ring trong b nh, tt c mi v tr trong b

nhu c nh s, nhng s ny chnh l a ch trong b nh.

a ch ca tng nhsc trn bi mt bm a chbn trong b vi x

l. B vi x l s gi tr trong bm ny ln mt trc khi x l lnh tip theo . Vi mta ch mi , ni dung ca nhtng ng s xut hin u ra, qu trnh ny c gi l

qu trnh c .

B nhbn trong PLC c to bi cc vi mch bn dn, mi vi mch ny c kh

ng cha 2000 16000 dng lnh , ty theo loi vi mch. Trong PLC cc b nh nh

RAM, EPROM u c s dng .

RAM (Random Access Memory ) c th np chng trnh, thay i hay xa b ni

dung bt k lc no. Ni dung ca RAM s b mt nu ngun n nui b mt . trnh

tnh trng ny cc PLC u c trang b mt pin kh, c kh nng cung cp nng lng dtr cho RAM t vi thng n vi nm. Trong thc t RAM c dng khi to v kim

tra chng trnh. Khuynh hng hin nay dng CMOSRAM nhkh nng tiu th thp v

tui th ln .

EPROM (Electrically Programmable Read Only Memory) l b nh m ngi s

dng bnh thng ch c thc ch khng ghi ni dung vo c . Ni dung ca EPROM

khng b mt khi mt ngun , n c gn sn trong my , c nh sn xut np v

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cha hu hnh sn. Nu ngi s dng khng mun mrng b nh th ch dng thm

EPROM gn bn trong PLC . Trn PG (Programer) c sn ch ghi v xa EPROM.

Mi trng ghi d liu th ba l a cng hoc a mm, c s dng trong my lp

trnh . a cng hoc a mm c dung lng ln nn thng c dng lu nhng

chng trnh ln trong mt thi gian di .

Kch thc b nh: Cc PLC loi nh c th cha t 300 1000 dng lnh ty vo cng ngh ch to .

Cc PLC loi ln c kch thc t 1K 16K, c kh nng cha t 2000 16000

dng lnh.

Ngoi ra cn cho php gn thm b nhmrng nh RAM , EPROM.

v Cc ng vo ra I / O

Cc ng tn hiu t b cm bin c ni vo cc modul ( cc u vo ca PLC ) ,

cc ccu chp hnh c ni vi cc modul ra ( cc u ra ca PLC ) .Hu ht cc PLC c n p hot ng bn trong l 5V , tn hiu x l l 12/24VDC

hoc 100/240VAC.

Mi n v I / O c duy nht mt a ch , cc hin th trng thi ca cc knh I / O

c cung cp bi cc n LED trn PLC , iu ny lm cho vic kim tra hot ng nhp

xut trnn d dng v n gin .

B x l c v xc nh cc trng thi u vo (ON,OFF) thc hin vic ng hay

ngt mch u ra .

1.4.c im .ng dng ca hthng u khin PLC trong cng nghip:

1.4.1.c m:

Trong giai on u ca thi k pht trin cng nghip vo khong nm 1960 v 1970,

yu cu tng ca hu khin c thc hin bng cc Rle in t ni ni vi nhau

bng dy dn n trong bng u khin, trong nhiu trng hp bng u khin c kch

thc qu ln n ni khng th gn ton b ln trn tng v cc dy ni cng khng hon

ton tt v th rt thng xy ra trc trc trong h thng. Mt m quan trong na l do thi

gian lm vic ca cc Rle c gii hn nn khi cn thay th cn phi ngng ton b hthng v dy ni cng phi thay mi cho ph hp, bng u khin ch dng cho mt yu

cu ring bit khng th thay i tc thi chc nng khc m phi lp gip li ton b, v

trong trng hp bo tr cng nh sa cha cn i hi th chuyn mn c tay ngh cao.

Tm li hu khin Rle hon ton khng linh ng.

*Tm tt nhc m ca h thng u khin dng Rle:

- Tn km rt nhiu dy dn .

- Thay th rt phc tp.

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- Cn cng nhn sa cha tay ngh cao.

- Cng sut tiu th ln .

- Thi gian sa cha lu.

- Kh cp nht s nn gy kh khn cho cng tc bo tr cng nh thay th.

u im ca hu khin PLC:

S ra i ca hu khin PLC lm thay i hn h thng u khin cng nh cc

quan nim thit k v chng, hu khin dng PLC c nhiu u im nh sau:

- Gim 80% S lng dy ni.

- Cng sut tiu th ca PLC rt thp .

- C chc nng t chun on do gip cho cng tc sa cha c nhanh chng v

d dng.

- Chc nng u khin thay i d dng bng thit b lp trnh (my tnh, mn hnh) m

khng cn thay i phn cng nu khng c yu cu thm bt cc thit b vo, ra.

- S lng Rle v Timer t hn nhiu so vi hu khin cn.

- S lng tip m trong chng trnh s dng khng hn ch.- Thi gian hon thnh mt chu trnh iu khin rt nhanh (vi mS) dn n tng cao tc

sn xut .

- Chi ph lp t thp .

- tin cy cao.

- Chng trnh iu khin c th in ra giy ch trong vi pht gip thun tin cho vn

bo tr v sa cha h thng.

1.4.2. ng dng ca hthng u khin PLC:T cc u im nu trn, hin nay PLC c ng dng trong rt nhiu lnh vc khc

nhau trong cng nghip nh:

- H thng nng vn chuyn.

- Dy chuyn ng gi.

- Cc ROBOT lp gip sn phm .

-iu khin bm.

- Dy chuyn x l ho hc.

- Cng ngh sn xut giy .

- Dy chuyn sn xut thu tinh.

- Sn xut xi mng.

- Cng ngh ch bin thc phm.

- Dy chuyn ch to linh kin bn dn.

- Dy chuyn lp gip Tivi.

-iu khin h thng n giao thng.

- Qun l tng bi u xe.

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- H thng bo ng.

- Dy chuyn may cng nghip.

-iu khin thang my.

- Dy chuyn sn xut xe t.

- Sn xut vi mch.

- Kim tra qu trnh sn xut .

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( 2.5 V; ( 5 V;1 .. 5 V; ( 10 V; ( 3.2 mA; ( 10 mA; ( 20 mA; 0 .. 20 mA; 4 ..20 mA. in tr

150 (; 300 (; 600 (; o nhiy dng cp nhit E, N, J, K, L, nhit kn trPt 100, Ni

100. Cc thng s mc nh c ci sn trn module, kt hp vi t v tr ca module

tm o (bn v tr A, B, C, D) nu khng cn thay i th c th s dng ngay.

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- SM331, AI 8*12 bit , 8 knh vi sai chia lm hai nhm, phn gii 9 (12, 14

) bit + du

- SM331, AI 8*16 bit , 8 knh vi sai chia lm 2 nhm , phn gii 15 bit +

du

+ Module Analog Out:

Cung cp p hay dng ph thuc s nh phn ph hai

SM332 AO 4*12 bit: 4 ng ra dng hay p phn gii 12 bit, thi gian

chuyn i 0.8 ms .

SM332 AO 2*12 bit

SM332 AO 4*16 bit

+ Module Analog In/Out

- SM 334; AI 4/AO 2 * 8 Bit

- SM334; AI 4/AO 2* 12 Bit

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Module chc nng FM

FM350-1 : m xung mt knh

FM350-2 : m xung tm knh

FM351, 353, 354, 357-2 : iu khin nh v

FM352: bu khin cam n t

FM355: bu khin h kn

+ Module IM

Module IM360 gn rack 0 k CPU dng ghp ni vi module IM361 t cc

rack 1, 2, 3 gip kt ni cc module mrng vi CPU khi s module ln hn 8. Cp ni

gia hai rack l loi 368.

Trong trng hp ch c hai rack, ta dng loi IM365.

2.2. Phn loi m hiu:

Trong qu trnh thc hin cu trc ca tn hiu sc biu din di dng:

1/ Bit : (v d I0.0) dng biu din s nh phn (c 2 gi tr 1 hoc 0).1

2/ Byte : (v d MB0) Mt Byte gm c 8 bits. V d gi tr ca 8 cng vo (IB0) hoc 8

cng ra (QB1),... c gi l mt byte:

0 0 1 1 0 1 0 1

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3/ Word: (v d MW0= MB0 + MB1) Mt Word gm c 2 Byte nh vy mt Word c

di 16 bits.

0 0 1 0 1 1 1 0 0 0 1 0 1 1 1 0

Byte 0 Byte 1

4/ Doppelword: (v d MD0 = MW0 + MW2): c di 2 t hoc 4 Byte tc l 32 bits.

2.3. Kiu dliu:

Mt chng trnh trong S7-300 c thsdng cc kiu dliu sau:

1/ BOOL: vi dung lng l 1 bit v c gi tr l 0 hoc 1 (ng hoc sai). y l kiu

d liu bin c hai gi tr.

2/ BYTE: gm 8 bits, thng c dng biu din mt s nguyn dng trong

khong t 0 n 255 hoc m ASCII ca mt t.V d: B#16#14 ngha l s nguyn 14 vit theo hm cs 16 c di 1 byte.

3/ WORD: gm 2 byte, biu din s nguyn dng t 0 n 65535 (216 - 1).

4/DWORD: L t kp c gi tr l: 0 n 232-1.

5/ INT: cng c dung lng l 2 bytes, dng biu din mt s nguyn trong khong -

32768 n 32767 hay ( 2-15...215-1).

6/ DINT: gm 4 bytes, dng biu din s nguyn t -2147483648 n 2147483647

hay: (2-31....231-1).

7/ REAL: gm 4 bytes, dng biu din mt s thc du phy ng c gi tr l: -3,4E38.....3,4E38.

V d: 1.234567e+13

8/ S5t (hay S5Time): khong thi gian, c tnh theo gi/pht/giy: (-2-31+ 231-1 ms).

V d: S5t#2h_3m_0s_5ms.

y l lnh to khong thi gian l 2 ting ba pht v 5 mili giy.

9/TOD: Biu din gi tr tc thi tnh theo Gi/pht/giy.

V d: TOD#5:30:00 l lnh khai bo gi tr thi gian trong ngy l 5 gi30 pht.

10/ DATE: Biu din thi gian tnh theo nm / ngy / thng.

V d: DATE#2003-6-12

L lnh khai bo ngy12 thng 6 nm 2003.

11/ CHAR: biu din mt hoc nhiu k t (nhiu nht l 4 k t) (ASCII - code).

V d: ABCD

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2.4. Cu trc vng nhv phng php truy cp vng nhca CPU S7-300:

+ c chia ra lm 3 vng chnh:

1) Vng cha chng trnh ng dng: vng nhchng trnh c chia lm 3 min:

a/ OB: Min cha chng trnh t chc (cc chng trnh ny sc gii thiu

mc 1.2.5).

b/ FC: (Funktion): min cha chng trnh con c t chc thnh hm c bin hnh

thc trao i d liu vi chng trnh gi n.

c/ FB: (Funktion Block): Min cha chng trnh con, c t chc thnh hm v c

kh nng trao i d liu vi bt c mt khi chng trnh no khc. Cc d liu ny

phi c xy dng thnh mt khi d liu ring (gi l DB-Data block).

2) Vng cha cc tham s ca hu hnh v chng trnh ng dng, c phn chia

thnh 7 min khc nhau, bao gm:

a. I (Procees image input): min bm cc d liu cng vo s. Trc khi thc hin

chng trnh, PLC sc gi tr logic ca tt c cc u vo v ct gi chng trong

vng nh I. Thng thng chng trnh ng dng khng c trc tip trng thilogic ca cng vo s m ch ly d liu ca cng vo t bm I.

b. Q (Process image output): min bm cc cng ra s. Kt thc giai n thc hin

chng trnh s chuyn gi tr logic ca bm ti cc cng ra s. Thng thng

khng trc tip gn gi tr ti tn cng ra m ch chuyn chng vo bm Q.

c. M: Min cc bin c. Chng trnh ng dng s dng vng nhny lu gi cc

tham s cn thit v c th truy cp n theo bit (M), byte (MB), t (MW) hay t kp

(MD).

d. T: Min nhphc v b thi gian (TIME) bao gm vic lu gi gi tr thi gian ttrc (PV-preset value), gi trm thi gian tc thi (CV- Curren value) cng nh

cc gi tr logic u ra ca b thi gian.

e. C: Min nhphc v bm (counter) bao gm vic lu gi gi trt trc (PV), v

gi trm tc thi (CV) v gi tr logic u ra ca bm.

f. PI: Min a ch cng vo ca cc modul tng t. Cc gi tr tng t ti cng vo

ca modul tng t sc c v chuyn tng theo nhng a ch. Chng trnh

ng dng c th truy nhp min nh PI theo tng byte (PIB), tng t (PIW) hoc

theo t kp (PID).

g. PQ: min a ch cng ra cho cc modul tng t. Cc ga tr theo nhng a ch ny

c modul tng t chuyn ti cc cng ra tng t. Chng trnh ng dng c th

truy cp min nhPQ theo tng byte (PQB), tng t (PQW) hay tng t kp (PQD)

3) Vng cha cc khi d liu: c chia lm hai loi:

a. DB (Data block): min cha cc d liu c t chc thnh khi. Kch thc cng

nh s lng do ngi s dng qui nh, ph hp vi tng bi ton iu khin.

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Preset

MB0..MB15

Preset

MB0..MB15

Preset

MB0..MB15

Preset MB0..MB15

Counter adjustable

Retentivity

C0..C31

Preset C0..C7

adjustable

Retentivity

C0..C63

Preset C0..C7

adjustable

Retentivity

C0..C63

Preset C0..C7

Adjustable

Retentivity C0..C63

Preset C0..C7

Timer T0..T63 noretentivity

T0..T127Adjustable

Retentivity

T0..T31

Preset: no

T0..T127Adjustable

Retentivity

T0..T127

Preset: no

T0..T127Adjustable

Retentivity

T0..T71

Preset: no

Digital inputs 10 integrated +

128

128 512 496 + 20 integrated

Digital outputs

6 integrated + 128 128 512 496 +16 integrated

Analog

inputs

32 32 64 64 + 4 integrated

Analog outputs 32 32 64 64 + 1 integrated

Process

image input

I0.0.. I127.7 I0.0.. I127.7 I0.0.. I127.7

Process

image output

Q0.0 ..Q127.7 Q0.0 ..Q127.7 Q0.0 ..Q127.7

2.5. Cu trc chng trnh:

2.5.1.Lp trnh tuyn tnh:

Phn b nhca CPU dnh cho chng trnh ng dng c tn gi l logic Block. Nh

vy logic block l tn chung gi tt c cc khi bao gm nhng khi chng trnh t

chc OB, khi chng trnh FC, khi hm FB. Trong cc loi khi chng trnh th ch

c khi duy nht khi OB1 c thc hin trc tip theo vng qut. N c hu hnh

gi theo chu k lp vi khng thi gian khng cch u nhau m ph thuc vo di ca

chng trnh. Cc loi khi chng trnh khc khng tham gia vo vng qut.

Vi t chc chng trnh nh vy th phn chng trnh trong khi OB1 c y u

kin ca mt chng trnh iu khin thi gian thc v ton b chng trnh ng dng c

th ch cn vit trong OB1 l nh hnh v sau. Cch t chc chng trnh vi ch mt

khi OB1 duy nht nh vy c gi l lp trnh tuyn tnh.

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Hnh 2-1: S khi kiu lp trnh tuyn tnh

2.5.2.Lp trnh c cu trc:

Khi OB1 c h thng gi xoay vng lin tc theo vng qut.

Cc khi OB khc khng tham gia vo vng qut c gi bng nhng tn hiu bo

ngt. S7-300 c nhiu tn hiu bo ngt nh tn hiu bo ngt khi c s c ngun nui, c s

c chp mch cc modul mrng, tn hiu bo ngt theo chu k thi gian, v mi loi tnhiu bo ngt nh vy cng ch c kh nng gi mt khi OB nht nh. V d tn hiu bo

ngt s c ngun nui ch gi khi OB81, tn hiu bo ngt truyn thng ch gi khi OB87.

Mi khi xut hin tn hiu bo ngt h thng s dng cng vic ang thc hin li, chng

hn nh tm dng vic thc hin chng trnh trong OB1, v chuyn sang thc hin chng

trnh x l ngt tong cc khi OB tng ng. V d khi ang thc hin chng trnh trong

khi OB1 m xut hin ngt bo s c truyn thng, h thng s tm dng vic thc hin

chng trnh trong OB1 li gi chng trnh trong khi truyn thng OB87. Ch sau khi

thc hin xong chng trnh trong khi OB87 th h thng mi quay trv hc hin tiptc phn chng trnh cn li trong OB1.

Vi kiu lp trnh c cu trc th khc v ton b chng trnh iu khin c chia nh

thnh cc khi FC v FB mang mt nhim v c th ring v c qun l chung bi nhng

khi OB. Kiu lp trnh ny rt ph hp cho nhng bi ton phc tp, nhiu nhim v v li

rt thun li cho vic sa cha sau ny.

Hnh 2-2: S kiu lp trnh c cu trc.

OB1 thchin theovng qut

OB82 Modulchun on li

OB10 Nght thi m nh

trc

OB

FB FC

FBFB

SFB

SFC

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OB: Organization Block

FB: Function Block

FC: Function

SFB: System Function block

SFC: System function

SDB: System Data Block

DB: Data block

Ch : Bao giFB cng s dng chung vi DB.

2.6. Vng qut ca chng trnh:

SPS (PLC) thc hin cc cng vic (bao gm c chng trnh iu khin) theo chu

trnh lp. Mi vng lp c gi l mt vng qut (scancycle). Mi vng qut c bt

u bng vic chuyn d liu t cc cng vo s ti vng bm o I, tip theo l giaion thc hin chng trnh. Trong tng vng qut , chng trnh c thc hin t lnh

u tin n lnh kt thc ca khi OB1. Sau giai n thc hin chng trnh l giai

on chuyn cc ni dung ca bm o Q ti cc cng ra s. Vng qut c kt thc

bng giai n x l cc yu cu truyn thng (nu c) v kim tra trng thi ca CPU.

Mi vng qut c th m t nh sau:

Vng qut (Cycle scan):

Hnh1-8: Qu trnh hotng ca mt vng qut.

Ch : Bm I v Q khng lin quan ti cc cng vo/ra tng tnn cc lnh truy

nhp cng tng tc thc hin trc tip vi cng vt l chkhng thng qua bm.

Nhn cc t n hiu u voGi cc tn hiu t i u ra

Kim tra trng thi l mvic ca CPU

Thc hin chngtrnh iu khin

X l cc yu cu v truy n thng (n u c)

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Thi gian cn thit cho PLC thc hin c mt vng qut c gi l thi gian vng

qut (Scan time). Thi gian vng qut khng cnh, tc l khng phi vng qut no cng

c thc hin trong mt khong thi gian nh nhau. C vng qut c thc hin lu, c

vng qut c thc hin nhanh tu thuc vo s lnh trong chng trnh c thc hin,

vo khi lng d liu truyn thng. Trong vng qut .

Nh vy gia vic c d liu ti tng x l, tnh ton v vic gi tn hiu u

khin n i tng c mt khong thi gian trng bng thi gian vng qut. Ni cch

khc, thi gian vng qut quyt nh tnh thi gian thc ca chng trnh iu khin trong

PLC. Thi gian vng qut cng ngn, tnh thi gian thc ca chng trnh cng cao.

Nu s dng cc khi chng trnh c bit c ch ngt, v d khi OB40, OB80,...

Chng trnh ca cc khi sc thc hin trong vng qut khi xut hin tn hiu bo

ngt cng chng loi. Cc khi chng trnh ny c th thc hin ti mi vng qut ch

khng phi b g p l phi trong giai n thc hin chng trnh. Chng hn mt tn

hiu bo ngt xut hin khi PLC ang giai n truyn thng v kim tra ni b, PLC s

tm dng cng vic truyn thng, kim tra, thc hin ngt nh vy, thi gian vng quts cng ln khi cng c nhiu tn hiu ngt xut hin trong vng qut. Do nng cao

tnh thi gian thc cho chng trnh iu khin, tuyt i khng nn vit chng trnh x l

ngt qu di hoc qu lm dng vic s dng ch ngt trong chng trnh iu khin.

Ti thi m thc hin lnh vo/ra, thng thng lnh khng lm vic trc tip vi

cng vo/ra m ch thng qua b nhm ca cng trong vng nh tham s. Vic truyn

thng gia bm o vi ngoi vi trong giai n 1 v 3 do hu hnh CPU qun l.

mt s modul CPU, khi gp lnh vo/ra ngay lp tc h thng s cho dng mi cng vic

khc, ngay c chng trnh x l ngt, thc hin vi cng vo/ra.

2.7. Nhng khi OB c bit:

Khi OB1 c chc nng qun l chnh trong ton b chng trnh, c ngha l n s thc

hin mt cch u n tng vng qut trong khi thc hin chng trnh. Ngoi ra Step7

cn c rt nhiu cc khi OB c bit khc v mi khi OB c mt nhim v khc nhau,

v d cc khi OB cha cc chng trnh ngt ca cc chng trnh bo li ,....Tu thuc

vo tng loi CPU khc nhau m c cc khi OB khc nhau. V d cc khi OB c bit.

1. OB10: (Time of Day Interrupt): Chng trnh trong khi OB10 sc thc hin khi

gi tr ca ng h thi gian thc nm trong mt khong thi gian qui nh. OB10 c

thc gi mt ln, nhiu ln cch u nhau tng pht, tng gi, tng ngy,....Vic qui

nh thi gian hay s ln gi OB10 c thc hin bng chng trnh h thng SFC28

hoc trong bng tham s modul CPU nhphn mm Step7.

2. OB20: (Time Delay Interrupt): chng trnh trong khi OB20 sc thc hin sau mt

khong thi gian trt trc k t khi gi chng trnh h thng SFC32 t thi

gian tr.

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3. OB35: (Cyclic Interrupt): Chng trnh OB35 sc thc hin cch u nhau mt

khong thi gian cnh. Mc nh khong thi gian ny l 100ms, xong ta c th thay

i trong bng t tham s cho CPU nhphn mm Step7.

4. OB40 ( Hardware Interrupt): Chng trnh trong khi OB40 sc thc hin khi xut

hin mt tn hiu bo ngt t ngoi vi a vo CPU thng qua cc cng vo/ra s

onboard c bit, hoc thng qua cc modul SM, CP, FM.

5. OB80: (cycle Time Fault): Chng trnh sc thc hin khi thi gian vng qut (scan

time) vt qua khong thi gian cc i qui nh hoc khi c mt tn hiu ngt gi

mt khi OB no m khi OB ny cha kt thc ln gi trc. Mc nh, scan time

cc i l 150ms, nhng c th thay i tham s nhphn mm Step7.

6. OB81( Power Supply Fault): nu c li v phn ngun cung cp th s gi chng trnh

trong khi OB81.

7. OB82: (Diagnostic Interrupt) chng trnh trong khi ny sc gi khi CPU pht

hin c li t cc modul vo/ra m rng. Vi u kin cc modul vo/ra ny phi c

chc nng t kim tra mnh.8. OB85 (Not Load Fault): CPU s gi khi OB85 khi pht hin chng trnh ng dng c

s dng ch ngt nhng chng trnh x l tn hiu ngt li khng c trong khi OB

ng ng.

9. OB87 (Communication Fault): Chng trnh trong khi ny sc gi khi CPU pht

hin thy li trong truyn thng.

10. OB100 (Start Up Information): Khi ny sc thc hin mt ln khi CPU chuyn

trng thi t STOP sang trng thi RUN.

11. OB121: (Synchronouns error): Khi ny sc gi khi CPU pht hin thy li logictrong chng trnh nhi sai kiu d liu hoc li truy nhp khi DB, FC, FB khng

c trong b nhca CPU.

12. OB122 (Synchronouns error): Khi ny sc thc hin khi CPU pht hin thy li

truy nhp Modul trong chng trnh, v d trong chng trnh c lnh truy nhp modul

mrng nhng li khng c modul ny.

thc hin thay i cc chc nng ca cc khi OB trong CPU ta ch cn kch p

chut tri vo v t CPU trong bng cu hnh cng ca Project khi trn mn hnh s xut

hin mt ca s nh sau:

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Hnh 1-9: Bng thay i chc nng cho OB

Ch : Khng phi tt c cc CPUu c cc khi OBs nh gii thiu. Slng v

chng loi khi OB tu thuc vo tng loi CPU.

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Chng 3: Thit b phn cng ca PLC:3.1. Cc modul:

3.1.1. Gii thiu chung:

Mun xy dng mt chng trnh iu khin s dng phn mm Step7 cn thc hin cc

th tc nh sau:- Khai bo cu hnh cng cho mt trm PLC thuc h Simatic S7-300/400.

- Xy dng cu hnh mng gm nhiu trm PLC S7-300/400 cng nh th tc truyn

thng gia chng.

- Son tho v ci t chng trnh iu khin cho 1 hoc nhiu trm.

- Gim st vic thc hin chng trnh iu khin trong mt trm PLC v g ri chng

trnh.

Ngoi ra Step 7 cn c c mt th vin y vi cc hm chun hu ch, phn trgip

Online rt mnh c kh nng tr li mi cu hi ca ngi s dng v cch s dng Step 7,v c php lnh trong lp trnh, v xy dng cu hnh cng ca mt trm cng nh ca mt

mng gm nhiu trm PLC.

3.1.2. Cc modul:

1/ PS(Power supply): modul ngun nui. C 3 loi 2A ,5A v 10A.

Hnh 1-7:S btr mt trm PLC( S7-300).2/ SM: Modul mrng cng rn hiu vo ra , bao gm:

a) DI(Digital input): Modul m rng cng vo s. S cc cng vo ca modul ny c

th l 8, 16, 32 tu thuc vo tng loi modul.

b) DO(Digital output) Modul mrng cng ra s. S cc cng ra ca modul ny c th

l 8, 16, 32 tu thuc vo tng loi modul.

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c) DI/DO: (Digital input/ Digital output): modul m rng cc cng vo/ra s s cc

cng vo/ra c th l 8 vo/8 ra hoc 16 vo/16 ra tu thuc vo tng loi modul.

d) AI(Analog Input): Modul mrng cc cng vo tng t. V bn cht chng chnh

l nhng b chuyn i tng t-s (AD), tc l mi tn hiu tng tc chuyn

thnh mt tn hiu s (nguyn ) c di 12 bt, s cc cng vo c th l 2, 4 hoc 8

tu thuc vo tng loi Modul.

e) AO(Analog ouput): Modul m rng cc cng ra tn hiu tng t. Chng chnh l

cc b chuyn i s - tng t (DA). S cc cng ra tng t c th l 2 hoc 4 tu

thuc tng loi modul.

f) AI/AO (Analog input/Analog output): Modul m rng cc cng vo ra tng t. S

cc cng c th l 4 vo/2 ra hoc 4 vo/4 ra tu thuc vo tng loi modul.

3/ IM (Interface module): Modul ghp ni. y l loi modul chuyn dng c nhim v

ni tng nhm cc modul m rng li vi nhau thnh mt khi v c qun l chung

bi mt modul CPU. Thng thng cc modul mrng c g lin vi nhau trn mt

thanh gi l Rack. Trn mi mt Rack ch c th g c nhiu nht 8 modul mrng (khng k modul CPU, Modul ngun nui). Mt modul PU S7-300 c th lm vic

trc tip c vi nhiu nht 4 Racks v cc Racks ny phi c ni vi nhau bng

modul IM.

4/ FM (Function modul): modul c chc nng u khin ring , v d Modul chc nng

iu khin ng c bc , modul u khin ng c Servo, modul PID, modul iu

khin vng kn.

5/ CP (communication modul): Modul phc v truyn thng trong mng gia cc PLC

vi nhau hoc gia PLC vi my tnh.

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3.2. Xy dng cu hnh cng cho trm PLC.

3.2.1. Xy dng cu hnh cng:

c1. Khai bo v mmt Project mi:

Mmt file mi : Vo File chn New xut hin hp thoi.(Hnh 1.4)

Sau khi khai bo xong mt Project mi, trn mn hnh s xut hin Project nhng

dng rng (cha c g trong project), iu ny ta nhn bitc qua biu tng th mcbn cnh tn Project ging nh mt th mc rng ca Window.(Hnh 1.5)

t tnfile

ngn

ngn ctfile

Hnh 1.4: Khai bo v mmt Project mi

Biung

Hnh 1.5 : Biu tng mt Project mi.

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c 2: Khai bo cu hnh cng cho mt trm PLC :

Vi simatic S7-300 bng cch vo: Insert -> Station ->Simatic 300- Station:(Hnh 1.6)

Trong trng hp khng mun khai bo cu hnh cng m i ngay vo chng trnh ng

dng ta c th chn thng. ng tc ny s hu ch cho nhng trng hp mt trm PLC c

nhiu phin bn ng dng khc nhau.

Sau khi khai bo mt trm (chn mt Station), th mc Project chuyn sang dng

khng rng vi th mc con trong n tn mc nh l Simatic300(1) cha tp thng tin v

cu hnh cng ca trm.(Hnh 1.7)

Khai bo mttrm PLC S7-300

Hnh 1.6: Khai bo cu hnh cng cho

p chathng tin vu hnh cnga trm

Hnh 1.7:Mn hnh khai bo cu hnh cn cho t m PLC

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vo mn hnh khai bo cu hnh cng, ta nhy chut ti biu tng Hardware. Trong

hp thoi hin ra ta khai bo thanh Ray (Rack) v cc module c trn thanh Ray .

V d:(Hnh 1.8)

Hnh 1.8: Thvin ly cc Modul

3.2.2. Cc m modul PLC :Khi khai bo phi ng m hiu cho tng module(m hiu ny c ghi trc tip trn

cc module) thc hin khai bo ng trnh t sau:

1. Khai bo ngun nui cho CPU : SPS 307 2A 6ES7 307_1BA00_ 0AA0

2. Khai bo loi CPU: CPU314 6ES7 314_1AE04_ 0AA0

3. Khai bo module IMy l module ghp ni gicc module mrng thnh mt

khi v c qun l chung bi mt CPU (nu cn sdng th khai bo): IFM

360 6ES7 360_3AA00_ 0AA0

Ch : Tvtr s4 11 y l cc vtrkhai bo cc modul mrng:

4. Khai bo modul mrng DI/DO. : DI8/DO8xDC24V/0,5V 6ES7 323 _

1BH01_ 0AA0

5. Khai bo modul mrng DI/DO.: DI8/DO8xDC24V/0,5V 6ES7 323 _

1BH01_ 0AA0

6. Khai bo modul mrng AI/AO.: AI4/AO2x8/8bit 6ES7 334 _ 0CE01_

0AA0

7. ...................

ngdanhcccmodul lach n

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Step7 gip vic khai bo cu hnh cng c n gin nhbng danh mc cc module

ca n. Mun a module no vo bng cu hnh ta ch cn nh du v tr ni module s

c a vo ri nhy kp chut tri ti tn ca module trong bng danh mc cc

module km theo.

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Chng 4: Ngn nglp trnh

4.1..Qui trnh thit kchng trnh iu khin dng PLC:

Qui trnh thit k h thng u khin dng PLC bao gm cc bc sau:

1.Xc nh qui trnh iu khin:

iu u tin cn bit l i tng u khin ca h thng, mc ch cnh ca PLC l

phi u khin c cc thit b ngoi vi. Cc chuyn ng ca i tng u khin c

kim tra thng xuyn bi cc thit b vo, cc thit b ny gi tn hiu n PLC v tip

theo PLC sa tn hiu iu khin n cc thit bu khin chuyn ng ca i

ng. n gin, qui trnh iu khin c th m t theo lu (hnh v 2-3).

2.xc nh tn hiu vo ra:c th hai l phi xc nh v tr kt ni gia cc thit b vo ra vi PLC. Thit b vo

c th l tip m, cm bin, Thit b ra c th l Rle in t, Motor, n, Mi v tr kt

ni c nh s tng tng vi PLC s dng.

3.Son tho chng trnh:

Chng trnh iu khin c son tho di dng lu hnh thang nh trnh by

c 1.

4.Np chng trnh vo b nh:

Cp ngun cho PLC, ci t cu hnh khi giao tip I/O nu cn (Ph thuc vo tng

loi PLC). Sau np chng trnh son tho trn mn hnh vo b nhca PLC. Sau khi

hon tt nn kim tra li bng chc nng t chun on v nu c th th chy chng trnh

m phng hot ng ca h thng (V d chng trnh S7-SIM, S7- VISU,...).

5.Chy chng trnh:

Trc khi khi ng h thng cn phi chc chn dy ni t PLC n cc thit b ngoi

vi l ng, trong qu trnh chy kim tra c th cn thit phi thc hin cc bc tinh chnhh thng nhm m bo an ton khi a vo hot ng thc t.

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Qui trnh thit k h thng u khin bng PLC:

Hnh 2-3: Qui trnh thit kmt h thng u khin tng.

a cha chngtrnh

NO

Xc nh yu cu

a h thng

lu ukhin

Lit k cc thit I/Otng ngi cc u I/O

a PLC

Son thochng trnh

p chng trnhvo PLC

Chy m phngv tm li

t ni cc thit

I/O vo PLC

Kim tra dy ni

Chy th chngtrnh

Kim tra

p vo EPROM

o ti liuchng trnh

Chm dt

Chy tt?

Chy tt?

YESNO

YES

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3/ Ngn nglp trnh STL

y l ngn ng lp trnh thng thng ca my tnh. Mt chng trnh c ghp bi

nhiu lnh theo mt thut ton nht nh, mi lnh chim mt hng v u c cu trc

chung l : "tn lnh" + "ton hng".

V d:

Hnh 2-6: V d kiu lp trnh STL.4/ Ngn nglp trnh SCL (Structured Control Language):

Kiu vit chng trnh ny s dng ngn ng PASCAL. Rt ph hp cho nhng ngi

vit cc chng trnh bng ngn ng my tnh.

v d:

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5/ Ngn nglp trnh : S7-Graph.

V d:

Hnh2-7: S khi lp trnh kiu S7-Graph.

6/ Ngn nglp trnh : S7-HiGraph.

y l mt loi ngn ng vit chng trnh rt ph hp cho cc bi ton lm vic c tnhtun t. Ti mi thi m ch c mt bc c thc hin. Vi kiu lp trnh ny ngi lp

trnh phi s dng phng php lp trnh c cu trc.

V d:

Hnh 2-8 : S lp trnh bng ngn ngS7-HiGraph.

Trong cun ti liu ny s gii thiu 4 loi ngn ng dng lp trnh (FBD, STL, LAD

v S7GRAPH) trong phn bi tp mu.

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b) .Np chng trnh v gim st vic thc hin chng trnh.

+ . Np chng trnh son tho tPC xung CPU:

Chng trnh sau khi son tho cn c truyn xung CPU. lm c u ny,

ta nhn chut tri vo biu tng ny trn thanh cng c v tr li y cc cu

hi. Ch khi np chng trnh cn phi t CPU trng thi Stop hoc t CPU trng

thi RUN-P.

+ .Xo chng trnh c trong CPU:

thc hin vic np chng trnh mi t PC xung CPU ta cn thc hin cng vic

xo chng trnh c sn trong CPU. u ny ta thc hin cc bc nh sau:

- a trng thi ca CPU v STOP : T mn hnh chnh ca Step7 ta chn lnh:

Hnh 3-29

+ .Quan st vic thc hin chng trnh:

Sau khi np chng trnh son tho xung CPU lc ny chng trnh c ghi vob nhca CPU. Khi ta c th tch ri PC v CPU ca S7 m chng trnh vn hot

ng bnh thng. thc hin vic quan st qu trnh hot ng ca chng trnh v CPU

ta s dng chc nng gim st chng trnh bng cch nhn vo biu tng ny trn

thanh cng c. Sau khi chn chc nng gim st chng trnh ny th trn mn hnh s xut

hin mt ca s sau:

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Tu theo kiu vit chng trnh m ta nhn c s khc nhau v kiu hin th trn mn

hnh (Di y s dng kiu vit chng trnh FBD).

Hnh 3-30: Quan st qu trnh hotng.

Ngoi ra ta cn c th quan st c ni dung ca nh. Nhng nhmun quan st

cn phi khai bo trong bng Variable.

Hnh 3-31: Quan st ni dung ca nh.

Sau khi khai bo tt c cc bin cn quan st ta kch vo phm quan st trn mn hnh

xut hin ca s nh hnh trn. Tu theo yu cu m ta kch vo phm quan st tng ng

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trn mn hnh s hin th ni dung ca nhti thi m hin ti hay lin tc quan st theo

tng thi m.

4.3.Nhm hm Logic tip m:

1/ Hm AND : Ton hng l kiu dliu BOOL hay a chbit I,Q, M, T, C, D, LFBD LAD STL

Hnh 4-1: Cch khai bo hm AND

Tn hiu ra Q4.0 s bng 1 khi ng thi tn hiu I0.0=1 v I0.1=1.

D liu vo v ra :

Vo: I0.0, I0.1: BOOL

Ra : Q4.0 : BOOL

2/ Hm OR : Ton hng l kiu d liu BOOL hay a ch bit I,Q, M, T, C, D, L.

FBD LAD STL

Hnh 4-1: Cch khai bo hm AND

Tn hiu ra Q4.0 s bng 1 khi ng thi tn hiu I0.0=1 v I0.1=1.

D liu vo v ra :

Vo: I0.0, I0.1: BOOL

Ra : Q4.0 : BOOL

2/ Hm OR : Ton hng l kiu d liu BOOL hay a ch bit I,Q, M, T, C, D, L.

FBD LAD STL

Hnh 4-2: Khai bo hm OR

Tn hiu ra s bng 1 khi t nht c mt tn hiu vo bng 1.

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D liu vo v ra:

Vo : I0.0, I0.1: BOOL

Ra : Q4.0: BOOL

3/ Hm NOT:

FBD LAD STL

Hnh 4-3: Khai bo hm thc hin chc nng phnh.

Tn hiu ra s l nghich o ca tn hiu vo.

D liu vo v ra:

Vo : I0.0 : BOOL

Ra : Q4.0 : BOOL

4/ Hm XOR: Ton hng l kiu dliu BOOL hay a chbit I, Q, M, T, C, D, L.

FBD LAD STL

Hnh 4-4: Khi thc hin chc nng XOR.

Tn hiu ra Q4.0= 1 khi I0.0 khc I0.2

D liu vo v ra:

Vo: I0.0, I0.1 : BOOL

Ra : Q4.0 : BOOL

5/ Lnh xo RESET: Ton hng l a chbit I, Q, M, T, C, D, L.

FBD LAD STL

Hnh 4-5: Khi thc hin chc nng RESET

Tn hiu ra Q4.0 = 0 (Q4.0 sc xo ) khi I0.0 =1 .

D liu vo v ra:

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Vo: I0.0 : BOOL

Ra : Q4.0 : BOOL

6/ Lnh SET: Ton hng l a chbit I, Q, M, T, C, D, L.

FBD LAD STL

Hnh 4-6: Khi thc hin chc nng SET.

Tn hiu ra Q4.0 = 1 (Q4.0 sc thit lp ) khi I0.0 =1.

D liu vo v ra:

Vo I0.0 : BOOL

Ra Q4.0 : BOOL

7/B nhRS: Ton hng l a chbit I, Q, M, D, L.FBD LAD STL

Hnh 4-7: Khi thc hin chc nng RS.

Khi I0.0 = 1 v I0.1 =0 Merker M0.0 b Reset v u ra Q4.0 l "0". Nu I0.0 = 0 v

I0.1 = 1 th Set cho M0.0 v u ra Q4.0 l "1".Khi c hai u vo Set va Reset cng ng thi =1 th M0.0 v Q4.0 c gi tr l "1".

D liu vo v ra:

Vo I0.0, I0.1 : BOOL

Ra Q4.0 : BOOL

8/ B nhSR: Ton hng l a chbit I, Q, M, D, L

FBD LAD STL

Hnh 4-8: Khi thc hin chc nng SR

Khi I0.0 = 1 v I0.1 =0 th Set cho Merker M0.0 v u ra Q4.0 l "1". Nu I0.0 = 0 v

I0.0 = 1 th M0.0 b Reset v u ra Q4.0 l "0".

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Khi c hai u vo Set va Reset cng ng thi =1 th M0.0 v Q4.0 c gi tr l "0".

D liu vo v ra:

Vo I0.0, I0.1 : BOOL

Ra Q4.0 : BOOL

Ch : Trong k thut s trng thi ca trigRS sb cm khi R=1 v S=1. Nn y c

hai loi b nhRS v SR l loi Trigu tin R hay u tin S

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4.4.B thi gian:

4.4.1 Nguyn l lm vic chung ca b Timer.

B thi gian Timer l b to thi gian tr T mong mun gia tn hiu logic u vo X(t)

v u ra Y(t)

S7-300 c 5 b thi gian Timer khc nhau. Tt c 5 loi Timer ny cng bt u to thigian tr tn hiu k t thi m c sn ln ca tn hiu u vo , tc l khi c tn hiu u

vo U(t) chuyn trng thi t logic "0" ln logic"1", c gi l thi m Timer c kch.

Thi gian tr T mong mun c khai bo vi Timer bng gi tr 16 bits bao gm hai

thnh phn :

- phn gii vi n v l mS. Timer ca S7 c 4 loi phn gii khc nhau l 10ms,

100ms, 1s v 10s.

- Mt s nguyn BCD trong khong t 0 n 999 c gi l PV ( Preset Value- gi trt

trc).Nh vy thi gian tr T mong mun sc tnh nh sau :

T= phn gii x PV.

Ngay ti thi m kch Timer, gi tr PV c chuyn vo thanh ghi 16 bits ca Timer

T-Word ( gi l thanh ghi CV- Curren value- gi tr tc thi). Timer s ghi nhkhong thi

gian tri qua k t khi kch bng cch gim dn mt cch tng ng ni dung thanh ghi CV.

Nu ni dung thanh ghi CV trv bng 0 th Timer t c thi gian mong mun T v

iu ny c bo ra ngoi bng cch thay i trng thi tn hiu u ra Y(t). Vic thng

bo ra ngoi bng cch i trng thi tn hiu du ra Y(t) nh th no cn ph thuc vo loi

Timer c s dng.

Bn cnh sn ln ca tn hiu u vo U(t), Timer cn c th kch bng sn ln ca

tn hiu kch chng c tn l tn hiu ENABLE nu nh ti thi m c sn ln ca tn

hiu ENABLE, tn hiu u vo U(t) c gic l "1".

Tng loi Timer c nh s t 0 n 255 (tu thuc vo tng loi CPU). Mt Timer

c t tn l Tx, trong x l s hiu ca Timer ( 0

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chng c cng a ch hnh thc , nhng T-Word v T-bits vn c phn bit vi nhau nh

kiu lnh s dng ton hng Tx. Khi dng lm vic vi t Tx c hiu l T-Word cn khi

lm vic vi m thi Tx c hiu l T-bit.

xa tc thi trng thi ca T-word v T-bit ngi ta s dng mt tn hiu reset Timer

. Ti thi m sn ln ca tn hiu ny gi tr T-Word v T-bit ng thi c gi tr bng 0

tc l thanh ghi tc thi CV c t v 0 v tn hiu u ra cng c trng thi Logic l "0".

Trong thi gian tn hiu Reset c gi tr logic l "1" Timer s khng lm vic.

4.4.2. Khai bo sdng:

Cc tn hiu u khin cho mt b Timer phi c khai bo bao gm cc bc sau:

- Khai bo tn hiu ENABLE nu mun s dng tn hiu chng kch.

- Khai bo tn hiu u vo U(t).

- Khai bo thi gian tr mong mun TW.

- Khai bo loi Timer c s dng (SP, SE, SD, SS, SF).

- Khai bo tn hiu xo Timer nu mun s dng ch Reset chng.Trong cc bc trn th bc 1 v 5 c th b qua .

- Dng d liu vo / ra ca b Timer:S : BOOL BI (DUAL): WORD

TW: S5TIME BCD (DEZ) : WORD

R : BOOL Q : BOOL

1. B thi gian SP:

- khi:

FBD LAD STL

Hnh 4-35: B thi gian SP.

-Nguyn l lm vic:

Ti thi m sn ln ca tn hiu vo SET thi gian sc tnh ng thi gi tr

Logic u ra l "1". Khi thi gian t kt thc gi tru ra cng trv 0.

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Tn hiu vo S

Tn hiu vo R

Thi gian t

u ra

u ra o

Hnh 4-36: Gin thi gian ca b to trkiu SP.

Khi c tn hiu RESET (R) thi gian tnh lp tc trv 0 v tn hiu u ra cng gi tr

l "0".

-Trng hp khng s dng cc tn hiu u vo SET(S), RESET ( R), BI v BCD ta sdng khi Timer SI sau:

Tn hiu u vo I0.0 chnh l tn

hiu kch.

S5T#2s l thi gian t 2s

Tn hiu ra ca b thi gian tcng ti u ra Q4.0

Hnh 4-37: V d khai bo mt b thi gian SP

2. B thi gian SE.

FBD LAD STL

Hnh 4-38: Khi hm thi gian SE

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-Nguyn l lm vic:

Ti thi m sn ln ca tn hiu vo SET cui cng b thi gian c thit lp v

thi gian sc tnh ng thi gi tr Logic u ra l "1". Kt thc thi gian t tn hiu

u ra s trv 0.

Tn hiu vo S

Tn hiu vo R

Thi gian t

u ra

u ra o

Hnh 4-39: Gin thi gian khi SE

Khi c tn hiu RESET (R) thi gian tnh lp tc trv 0 v tn hiu u ra cng gi tr

l "0".

3. B thi gian SD.

FBD LAD STL

Hnh 4-40: S khi hm SD.-Nguyn l lm vic:

Ti thi m sn ln ca tn hiu vo SET b thi gian c thit lp v thi gian s

c tnh. Kt thc thi gian t tn hiu u ra s c gi tr l "1". Khi tn hiu u vo

kch S l "0" u ra cng lp tc trv "0" ngha l tn hiu u ra s khng c duy tr hi

tn hiu kch c gi tr l "0".

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Tn hiu vo S

Tn hiu vo R

Thi gian t

u ra

u ra o

Hnh 4-41: Gin thi gian SD.

Khi c tn hiu RESET (R) thi gian tnh lp tc trv "0" v tn hiu u ra cng gitr l "0".

-Trng hp khng s dng cc tn hiu u vo SET(S), RESET ( R), BI v BCD ta s

dng khi Timer SE sau:


hiu kch.


Tn hiu ra ca b thi gian tc

ng ti u ra Q4.0.

Hnh 4-42: v d sdng khi hm SD.

4. B thi gian SS:

FBD LAD STL

Hnh 4-43: Khai bo b thi gian SS .

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Tn hiu vo S

Tn hiu vo R

Thi gian t

u ra

u ra o

Hnh 4-44: Gin thi gian hm SS.-Nguyn l lm vic:

Ti thi m sn ln ca tn hiu vo SET b thi gian c thit lp v thi gian s

c tnh. Kt thc thi gian t tn hiu u ra s c gi tr 1 gi tr ny vn duy tr ngay c

khi tn hiu u vo kch S c gi tr l 0. Khi c tn hiu RESET (R) thi gian tnh lp tc

trv 0 v tn hiu u ra cng gi tr l "0".

-Trng hp khng s dng cc tn hiu u vo SET(S), RESET (R), BI v BCD ta s

dng khi Timer SS sau:


hiu kch.


Tn hiu ra ca b thi gian tc

ng ti u ra Q4.0

Hnh 4-45: V d sdng khi hm SS

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5. B thi gian SA:

FBD LAD STL

Hnh 4-46: S khi.

-Nguyn l lm vic:

Ti thi m sn ln ca tn hiu vo SET b thi gian c thit lp. Tn hiu u rac gi tr l 1. Nhng thi gian sc tnh thi m sn xung cui cng ca tn hiu

u vao SET(S). Kt thc thi gian t tn hiu u ra s trv 0.

Tn hiu vo S

Tn hiu vo R

Thi gian t

u ra

u ra o

Hnh 4-47: Gin thi gian.

Khi c tn hiu RESET (R) thi gian tnh lp tc trv 0 v tn hiu u ra cng gi trl "0".

-Trng hp khng s dng cc tn hiu u vo SET(S), RESET ( R), BI v BCD ta s

dng khi Timer SF sau:

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Tn hiu I0.0 l tn hiu kch

hi gian t S5T#2s l 2

m thi gian s tc ng ti u ra Q4.0

Hnh 4-48: Sdng hm SF.

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4.5. Bm COUNTER:4.5.1.Nguyn l lm vic:

Counter thc hin chc nng m ti cc sn ln ca cc xung u vo. S7-300 c

ti a l 256 bm ph thuc vo tng loi CPU, k hiu bi Cx. Trong x l s

nguyn trong khong t 0 n 255. Trong S7-300 c 3 loi bm thng sdng

nht l : Bm tin li (CUD), bm tin (CU)v bm li (CD).t bm tng qut c thc m t nh sau:trong :

CU : BOOL l tn hiu m tin

CD : BOOL l tn hiu m li

S : BOOL l tn hiu t

PV : WORD l gi trt trc

R : BOOL l tn hiu xo

CV : WORD L gi trm hm 16

CV_BCD: WORD l gi trm hm BCDQ : BOOL L tn hiu ra . Hnh 4-49: s khi bm Counter

Qu trnh lm vic ca bm c m t nh sau:

S sn xung m c, c ghi vo thanh ghi 2 Byte ca bm, gi l thanh ghi C-

Word. Ni dung ca thanh ghi C-Word c gi l gi trm tc thi ca bm v k

hiu bng CV v CV_BCD. Bm bo trng thi ca C-Word ra ngoi C-bit qua chn Q

ca n. Nu CV 0 , C-bit c gi tr "1". Ngc li khi CV = 0, C- bit nhn gi tr 0. CV

lun l gi tr khng m. Bm s khng m li khi CV = 0.

i vi Counter, gi trt trc PV chc chuyn vo C-Word ti thi m xut

hin sn ln ca tn hiu t ti chn S.

Bm sc xo tc thi bng tn hiu xo R (Reset). Khi bm c xa c C-

Word v C- bit u nhn gi tr 0.

4.5.2.Khai bo sdng:

Vic khai bo s dng mt Counter bao gm cc bc sau:

- Khai bo tn hiu Enable nu mun s dng tn hiu chng kch m (S): dng dliu BOOL

- Khai bo tn hiu u vo m tin CU : dng d liu BOOL

- Khai bo tn hiu u vo m li CD : dng d liu BOOL

- Khai bo gi trt trc PV: dng d liu WORD

- Khai bo tn hiu xo: dng d liu BOOL

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- Khai bo tn hiu ra CV nu mun ly gi trm tc thi h 16. dng d liu

WORD

- Khai bo tn hiu ra CV-BCD nu mun ly gi trm tc thi h BCD dng d

liu WORD

- Khai bo u ra Q nu mun ly tn hiu tc ng ca bm. dng d liu BOOL

Trong cn ch cc tn hiu sau bt buc phi khai bo: Tn ca bm cn s

dng, tn hiu kch m CU hoc CD.

1. Bm tin li:

- khi :

FBD LAD STL

Hnh 4-50: S khi bm tin li.

-Nguyn l hot ng:

Khi tn hiu I0.2 chuyn t 0 ln 1bm c t gi tr l 55. Gi tru ra Q4.0 =1 .

Bm s thc hin m tin ti cc sn ln ca tn hiu ti chn CU khi tn hiu I0.0

chuyn gi tr t "0" ln "1"

Bm sm li ti cc sn ln ca tn hiu ti chn I0.1 khi tn hiu chuyn t "0" ln

"1"

Gi tr ca bm s trv 0 khi c tn hiu tai sn ln ca chn R ( I0.3)

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Khi tn hiu I0.2 chuyn t "0" ln "1" bm c t gi tr l 55. Gi tru ra Q4.0

=1 .

Bm s thc hin m li ti cc sn ln ca tn hiu ti chn CD khi tn hiu I0.0

chuyn gi tr t "0" ln"1"

Gi tr ca bm s trv 0 khi c tn hiu tai sn ln ca chn R (I0.3).

Bm s chm n gi tr >= 0.

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4.6. Nhm hm so snh v chuyn dliu:

4.6.1. Nhm hm so snh:

4.6.1.1.Nhm hm so snh snguyn 16 bit:

FBD LAD STL

Hnh 4-9: Khi thc hin chc nng so snh bng nhau

C cc dng so snh hai s nguyn 16 bits nh sau :

Hm so snh bng nhau gia hai s nguyn 16 bits: ==

Hm so snh khc nhau gia hai s nguyn 16 bits:

Hm so snh ln hn gia hai s nguyn 16 bits: >

Hm so snh nh hn gia hai s nguyn 16 bits: =

Hm so snh nh hn hoc bng nhau gia hai s nguyn 16 bits:

Hm so snh nh hn gia hai s nguyn 32 bits: =

Hm so snh nh hn hoc bng nhau gia hai s nguyn 32 bits:

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4.6.1.3.Nhm hm so snh cc sthc 32 bits

FBD LAD STL

Hnh 4-11: Khi thc hin chc nng so snh hai sthc.

Trong v d trn u ra Q4.0 s l "1" khi MD0 < MD1 .

Cc dng so snh hai s thc 32 bits nh sau :

Hm so snh bng nhau gia hai s thc 32 bits: ==

Hm so snh khc nhau gia hai s thc 32 bits:

Hm so snh ln hn gia hai s thc 32 bits: >

Hm so snh nh hn gia hai s thc 32 bits: < Hm so snh ln hn hoc bng nhau gia hai s thc 32 bits: >=

Hm so snh nh hn hoc bng nhau gia hai s thc 32bits:

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4.7.Cc b ghi dch v quay s liu trn thanh ghi:

1. Dich phi snguyn 16 bits:

FBD LAD STL

Hnh 4-54: S khi dch phi.

Hnh 4-55: Nguyn l hotng.

Khi tn hiu kch I0.0 = 1 Khi s thc hin chc nng dich chuyn sang phi s liu

trong thanh ghi. ng thi tn hiu ra ti ENO l Q4.0 c gi tr l 1.

S liu a vo ti IN l MW0S bit s dich chuyn l MW2 ( ti chn N).

Kt qu sau khi dch c ct vo MW4.

Trn s cho ta thy kt qu ca b dch phi 4 bit.

2. Dich phi snguyn 32 bits:

- khi:

FBD LAD STL

Hnh 4-56: Khi dch phi.

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Khi tn hiu kch I0.0 = 1. Khi s thc hin chc nng dich chuyn sang phi s liu

trong thanh ghi. ng thi tn hiu ra ti ENO l Q4.0 c gi tr l 1.

S liu a vo ti IN l MD0

S bit s dch chuyn l MW2 (ti chn N). Kt qu sau khi dch c ct vo MW4.

Trn s cho ta thy kt qu ca b dch phi 4 bit.

3. Dich tri 16 bit:

- khi:

FBD LAD STL

Hnh 4-57: Khi dch tri.

-Nguyn l hot ng:

Khi c tn hiu kch I0.0 = 1 tn hiu ra Q4.0 c thit lp v c gi tr 1.

D liu u vo MW0 c dch sang tri vi s bit c t ti chn N (MW2).

Kt qu sau khi dch c ghi vo MW4.

-Gin thi gian:

Hnh 4-58: Gin thi gian b dch tri 6 v tr.

Ch : Trong trng hp cn dich tri mt s32 bits ta chcn khai bo dliu u vo

IN di dng MD v d: MD0 v kt quu ra cng sc lu giMD V d: MD4

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4. Quay tri s32 bits:

- khi:

FBD LAD STL

Hnh 4-59: S khi quay tri.

-Nguyn l hot ng:


D liu u vo MD0 c quay sang trI vi s bit c t ti chn N (MW4).

Kt qu sau khi dch c ghi vo MD10.

Hnh 4-60: Gin thi gian.

5. Quay phi s32 bits:

- khi:

FBD LAD STL

Hnh 4-61: s khi b quay phi.

-Nguyn l hot ng:


D liu u vo MD0 c quay phi vi s bit c t ti chn N (MW4).

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Kt qu sau khi dch c ghi vo MD10.

Hnh 4-62: Gin thi gian ca b dch phi 3 v tr s32 bits.

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4.8. Nhm hm i kiu dliu :

Trong ngn ng lp trnh ca S7-300 c mt s kiu d liu khc nhau nh:

- S nguyn 16 bits (Interger)

- S nguyn 32 bits (DI)

- S nguyn dng BCD.

- S thc REAL

- v mt s dng d liu khc .

Khi lm vic vi nhiu dng d liu khc nhau cho ta vn cn phi chuyn i chng.

V d khi c tn hiu t cng vo tng t ta nhn c s liu dng nguyn 16 bits mang

gi tr tn hiu tng t ch khng phi bn thn gi tr, bi vy x l tp th cn

thit phi chuyn i s nguyn thnh ng gi tr thc, du phy ng ca tn hiu

ng tcng. Ta c mt s hm chuyn i cc dng d liu nh sau:

4.8.1.Hm chuyn sBCD thnh ssnguyn 16 bits:

FBD LAD STL

Hnh 4-26: Chuyn i sBCD sang dng snguyn 16 bits.

D liu vo v ra:EN: BOOL IN: WORD

OUT: INT ENO: BOOL

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm thc hin chc nng chuyn s BCD

(MW10) sang s nguyn ri ct vo MW12.

Khi tin hiu vo I0.0 = 0 u ra Q4.0 = 0 v hm khng thc hin chc nng chuyn i.

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4.8.2. Hm chuyn i snguyn 16 bits sang dng BCD.

FBD LAD STL

Hnh 4-27: Chuyn i snguyn sang sBCD.

D liu vo v ra:EN: BOOL IN: INT

OUT: BCD ENO: BOOL

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm thc hin chc nng chuyn s nguyn

16 bits (MW10) sang s BCD ri ct vo MW12.

Khi tin hiu vo I0.0 = 0 u ra Q4.0 = 0 v hm khng thc hin chc nng chuyni.

4.8.3. Hm chuyn i snguyn 16 bits sang snguyn 32 bits:

FBD LAD STL

Hnh 4-28: Chuyn i snguyn 16 bits sang snhuyn 32 bits.

D liu vo v ra:EN: BOOL IN: INTOUT: DINT ENO: BOOL

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm thc hin chc nng chuyn s nguyn

16 bits (MW10) sang s nguyn 32 bits ri ct vo MW12.

Khi tn hiu vo I0.0 = 0 u ra Q4.0 = 0 v hm khng thc hin chc nng chuyn i.

4.8.4.Chuyn i sBCD sang snguyn 32 bits:

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Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm thc hin chc nng chuyn s BCD

(MW10) sang s nguyn 32 bits ri ct vo MW12.

Khi tn hiu vo I0.0 = 0 u ra Q4.0 = 0 v hm khng thc hin chc nng chuyn i.

FBD LAD STL

Hnh 4-29: Chuyn sBCD sang snguyn 32 bits

-Kiu d liu vo/ra:EN: BOOL IN: DWORD

OUT: DINT ENO: BOOL.

4.8.5.Hm o gi trcc bits .

1/Vi snguyn c di 16 bits:

-Nguyn l hot ng: Hm s thc hin chc nng chuyn i gi tr cc bits trong MW8

ri ct vo MW10 khi tn hiu I0.0 =1. ng thi gi tr Q4.0 = 1.

Khi I0.0 = 0, gi tr Q4.0 = 0

-Kiu d liu vo/ra:EN: BOOL IN: INT

OUT: INT ENO: BOOL

FBD LAD STL

Hnh 4-30: Hm thc hin chc nng o gi tr cc bits-V d:

Trc khi thc hin

Sau khi thc hin

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2/ Vi snguyn c di 32 bits.

FBD LAD STL

Hnh 4-31: Hm thc hin chc nng o gi tr cc bits.

-Nguyn l hot ng: Hm s thc hin chc nng chuyn i gi tr cc bits trong MD8

ri ct vo MD12 khi tn hiu I0.0 =1. ng thi gi tr Q4.0 = 1 .

Khi I0.0 = 0, gi tr Q4.0 = 0

-Kiu d liu vo/ra:EN: BOOL IN: DINT

OUT: DINT ENO: BOOL

- V d:

Trc khi thc hin: MD8 = F0FF FFF0

Sau khi thc hin : MD12 = 0F00 000F

4.8.6.Cc hm i du :

Hm s thc hin chc nng i du d liu vo . Cc hm i du nhi du s thc

di 16bits ( I ), 32 bits ( DI ) hay s nguyn ( R ).

FBD LAD STL

Hnh 4-32:

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Dng d liu vo:

NEG_I NEG_DI NEG_R

EN BOOL BOOL BOOL

IN INT DI REAL

OUT INT DI REAL

ENO BOOL BOOL BOOL

V d: Trc khi thc hin MW8 = +10, sau khi thc hin MW10 = -10.

4.8.7.Cc hm thc hin chc nng lm trn

FBD LAD STL

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Hnh 4-33:

-Hm ROUND : (chuyn s thc thnh s nguyn gn nht) thc hin lm trn nh sau: nu

phn l < 0,5 th lm trn xung. Nu phn l > 0,5 th lm trn ln.

V d: 1,2 -> 1 ; 1,6 -> 2.

-1,2 -> -1 ; -1,6 -> -2.

-Hm TRUNC: (ly phn nguyn ct b phn l) thc hin lm trn xung gi tr trn nh

v d: d liu vo t 1,1 n 1,9 -> 1.-Hm CEIL: thc hin lm trn ln.

v d: d liu vo t 1,1 n 1,9 -> 2.

-Hm FLOOR: thc hin lm trn xung.

v d: +1,7 -> 1 ; - 1,7 -> -2

4.9.Cc hm ton hc:

4.9.1. Nhm hm lm vic vi snguyn 16 bits:

1/ Cng hai snguyn 16 bits:

FBD LAD STL

Hnh 3-12: Khi thc hin chc nng cng hai snguyn 16 bits.

D liu vo v ra:EN: BOOL IN1: INT

IN2: INT OUT: INT ENO: BOOL

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Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin cng hai s nguyn 16 bits

MW0 vi MW2. Kt quc ct vo MW10.

Trong trng hp tn hiu vo I0.0 = 0 u ra Q4.0 = 0 v hm s khng thc hin chc

ng.

2/ Trhai snguyn 16 bits:

FBD LAD STL

Hnh 4-13: Khi thc hin chc nng trhai snguyn 16 bits

D liu vo v ra:EN : BOOL IN1: INT

IN2: INT OUT: INT ENO: BOOL

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin tr hai s nguyn 16 bits



ng.

3/ Nhn hai snguyn 16 bits:

FBD LAD STL

Hnh 4-14: Khi thc hin chc nng nhn hai s16 bits.

D liu vo v ra:

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EN: BOOL IN1: INT

IN2: INT OUT: IN ENO: BOOL

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin nhn hai s nguyn 16 bits



ng.4/ Chia hai snguyn 16 bits:

FBD LAD STL

Hnh 4-15: Khi thc hin chc nng chia hai snguyn 16 bits

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin chia hai s nguyn 16 bits



ng.

4.9.2.Nhm hm lm vic vi snguyn 32 bits:

1/ Cng hai snguyn 32 bits:

D liu vo v ra:EN: BOOL IN1: DINT

IN2: DINT OUT: DINT ENO: BOOL

FBD LAD STL

Hnh 4-16: Khi thc hin chc nng cng hai snguyn 32 bits

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin cng hai s nguyn 32 bits

MD0 vi MD4. Kt quc ct vo MD10.


ng.

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2/ Trhai snguyn 32 bits:

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin tr hai s nguyn 32 bits



ng.

FBD LAD STL

Hnh 4-17: Khi thc hin chc nng trhai snguyn 32 bitsD liu vo v ra:EN: BOOL IN1: DINT

IN2: DIN OUT: DINT ENO: BOOL

3/ Nhn hai snguyn 32 bits:

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin nhn hai s nguyn 32 bits



ng.

FBD LAD STL

Hnh 4-18: Khi thc hin chc nng nhn hai snguyn 32 bit



4/ Chia hai snguyn 32 bits :

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin chia hai s nguyn 32 bits


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ng.



FBD LAD STL

Hnh 4-19: Khi thc hin chc nng chia hai snguyn 32 bits

4.9.3.Nhm hm lm vic vi sthc:

1/ Cng hai sthc:

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin cng hai s thc MD0 +

MD4. Kt quc ct vo MD10.

Trong trng hp tn hiu vo I0.0 = 0 u ra Q4.0 = 0 v hm s khng thc hin chcng.

FBD LAD STL

Hnh 4-20: Khi thc hin chc nng cng hai sthc

D liu vo v ra:EN: BOOL IN1: REAL

IN2: REAL OUT: REAL ENO: BOOL

2/ Hm trhai sthc:

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Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin tr hai s thc MD0 -



ng.

FBD LAD STL

Hnh 4-21: Khi thc hin chc nng trhai sthc.


IN2: REAL OUT: REAL ENO: BOOL

3/ Nhn hai sthc:

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin nhn hai s thc MD0 .


FBD LAD STL

Hnh 4-22: Khi thc hin chc nng nhn hai sthc.


ng.


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6/ Hm SIN, COS, TAN, ASIN, ACOS, ATAN:

Khi tn hiu vo I0.0 = 1 u ra Q4.0 = 1 v hm s thc hin chc nng tinh SIN, COS,

TAN, ASIN, ACOS, ATAN ca MD0 ri ct vo MD10.

Khi tn hiu vo I0.0 = 0 u ra Q4.0 = 0 v hm s khng thc hin chc nng.

FBD LAD STL

Hnh 4-25: Khi thc hin chc nng tnh hm Sin.

D liu vo v ra:EN: BOOL IN: REAL

OUT: REAL ENO: BOOL

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4.10.Cc hm Logic thc hin trn thanh ghi :

1. Hm AND hai sc di l 16 bits.

- khi:

FBD LAD STL

Hnh 4-63: sdng khi AND 16 bits

-Nguynl hot ng:

Hm s thc hin chc nng nhn hai s nh phn tai u vo IN1 v u vo IN2 kt qu

c ct OUT ( MW2) khi c tn hiu kch ti chn EN (I0.0 =1).

Tn hiu u ra ENO (Q4.0 = 1) khi hm thc hin chc nng.

-V d:

IN1 = 0101010101010101 S th nht

IN2 = 0100000000001111 S th hai

OUT = 0100000000000101 Kt qu

2. Hm OR hai sc di l 16 bits:

- khi :

FBD LAD STL

Hnh 4-64: Sdng khi OR 16 bits.

-Nguyn l hot ng:

Hm s thc hin chc nng OR hai s nh phn tai u vo IN1 v u vo IN2 kt qu

c ct OUT ( MW2) khi c tn hiu kch ti chn EN (I0.0 = 1).

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Tn hiu u ra ENO (Q4.0 = 1) khi hm thc hin chc nng.

-V d:

IN1 = 0101010101010101 S th nht

IN2 = 0000000000001111 S th Hai

OUT = 0101010101011111 Kt qu

3.Hm XOR hai sc di 16 bits:

- khi:

FBD LAD STL

Hnh 4-65: s khi XOR 16 bits.

-Nguynl hot ng:

Hm s thc hin chc nng XOR hai s nh phn tai u vo IN1 v u vo IN2 kt

quc ct OUT khi c tn hiu kch ti chn EN.

Tn hiu u ra ENO khi hm thc hin chc nng.

-V d:

IN1 = 0101010101010101 S th nht

IN2 = 0000000000001111 S th Hai

OUT = 0101010101011010 Kt qu

4.Hm AND hai t kp:

- khi:

FBD LAD STL

Hnh 4-66: Sdng khi AND hai tkp .

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EN(I0.0): BOOL - tn hiu kch

IN1: DWORD - Vo 1

IN2: DWORD - vo2

OUT: DWORD - Ra

ENO: BOOL - Tn hiu ra ca khi.

-Nguyn l hot ng:

Hm s thc hin chc nng AND hai s nh phn ti u vo IN1 v u vo IN2 kt qu

c ct OUT khi c tn hiu kch ti chn EN.


-V d:

IN1 = 0101010101010101 0101010101010101

IN2 = 0000000000000000 0000111111111111

OUT = 0000000000000000 0000010101010101

5.Hm OR hai tkp:

- khi:

FBD LAD STL

Hnh 4-67: S dng khi OR hai tkp.

EN(I0.0): BOOL - tn hiu kch

IN1: DWORD - Vo 1

IN2: DWORD - vo2OUT: DWORD - Ra

ENO: BOOL - Tn hiu ra ca khi.

-Nguyn l hot ng:

Hm s thc hin chc nng OR hai s c di 2 t ti u vo IN1 v u vo IN2 kt


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-V d:

IN1 = 0101010101010101 0101010101010101

IN2 = 0000000000000000 0000111111111111

OUT = 0101010101010101 0101111111111111

6.Hm XOR hai tkp :

- nguyn l:

FBD LAD STL

Hnh 4-68: Sdng khi XOR hai tkp.

-Nguyn l hot ng:

Hm s thc hin chc nng XOR hai s c di 2 t ti u vo IN1 v u vo IN2 kt



-V d:

IN1 = 0101010101010101 0101010101010101IN2 = 0000000000000000 0000111111111111

OUT = 0101010101010101 0101101010101010

EN(I0.0): BOOL - tn hiu kchIN1: DWORD - Vo 1IN2: DWORD - vo2

OUT: DWORD - RaENO: BOOL - Tn hiu ra ca

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Chng 5: Chng trnh con v xl tn hiu tng t

K THUT LP TRNH

Chng trnh ngi dng thng c chia nh thnh tng khi logic theo kiuchng trnh cu trc, gip cho vic lp trnh v sa li thun tin. C nhiu loi khi logic:

Khi t chc OB (Organization blocks) Khi hm h thng SFB (System function blocks) v hm h thng SFC (system

functions) tch hp trong PLC Khi hm FB (Function blocks) trong th vin hay ngi dng t vit Hm FC (Functions) trong th vin hay ngi dng t vit Khi d liu Instance (Instance Data Blocks ) lin kt vi FB/SFB Khi d liu chia x (Shared Data Blocks )

Khi t chc OB l giao din gia chng trnh ngi dng v hu hmh ca PLC.OB c gi bi h iu hnh theo chu k hay khi c ngt, c s c hay khi khi ngPLC. C nhiu khi OB v c u tin khc nhau, khi OB c s u tin cao hn c th ngtkhi OB s u tin thp hn. Tu theo loi CPU, s lng khi OB s dng c s khcnhau, bng sau lit k cc loi OB

Loi OB ngha u tinOB1 c gi khi kt thc khi ng hay kt

thc OB1, thc hin theo chu k1

OB10, OB11, OB12,OB13

OB14, OB15, OB16,OB17

Ngt theo thi gian trong ngy, thng,m

2

OB20OB21OB22OB23

Ngt tr hon 3456

OB30OB31OB32OB33OB34OB35OB36OB37OB38

Ngt chu k (mc nh 5s)Ngt chu k (mc nh 2s)Ngt chu k (mc nh 1s)Ngt chu k (mc nh 500ms)Ngt chu k (mc nh 200ms)Ngt chu k (mc nh 100ms)Ngt chu k (mc nh 50ms)Ngt chu k (mc nh 20ms)Ngt chu k (mc nh 10ms)

789101112131415

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OB40OB41OB42OB43OB44OB45OB46

OB47

Ngt cng 16171819202122

23OB60 Gi bi SFC35 "MP_ALM" 25

OB70OB72OB 73

Li I/O redundancy ( H CPU)Li CPU redundancy (H CPU)Li Communication redundancy (H CPU)

252825

OB80OB81OB82OB83OB84

OB85OB86OB87

S c chu k qutLi ngunNgt chn onNgt do thm bt moduleLi phn cng CPU

Li chng trnhLi module mrngLi truyn thng

26, 28

OB90 Warm or cold restart or delete a blockbeingexecuted in OB90 or load an OB90 on theCPU or terminate OB90

29, 0

OB100OB101OB102

Khi ng mKhi ng nngKhi ng lnh

27

OB121OB122

Sai lp trnhSai I/O

u tin catc nhn gyra s c

5.1/ Khi OB1OB1 c gi sau khi kt thc qu trnh khi ng v sau khi kt thc chnh n, mi

OB tr OB90 c th ngt OB1. Khi OB1 c thc hin, hu hnh gi i d liu toncc. Trc khi gi li OB1, hu hnh chuyn b nhm ra module xut , cp nht bm nhp v nhn d liu ton cc. Khi thc hin OB1, chng trnh trong khi c thchin, d liu xut ra module xut c cp tm trong b nh. Chng trnh trong OB1 cth gi cc hm hay khi hm.

Thi gian thc hin OB1 gi l thi gian qut, hu hnh n nh thi gian qutti a (150ms) v ti thiu, c th ci t bng Step 7. Nu chu k qut ko di th giOB80 hay chuyn sang STOP, nu chu k qut ngn qu th thm tr hon hay gi OB90.

OB1 gm phn m chng trnh, do ngi dng vit; bng bin cc b (local block)cn gi l bng khai bo bin (variable declaration table) gm 20 byte

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Ct th nht l a ch trong vng bin cc b, ct th hai khai bo loi bin, tempngha l tm thi, gi tr ca bin thay i sau mi vng qut ca OB, ct th ba l cc tnca d liu, c ngha nh sau (gii thch trong ct ch thch 6):OB1_EV_CLASS: gi tr B#16#11 c ngha OB1 tch ccOB1_SCAN_1: B#16#01: hon tt warm restart

B#16#02: hon tt hot restartB#16#03: hon tt chu k

B#16#04: hon tt cold restartOB1_PRIORITY: gi tr 1OB1_OB_NUMBR: s OB l 1OB1_RESERVED_1: d trOB1_RESERVED_2: d trOB1_PREV_CYCLE: thi gian vng qut trc (ms)OB1_MIN_CYCLE: thi gian vng qut ngn nhtOB1_MAX_CYCLE: thi gian vng qut di nhtOB1_DATE_TIME: ngy giOB1 bt u thc hin (8 byte)

Cc gi tr trn ngi dng khng thay i c, ngi dng c th thm cc binvo ta ch 20.0 tri, cc bin ny l bin tm, thay i sau mi vng qut. Cc bin

thm vo s dng cho vic gi cc chng trnh con FC, SFC, FB, SFB.Chng trnh STEP 7 dng lp trnh cho PLC S7-300, S7-400. Chng trnh ny

c version 5.0 dng cho Win 98, Version 5.1 v 5.3 dng cho Win XP. Khi kch chut vobiu tng Simatic Manager s xut hin ca s Hnh , bm Next chn loi CPU

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Bm tip Next chn cc khi OB, bt buc l OB1, cc OB khc c th thm vo sau.

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Na ca s bn tri sp xp dng th mc, kch chut vo mra cc mc con.Bm vo dng SIMATIC 300 STATION bn tri ri bm tip vo Hardware bn phi t cu hnh phn cng ca PLC (cng vic ny cng c th thc hin sau)

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Ga s cu hnh n gin gm cc moduke DI/DO, AI/AO, ta kch chut vo dngSIMATIC 300, SM- 300 , chn cc module ph hp, dng chut ko vo cc slot caStation t s 4 tri, (slot 3 dng cho module IM), sau vo menu Station Save riClose. Ta s trli vn cu hnh mc

Tr li Project, bm vo mc Blocks, ta thy xut hin OB1, bm vo OB1 nu lptrnh tuyn tnh, ngha l khng dng cc khi logic FC, FB t to

Bm vo menu View, chn STL, LAD, FBD chn cch lp trnh. Khi lp trnh ta cth dng a ch tuyt i ( I0.0, MW2, T5) hay a ch k hiu (Start, Speed, Delay).a ch k hiu gip chng trnh d hiu hn. C hai loi l k hiu cc b v k hiu toncc (hay chia x) , k hiu cc b khai bo trong bng khai bo bin ca khi v ch c ngha trong phm vi khi , k hiu ton cc khai bo trong bng k hiu Symbols, c ngha trong ton b cc khi ca project. Vic khai bo k hiu ton cc thc hin trc haysau khi vit m. Khi logc c th c ti a 999 network, mi network c ti a 2000 hng ,mi hng gm nhn , lnh, a ch v ch thch (sau //)

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Th tc lp k hiu ton cc nh sau: bm chut vo i tng Symbols (Xem hnh).

Cc bin k hiu c a vo tng dng mt, di ti a 24 k t ch s, k tcbit, tr du nhy , khng phn bit ch hoa v ch thng. Bng k hiu cha ti a16380 k hiu. Sau khi bin tp xong, vo menu Symbol Table- Save lu bng. Voca s bin tp ca khi chn View- Display with - Symbolic Representation nhn thya ch k hiu trong chng trnh, k hiu tuyt i c ng khung bng du , cn khiu cc b c du # ng trc.

V d lp trnh cho n b hnh, bnh thng khi khng c yu cu qua ng (I0.0,I0.1), n xanh xe (Q0.7) v n b hnh (Q0.0) sng. Khi c yu cu n vng xe(Q0.6) sng trong 3s , sau n xe (Q0.5) sng v n xanh b hnh (Q0.1) sng trong10s, ht thi gian ny n b hnh v xe cng sng, sau 6s n vng xe v xe cngsng v sau 3 s n xanh xe sng , xa yu cu qua ng

A(A(O I 0.0 // C yu cu qua

ng ca khch b hnhO I 0.1)A T 6O M 0.0)

AN T 5 //xa yu cu= M 0.0 // ghi nhn yu cu

AN M 0.0 // nu khng c yucu th= Q 0.7 // n xanh xe sng

A M 0.0L S5T#3SSD T 2A M 0.0A(ON T 2O T 4)

= Q 0.6 // n vng xe 3sA M 0.0

A Q 0.5L S5T#10SSD T 3A Q 0.5AN T 3= Q 0.1 //Bt n xanh b hnh,thi gian 10s

A M 0.0A T 3L S5T#6SSD T 4 //Thi gian 6 s xe v b hnh cng sngA M 0.0A(ON T 2

O T 3)ON M 0.0= Q 0.0 // Bt n b hnh

A M 0.0 //Bt n v vngxeA T 4L S5T#3SSD T 5 //Chuyn sang xanh xe sau

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A T 2= Q 0.5 // n xe sau 3s

3s

A Q 0.7L S5T#1SSD T 6 //Thi gian tr hon1s nhn yu cu khi xanh xe va sng

Sau lp bng k hiu:

A( A "Pedestrian_light"

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A(O "Switch_right"O "Switch_left")

A "Ped_delay_green"O "Pedestrian_light")

AN "Car_red_orange_phase"= "Pedestrian_light"AN "Pedestrian_light"= "Car_green"

A "Pedestrian_light"L S5T#3SSD "Car_orange_phase"

A "Pedestrian_light"A(ON "Car_orange_phase"O "Car_delay_red"

)= "Car_orange"A "Pedestrian_light"A(ON "Car_orange_phase"O "Car_delay_red")

= "Car_orange"

A "Car_orange_phase"= "Car_red"

A "Car_red"L S5T#10SSD "Ped_green_phase"A "Car_red"AN "Ped_green_phase"

= "Ped_green"A "Pedestrian_light"A "Ped_green_phase"L S5T#6SSD "Car_delay_red"A "Pedestrian_light"A(ON "Car_orange_phase"O "Ped_green_phase")ON "Pedestrian_light"

= "Ped_red"A "Pedestrian_light"A "Car_delay_red"L S5T#3SSD "Car_red_orange_phase"A "Car_green"L S5T#1SSD "Ped_delay_green"

Sau khi bin son chng trnh ta c th chy m phng khng cn PLC nh phn

mm S7 PLC Sim theo cc bc sau:- Vo menu Simatic Manager- Options- chn Simulate Modules. Ca s sau xut

hin

- Vo menu PLC- Download np khi chng trnh xung PLC m phng- Vo ca s S7-PLCSIM menu Insert chn cc vng nhmun quan st

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- Vo menu PLC- chn Power On, vo menu Execute chn Scan Mode Continuous Scan.

- Chn RUN hay RUN P- Tc ng vo cc bit I 0.0, I0.1 xem hot ng ca chng trnh.- Tr li Simatic Manager, chn View- Online, m khi logic mun quan st

(OB1), bm Debug- MonitorTrong trng hp mun tp trung cc bin vo mt ch d quan st, ta dng bng

khai bo bin VAT (Variable Table). Trong ca s Manager vo menu Insert- S7 Block-Variable Table (hay bm chut phi Insert New Object- Variable Table) ta c khiVAT1, mkhi ny ra v thm vo cc a ch vng nhmun quan st.

Trng hp c sn PLC, u tin ta phi kt ni my tnh vi PLC thng qua cp nithch hp, vo menu PLC- Display Accessible Nodes, sau PLC- Operating mode chnch PLC l Stop, PLC- Download np chng trnh xung PLC.

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5.2/ Cc khi ngtKhi OB1 c thc hin theo chu k, v c th b ngt bi cc s kin khi ta ci t

thm cc khi OB khc vo Project hoc khi xy ra cc s c. Cc khi OB ph hp cgi x l ngt nhcc chng trnh con c ci t. Khi OB u tin cao c th ngtkhi c u tin thp hn. Ta c th thay i u tin ca OB trong S7-400 v S7-300-CPU318. Thm OB b ng cch bm chut phi trong ca s Project- Insert NewObject- Organization block, chn s OB, sau mkhi OB v lp trnh

3 To cc khi logicCc chng trnh ln thng c vit dng cu trc, gm khi OB1, cc khi

chng trnh FC, FB, cc khi chng trnh h thng SFC, SFB. S dng lp trnh cu trcgip chng trnh d qun l v sa li, thun tin cho vic lp trnh theo nhm. Khi OB1v cc khi FC, FB c th gi FC, FB, SFC, SFB

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Ly v d lp trnh cho h thng trn hai cht lng A v B (H ), ta chia qu trnhthnh nhiu khi nh (H ) : bm cht A, bm cht B, bn trn v van x. Ta nhn thy haikhi bm lp trnh ging nhau, ch khc cc ng vo/ra. Trc khi lp trnh ta phi c mt k thut cho hot ng ca cc khi.

Khi A/B gm c bm v van vo, van ra- m c cng sut 100KW, vng quay 1200 rpm, lu lng 400l/pht. Bm

c u khin bi nt Start/Stop trn bng u khin, s ln start chin th tin bo tr. Bm c php hot ng khi:

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o bn khng y,o van xng,o nt emergency khng tc ng.

m tt khi cm bin lu lng bo khng c dng chy sau 7 s k t khi khi ngm hay khi cm bin lu lng bo ngng chy.- Van c u khin bi solenoid, mkhi c n vo van. Van phi m t

nht 1s sau khi bm chy.Khi bn trn c ng c trn, cc cm bin mc. c cng sut 100KW, vng

quay 1200 rpm, lu lng 400l/pht. ng cc u khin bi nt Start/Stop trnbng u khin, s ln start c hin th tin bo tr. ng cc php chykhi:

o Mc cht lng trn mc ti thiu ,o Van xngo Nt Emergency khng tc ng

ng cc tt khi vn tc khng t nh mc sau khi khi ng 10s. C ba cmbin mc dng contact . Cm bin y thng ng, khi bn y th hra. Cm bin mcti thiu thng h, khi mc cht lng thp th ng li. Cm bin cn, hnu bn cn

Van xc u khin tbng u khin. Van xc hot ng nu ng ctrn ngng, cm bin mc bo bn cha cn, nt emergency khng tc ng. Van xng nu cm bin mc bo bn cn.

Bng u khin dng u khin v bo trng thi cc ng c, van x, bo mcbn, bo bo tr v dng khn cp.

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C ba ng cc th lp trnh bng khi logic chung (Hnh) . Su ng vo l hai ntnhn Sart/Stop, nt nhn Reset_Maint xa n bo tr, tn hiu bo ng c chy, ngng(Response) s hiu Timer (Timer No) v thi gian timer (Response_Time). Bn ng ra lbo li (Fault), n bo ng c chy, ngng (Start_Dsp, Stop_Dsp), bo bo tr (Maint),Tn hiu vo/ra l iu khin Motor. Khi logic ny lp trnh di dng khi hm FB v cnu tr gi tr bin.

Cc van cng c u khin bng khi logic FC (Hnh) . Hai tn hiu vo l ntnhn m /ng van (Open/ Close) Tn hiu ra l n bo trng thi van ( Dsp_Open,Dsp_Closed). Tn hiu vo/ ra iu khin van (Valve). Khi ny khng c lu bin v thc

hin bng FC.Cu trc chng trnh nh Hnh . Chng trnh chnh OB1 gi hm FB1 iu khinng c, c bang c ng vi ba khi d liu DB1, DB2, DB3. Hm FC1 c OB1 gikhi iu khin van. Cc khi FB v FC phi c lp trnh trc khi OB. Vo ca sProject Symbols lp bng k hiu cho cc bin (Bng )

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Symbolic Name Address DataType

Description

Feed_pump_A_start I0.0 BOOL Starts the feed pump for ingredient A

Feed_pump_A_stop I0.1 BOOL Stops the feed pump for ingredient AFlow_A I0.2 BOOL Ingredient A flowingInlet_valve_A Q4.0 BOOL Activates the inlet valve for ingredient AFeed_valve_A Q4.1 BOOL Activates the feed valve for ingredient A

Feed_pump_A_on Q4.2 BOOL Lamp for feed pump ingredient A running"

Feed_pump_A_off Q4.3 BOOL Lamp for feed pump ingredient A notrunning"

Feed_pump_A Q4.4 BOOL Activates the feed pump for ingredient A

Feed_pump_A_fault Q4.5 BOOL Lamp for feed pump A fault"Feed_pump_A_maint Q4.6 BOOL Lamp for feed pump A maintenance"

Feed_pump_B_start I0.3 BOOL Starts the feed pump for ingredient BFeed_pump_B_stop I0.4 BOOL Stops the feed pump for ingredient B

Flow_B I0.5 BOOL Ingredient B flowing

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5.3 Lp trnh khi FBFB l khi logc vi cc bin in, out, in_out, static v temp, c to ra trong bng

bin a phng i km. Cc bin in, out, in- out l cc tham s hmh thc c a ch c thdo chng trnh gi truyn n, bin static l bin trong chng trnh FB c lu li khi rakhi khi FB, bin temp mt gi tr khi ra khi khi FB. Km vi FB l khi d liu datablock cha cc bin in, out, in- out v static. C th c nhiu data block cho mt FB khi mtFB dng cho cc nhim v khc nhau, gi l instance data block. Khi chng trnh gi FB

cn phi km theo instance data block tng ng. Ta vo ca s Project bm chut phi -Insert New Object Function block thm vo khi FB1. Bm chut vo khi FB1 sonchng trnh cho khi. Ta vo bng khai bo bin khai bo cc bin hnh thc cho khitheo th t in, out, in_out, static v temp. Vi v d trn, bng bin ca FB1Motor_Block nh sau:

Address Declaration Name Type Initial Value0.0 IN Start BOOL FALSE

0.1 IN Stop BOOL FALSE0.2 IN Response BOOL FALSE0.3 IN Reset_Maint BOOL FALSE

2.0 IN Timer_No TIMER4.0 IN Response_Time S5TIME S5T#0MS6.0 OUT Fault BOOL FALSE

6.1 OUT Start_Dsp BOOL FALSE6.2 OUT Stop_Dsp BOOL FALSE

6.3 OUT Maint BOOL FALSE8.0 IN_OUT Motor BOOL FALSE

10.0 STAT Time_bin WORD W#16#012.0 STAT Time_BCD WORD W#16#0

14.0 STAT Starts INT 016.0 STAT Start_Edge BOOL FALSE

Cc bin STAT Time_ bin v Time_BCD l u thi gian timer, Starts lu s ln khing motor, Start_ Edge phc v cho lnh ly cnh ln

Network 1 Start/stop and latchingA(O #StartO #Motor)

AN #Stop= #MotorNetwork 2 Startup monitoringA #MotorL #Response_TimeSD #Timer_NoAN #MotorR #Timer_NoL #Timer_NoT #Timer_bin

Network 4 Stop lampAN #Response= #Stop_DspNetwork 5 Counting the startsA #Motor

FP #Start_EdgeJCN lab1L #Starts+ 1T #Startslab1: NOP 0Network 6 Maintenance lampL #StartsL 50>=I

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5.4 Lp trnh khi FCKhi FC c cc bin hnh thc in, out v in_ out do chng trnh gi cung cp cc

a ch c th, ngoi ra cn c bin temp s dng ni b. Khi FC khng c b nhnn dliu mt i khi ra khi khi. Ta thm vo project khi FC1 v khai bo cc bin trong bngkhai bo bin km theo. Sau lp trnh cho FC1

Address Declaration Name Type Initial Value

0.0 IN Open BOOL FALSE0.1 IN Close BOOL FALSE2.0 OUT Dsp_Open BOOL FALSE

2.1 OUT Dsp_Closed BOOL FALSE4.0 IN_OUT Valve BOOL FALSE

Network 1 Open/close and latchingA(O #OpenO #Valve)AN #Close= #ValveNetwork 2 Display "valve open"A #Valve= #Dsp_OpenNetwork 3 Display "valve closed"AN#Valve= #Dsp_Closed

c tip theo l lp trnh cho OB1, ta khai bo cc bin cho OB1Address Declaration Name Type0.0 TEMP OB1_EV_CLASS BYTE1.0 TEMP OB1_SCAN1 BYTE2.0 TEMP OB1_PRIORITY BYTE3.0 TEMP OB1_OB_NUMBR BYTE4.0 TEMP OB1_RESERVED_1 BYTE5.0 TEMP OB1_RESERVED_2 BYTE6.0 TEMP OB1_PREV_CYCLE INT8.0 TEMP OB1_MIN_CYCLE INT10.0 TEMP OB1_MAX_CYCLE INT12.0 TEMP OB1_DATE_TIME DATE_AND_TIME20.0 TEMP Enable_motor BOOL

20.1 TEMP Enable_valve BOOL20.2 TEMP Start_fulfilled BOOL20.3 TEMP Stop_fulfilled BOOL

20.4 TEMP Inlet_valve_A_open BOOL

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20.5 TEMP Inlet_valve_A_closed BOOLChng trnh OB1Network

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Tai lieu LT PLC 300 (10.10.08)