07 veschetti ines

Overview of several bifacial

solar cells technologies

1

solar cells technologies

Y. Veschetti, R. Cabal, D. Munoz, S. Harrison, S. Gall

INES-CEA

Outline

•Two cells technologies compatible for bifacial application

�� a-Si:H/c-Si Heterojunction (HET) and PERT n-type Si

• HET R&D and Industrial development

�� Bifacial properties

• n-type PERT solar cells development

bifiPV Workshop Y. Veschetti

• n-type PERT solar cells development

�� Overview of various processes

�� Initial bifacial properties

�� Process adaptation to improve bifacial behaviour

•Conclusion et perspectives

Two bifacial solar cells on n-type silicon

SiO2 / SiNx

SiO2/

SiNx

Si(n)P- BSF

B-Emitter

Rear electrode

Front electrode

a-Si:H/c-Si heterojunction PERT n-type cell

Courtesy of Sanyo HITTM cell


� nmax 23.7% (lab) � n = 21% prod [1]� T (°C) coefficient� Simple process < 10 steps � Low T - process� Thin substrate compatible

� nmax = 19.7% (lab) [2] � n ~ 18.5 - 19% prod� Simple process < 10 steps (potentially)� Compatible with p-type prod line� Thin substrate compatible

SiNxRear electrode

[1] 2AO.2.6, SANYO Electric, 26th EPVSEC (2011)

[2] Boescke, Bosch Solar, n-type workshop, Konstanz (2011)

Heterojunction development at INES

(n) c-Si

(i)/(p) a-Si:H

(i)/(n) a-Si:H

ITO

ITO

Ag

(n) c-Si

(i)/(p) a-Si:H

(i)/(n) a-Si:H

ITO

ZnO:B

Ag

Non bifacial configuration Bifacial configuration


ITO

Ag

ZnO:B

Al

Best cell result certified S (cm²)Jsc

(mA.cm²)Voc (mV) FF (%) η (%)

Non bifacial cell (FZ) 105.0 36.3 732 77.9 20.7

Bifacial cell (Cz) 148.6 35.2 729 77.9 20.0

• Same amount of fabrication steps for both configuration

• Similar efficiency potential

�� Respective interest will be determined at the module level

HET: Bifacial characteristic

Increased reflectivity on the rear side due to a larger metal coverage

�� Substrate & ITO resistivity limitations

Illumination Reff (%)Jsc


Front side 6.7 34.6 719 74.3 18.5

Rear side 9.6 31.8 717 74.4 17.0

90100

Inte

rnal

Qu

antu

m e

ffic

ien

cy


0102030405060708090

300 500 700 900 1100

Wavelength (nm)

Inte

rnal

Qu

antu

m e

ffic

ien

cy

(%)

Front side Rear side

Efficiency ratio

RS/FS = 92%

Room for improvement by

optimizing the a-Si:H(n+)

layers

• 35MW HET Labfab at INES Start up by the end of 2011

Towards Industrial Application in Europe :

Silicon Heterojunction solar cells :LABFAB


• The PECVD and TCO line are working since december 2011

• Wet & screen printing hardware set up ongoing

• First cells after 3 months show high efficiency!!! >19%

• Uniformity tests ongoing on 90x90 cells 125PSQ

N-type PERT cell – Reference INES process

Si(n) Phosphorus BSF

Boron Emitter

Thermal SiO2\ SiNx

Rear s.p. grid

Front s.p. grid

Thermal SiO2 \ SiNx ARC

Texturing

Rear diffusion barrier

BCl3 emitter diffusion

BSG and barrier etching

POCl3 BSF diffusion

Front diffusion barrier


POCl3 BSF diffusion

Dry oxidation

Front & Rear PECVD SiN

PSG and barrier etching

Front & Rear SP grid

Contact firing

148.6 cm² Cz-Si

Jsc

(mA/cm²)Voc (mV) FF (%) η (%)

Best 38.1 635.0 79.5 19.3

13 steps

Heading towards higher efficiencies

N Cz-Si

p+

N+

SiO2/SiN

N Cz-Si

p+

N+

SiO2/SiN

Implied Voc Cell Voc

Measurement of implied Voc

prior to metallization steps


Gap between implied Voc and final cell Voc

SiO2/SiN SiO2/SiN

� Issues on Voc limitation:

Impact of SP metallization

Co-diffused n-type cell process3 fewer steps

Process simplification 1: co-diffusion

Reference n-type cell process

KOH texturing

Diffusion barrier

BCl3 diffusion

Barrier & BRL removal

Diffusion barrier

POCl3 diffusion

BSG/PSG removal

PECVD SiO2(B) deposition

Co-diffusion POCl3 furnace


Cell resultJsc


Cz (4Ω.cm; 180µm; 138.3cm²)

Ave. (x9) 37.2 631.1 79.2 18.6

best 37.2 632.9 80.2 18.9

BSG/PSG removal

Thermal oxidation

Front & rear SiN

Front & rear screen-printing

Co-firing

Process simplification 2: Ion Implantation

Standard n-type process Implantation process

Front B-implant

Back P-implant

Texturing

Rear side diffusion barrier

Front Boron diffusion

Barrier and BRL etching


Back POCl3 diffusion

Standard n-type process Implantation process

Front B-implant

Back P-implant

Texturing

Rear side diffusion barrier

Front Boron diffusion

Barrier and BRL etching



Collaborative project with

- Potentially lowest $/Wp solution

� Higher efficiency at lower cost

- Higher cell yield

� 4 Fewer steps and lower breakage

- Best wafer-wafer doping repeatability


Thermal oxidation

Front and back PECVD SiN

Back P-implant

Thermal oxidation

Front/back metallization


Barrier and PSG etching

Thermal oxidation

Front and back PECVD SiN

Back P-implant

Thermal oxidation

Front/back metallization


Barrier and PSG etching

19.5% efficiency potential

� Process under development

� FF limitation being addressed

- Best wafer-wafer doping repeatability

� better binning, higher value

Cell resultImplied Voc (mV)

Voc (mV)Jsc

(mA.cm²)FF (%) η (%)

Cz (239cm²) 655 630.7 38.4 76.2 18.5

Co-firing

Cell results: 156PSQ Cz wafers

Bifacial performance of reference BCl3 process

80

100

Inte

rnal

Qu

antu

m

Illumination Reff (%) Voc (mV) Jsc (mA.cm²) FF (%) η (%)

Front side 5.3 630.7 38.6 78.3 19.1

Rear side 6.7 624.8 33.2 78.6 16.3


Ratio efficiency

rearside/front side = 85%

� Higher reflectivity

� Heavy BSF non adapted0

20

40

60

80

300 500 700 900 1100

Wavelength (nm)

Inte

rnal

Qu

antu

m

Eff

icie

ncy

Front sideRear side

Process modification for bifacial application

Texturing

Rear diffusion barrier

BCl3 emitter diffusion

BSG and barrier etching

POCl3 BSF diffusion 840°C


� Identical grid on both side

� Use of wet oxidation at 700°C

� No distribution of P- BSF

� Lighter doping (60 Ω/�)


Wet oxidation

Front PECVD SiN

PSG and barrier etching

Front & Rear SP grid

Contact firing

Rear PECVD SiN

P c

on

cen

tra

tio

n (

cm-3

)

Bifacial properties with adapted process

Illumination Voc (mV) Jsc (mA.cm²) FF (%) η (%)

Front side 627.4 38.8 77.0 18.7

Rear side 624.5 35.3 78.0 17.2

60

80

100

Inte

rnal

Qu

antu

m

effi

cien

cy (

%)


0

20

40

300 500 700 900 1100

Wavelength (nm)

Inte

rnal

Qu

antu

m

effi

cien

cy (

%)

Front sideRear side

Ratio η rear side/ front side = 92%

Positive effect of a lighter BSF

CONCLUSION

� Overview of two high efficiencies cell technologies HET & PERT cell

HETEROJUNCTION:

� Efficiency ratio RS/FS = 92%

� Room for improvement (work on a-Si:H(n+))

� Limitation of rear side reflectivity (grid density)

PERT cell:


PERT cell:

� Description of simple fabrication processes

� Ratio of efficiency RS/FS = 92% using adapted process

� Room for improvement without degrading the front performance

� Perspectives:

Fabrication of bifacial modules

� B. Soria, presentation Tuesday at 11.20

Acknowledgements :Workshop organizers

LCP team


Merci de votre attention

1525/04/2012

Many thanks for your attention !

CONTACT : [email protected]

Presentations & Public Speaking

07 veschetti ines