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A New Differential Protection Scheme for BusbarConsidering CT Saturation Effect

This work is funded by Gujarat Council on science

and Technology, Government of Gujarat, India, under

Project no. GUJCOST/MRP/201409/2009-10.

Nilesh Chothani, Lecturer

Department of Electrical Engineering,

ADIT, New Vidyanagar, Anand, Gujarat 388121, India.

e-mail: chothani_nilesh@rediffmail.com

Bhavesh Bhalja, Senior Member IEEE

Department of Electrical Engineering,

ADIT, New Vidyanagar, Anand, Gujarat 388121, India.

e-mail: brb77dee@iitr.ernet.in

Abstract-- The protection of busbar demands high integrity and

high speed relaying scheme. This paper presents a new

differential relaying scheme for the protection of busbar. The

proposed scheme depends on the difference of the value of

incoming and outgoing line currents of the respective phase at a

particular bus. The proposed scheme has been tested extensively

using the PSCAD/EMTDC software package with fault data

generated, by modeling the existing 230 kV Indian power

transmission systems. The proposed scheme provides stability

against external faults, more sensitivity towards high resistance

faults and better reliability in discriminating in-zone and out of

zone faults. Moreover, the proposed scheme avoids the effect ofearly & severe CT saturation during heavy through faults.

Index Terms--Busbar fault, differential protection, protective

relay simulation, CT saturation detection.

I. INTRODUCTION

Igh speed bus protection is required not only to limit the

damaging effects on equipment and system stability but

also to maintain service to as much load as possible [1]. In

practice, busbar is protected by various differential protection

schemes such as biased percentage differential protection

scheme, low impedance protection scheme and high

impedance voltage scheme. Percentage differential relayscreate a restraining signal in addition to the differential signal

and apply a percentage (biased) characteristic. The low-

impedanceapproach does not require dedicated CTs. Further,

this approach tolerates substantial CT saturation and provides

high-speed tripping. High impedance voltage scheme is used

in order to overcome the problem of spill current due to CT

saturation in case of heavy through fault. However, this

requires dedicated CTs (a significant cost associated) and

cannot be easily applied to re-configurable buses.

For better security, directional protection principle used to

dynamically supervise the main current differential function.

The main theme of this scheme is that if the power flow in one

or more circuits is away from the bus, an external fault existswhereas for the power flow in all of the circuits into the bus,

an internal bus fault exists [2]. The principal disadvantage of

this scheme is that it requires greater maintenance and there is

a probability of failure of the scheme due to large numbers of

contacts connected in series with the trip circuit. Further, the

operation of relays depends on bus voltage for polarization;

they might not operate for a metallic short circuit that reduced

the voltage practically to zero.

The common practice in busbar protection is to use numerical

busbar protection scheme which provides complete protection

for all types of extra/ultra high voltage busbar configurations.

The digital relays use innovative techniques such as CT

saturation detection and processing algorithms which provides

a unique combination of security, speed and sensitivity [3].

Many digital busbar relaying schemes have been developed bythe designers and researchers using microprocessors,

microcontrollers, digital signal processors, Artificial Neural

Network (ANN), traveling waves, Wavelet Transform and

employing various Artificial Intelligence techniques [4]-[7].

Protection of substation busbars is almost universally

accomplished by differential relaying scheme. The

conventional busbar differential relaying scheme may

maloperate in case of CT saturation during an external fault

[8]. Hence, in order to avoid maloperation of the conventional

differential protection scheme due to CT saturation during

heavy through fault, authors have proposed a new differential

relaying scheme. Verification of the proposed scheme has been

done on simulated data of an existing part of the Indian power

system network using PSCAD /EMTDC software package.

The proposed scheme is highly sensitive and provides fast

protection in case of internal fault. Moreover, it remains stable

in case of external fault. Furthermore, it avoids early and

severe CT saturation problem during heavy external fault. The

proposed scheme has shown satisfactory performance under

various fault conditions, especially for high resistance fault.

II. SIMULATION AND MODELING

Fig. 1 shows single line diagram of a portion of Indian power

system network consisting of four sources represented by

Thevenins equivalent. These sources are connected to the bus

under consideration through different lines Line-1, Line-2

Line-3 & Line-4 respectively. The system and line parameters

are given in Appendix. A sampling frequency of 4 kHz for a

system operating at a frequency of 50 Hz is used in this study.

The components of power system such as generators,

H

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generator transformers (GT) and transmission lines (TL) etc.

are designed according to the collected data and specifications.

The transmission line is represented using the Bergeron line

model. The said developed model uses some of the main

library components available in PSCAD. Also, own

components have been developed by authors using

programming in Fortran 77 compiler. The current signals

measured from each line for all three phases are delivered to

Current Transformers (CTs). The CT ratio has been decidedon the basis of loading condition of the system (in this case

respective change in load angle of the source). The difference

between the current quantities of each incoming and outgoing

lines at the bus of the respective phase has been given as an

input to the relay. Test data for verifying the said scheme have

been generated by modeling the complete system using the

PSCAD/EMTDC software package [9]. The performance of

the proposed scheme has been evaluated for different types of

in-zone and out of zone faults. Relay responses for some

special case such as high resistance fault was also investigated.

Fig. 2 shows the tripping logic for differential relay connected

at the bus. In this logic, the differential principle isaccomplished by comparing the value of CT secondary

currents of the respective phase of all four lines connected to

the main bus. As shown in Fig. 2, the summing block generates

three differential current signals namely Isa, Isb and Isc as per

the direction and magnitude of fault current. Thereafter, these

differential signals are given to the respective phase relay unit.

If the values ofIsa, Isband Iscexceed the pick-up setting (0.5 pu

which is decided on the basis of loading condition of system),

the differential relay generates a spike, which will be made

constant by Hysteresis-Buffer. Thereafter, the output of each

phase relay is given to OR gate. Depending upon the output

(logic 1) of the relay of the respective phase, OR gate

generates a final tripping signal (BRK) which will be given toall the circuit breakers connected to the main bus.

Fig. 1 Busbar relaying scheme modeled in PSCAD software

III. SIMULATION RESULTS

The system shown in Fig. 1 was subjected to various types of

fault. The performance of the proposed technique was

evaluated for different types of internal and external faults.

The effect of high resistance fault and CT saturation has been

also investigated. The output of all branch currents, along with

the differential current of CT secondaries and the status of

circuit breakers are represented graphically in this paper.

Fig. 2 Tripping logic of differential relay connected at bus

A. Internal Fault

Fig. 3 shows the behavior of the proposed scheme in terms ofdifferential currents and breaker status for single-line to

ground fault (a-g) which is applied at 0.06 second on the main

bus (Fig. 1) with fault resistance Rf = 0.01. It has been

observed from Fig. 3 that the differential current exceeds the

predetermine threshold value depending upon the types of

faults. Accordingly, the respective relay generates a tripping

signal which will be given to all the line circuit breakers

connected to the main bus. It is to be noted from Fig. 3 that the

differential relay operates successfully and clears a-g fault

within 13ms. A wide variation of in-zone faults such as single-

line to ground fault, double line fault, double line to ground

fault and triple line fault have been investigated. However, due

to space limitations, the results are not shown in the paper.

Fig. 3 Relay response during L-g (a-g) internal fault on bus

with Rf= 0.01

B. External Fault

Fig. 4 shows the response of the proposed differential scheme

for a single line-to-ground external fault (a-g) on line-4 at 10

km from the main bus (Fig. 1) which is applied at 0.07 second

with fault resistance Rf = 0.01. It has been observed from

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Fig. 4 that the differential current remains well below the

predetermine threshold value and hence, the relay dost not

operate. In this condition, no trip signal is generated by the

relay. A wide variation of external faults such as single-line to

ground fault, double line fault, double line to ground fault and

triple line fault at different locations have been investigated. It

is to be noted that for all types of external faults, the proposed

differential scheme remains stable and hence, gives better

stability.

Fig. 4 Relay response during external fault on line-4 with

Rf= 0.01

C. High Resistance Fault

Many algorithms related to bus protection fail to detect fault

with a considerable value of fault resistance. Although, high

resistance fault reduces the magnitude of the fault current, the

proposed scheme is capable to detect these faults. To analyze

the said situation, a single line-to-ground fault with fault

resistance of 75 has been simulated inside the zone of the

main bus. Although, there is a delay in the action of crossing

the threshold boundary of the relay, as shown in Fig. 5, the

proposed differential relaying scheme operates within 18ms.

The proposed scheme has been tested for different types of

high resistance faults such as single line to ground fault and

double line to ground faults up to RF=200 (not shown in the

paper). In these situations, it has been observed by the authors

that the operating time of relay was within 20ms after the

inception of fault.

D. Effect of CT Saturation

The effect of CT saturation for any busbar protection scheme

is of crucial importance particularly during heavy through

fault. The protection scheme must remain stable during

external fault and must not delay or prevent operation in case

of an internal fault. The CT saturation is obtained by CT

model block available in PSCAD/EMTDC. By changing the

CT secondary burden resistance, different degrees of CT

saturation can be obtained [10].

Fig. 5 Relay response during internal fault at F on phase A

with Rf= 75

The performance of the proposed scheme during CT saturationis carried out by simulating different faults on line-4 at 10 km

from the main bus with varying fault resistances. When a

heavy through fault occurs, the secondary current of CT is

reduced sharply due to saturation of CT. Therefore, the time

between two successive zero crossings of the secondary

current becomes smaller than half a cycle. This phenomenon is

used to detect the CT saturation by comparing the zero

crossing interval of the secondary current of saturated CT to

the zero crossing interval of the secondary current of

unsaturated CT for half a cycle time interval. The zero

crossing time of CT secondary during fault can be considered

as 8 ms9 ms instead of 10 ms (half a cycle for a rated

frequency of 50 Hz) because of noise and transient frequencypenetration [11]. Fig. 6 shows simulated module of zero

crossing detector developed by authors in PSCAD which uses

zero detectors, monostable multivibrators and logical circuits.

Fig. 6 The simulated module of zero crossing detector

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Fig. 7 Simulation results of unsaturated signal, saturated signal

and the difference of zero crossing of two signals.

In this module, zero detector measures the zero crossing

interval of the secondary current of saturated CT. A standard

estimated 50 Hz signal is given to another zero detector which

measures the zero crossing interval of the secondary current of

unsaturated CT (estimated signal) at every 10 ms. The

computation is repeated for every half a cycle and the

difference between the zero crossing interval of the estimated

signal and the saturated CT secondary signal are calculated.

Fig. 7 shows the simulation results for estimated signal

(unsaturated signal), saturated CT secondary current and the

difference of the zero crossing interval for phase-a during

single line to ground external fault on line-4 at 0.04 second

with Rf = 0.01 . The middle section shows the closer view of

signals shown in the first section (Fig. 7) for one cycle

interval. If this difference exceeds a predetermined threshold

value, a phase comparator circuit (not shown in the paper) is

activated and the blocking command is given to the bus

differential relay. With wide range of variations in fault

conditions and transient frequency penetration, it has been

found by the authors that the appropriate value of threshold is

1.5 ms. It is to be noted that the proposed scheme is able to

detect heavy and low saturation of CT during external faults.

IV. CONCLUSION

A new differential relaying scheme for busbar protection is

proposed in this paper. The proposed scheme was tested

extensively by using data that was generated by modeling an

existing 230 kV Indian power transmission system network

using PSCAD/EMTDC software package. The proposed

scheme has the ability to detect all types of in-zone faults and

remains stable during out of zone faults. An average tripping

time for most of the internal faults is within 20ms. The

proposed zero crossing technique is able to detect severe CT

saturation during all types of external faults with different

system parameters to achieve better security. Further, the

proposed scheme is highly sensitive in case of high resistance

in-zone faults.

APPENDIX

Source Data

Positive-sequence impedance of sources G1, G2 = 5 850

Zero-sequence impedance of sources G1, G2= 10 850

Positive-sequence impedance of sources G3, G4 = 10 85

0

Zero-sequence impedance of sources G3, G4= 20 850

Frequency = 50 Hz

Load angle of G1, G2 and G4 = 00

Load angle of G3 = 200

Transmission-line Data

Length:

Line-1 and Line-2 = 50 km

Line-3 = 100 km

Line-4 = 80 km

Voltage = 230 kV

Positive-sequence impedance = 0.0297 + j0.332 /km

Zero-sequence impedance = 0.162 + j1.24 /km

Positive-sequence capacitance = 9.23 nF/kmZero-sequence capacitance = 6.72 nF/km

V. REFERENCES

[1] N. G. Chothani, B.R. Bhalja and R.P.Maheshwari, A new digitaldifferential relaying scheme for the protection of busbar, 4th

International Conference on CERA-09,February 19-21, 2010.IIT

Roorkee.

[2] M. M. Eissa, A novel digital directional technique for bus-barsprotection, IEEE Transactions on Power Delivery, Vol. 19, No. 4,

pp. 1636-1641, October 2004.

[3] P740 Numerical Busbar Protection, Technical Data Sheet,Publication No. P740/EN TD/G22, AREVA T&D, pp. 1-22.

[4] T. S. Sidhu, L. Mital and M. S. Sachdev, A ComprehensiveAnalysis of an Artificial Neural-Network-Based Fault DirectionDiscriminator, IEEE Transactions on Power Delivery, Vol. 19,

No. 3, pp. 1042-1048, July 2004.

[5] Gang Wang, Heifeng Li and Xiaohua Li, A New NumericalDistributed Busbar Protection, In Proceedings of 8 th IEE

International Conference on Developments in Power System

Protection, Vol. 1, 5-8 April 2004, pp. 387-390.

[6] M. M. Eissa, A novel wavelet approach to busbar protectionduring CT saturation and ratio-mismatch, Electric Power System

Research, Vol. 72, 2004, pp. 41-48.

[7] S. P. Valsan and K. S. Swarup, Computationally EfficientWavelet-Transform Based Digital Directional Protection for

Busbars, IEEE Transactions on Power Delivery, Vol. 22, No. 3,

July 2007, pp. 1342-1350.

[8] M. E. Mohammed, High speed differential busbar protectionusing wavelet packet transform, Proceeding IET Generation,

Transmission & Distribution, Vol. 152, No. 6, November 2005,pp. 927-933.

[9] PSCAD/EMTDC Manual, Getting Started, Manitoba HVDCResearch Centre Inc., January 2001.

[10] Annakkage, U.D. McLaren, P.G., Dirks, E., Jayasinghe, R.P., andParker, A.D.: A current transformer model based on the Jiles

Atherton theory of ferromagnetic hysteresis, IEEE Trans. On

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[11] Hamed Dashti, Majid Sanaye Pasand, Senior Member, IEEE, andMahdi Davarpanah, Fast and Reliable CT Saturation Detection

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Delivery, Vol. 24, No. 3, July 2009,Pp. 1037-1044.

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