AD815

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FUNCTIONAL BLOCK DIAGRAM

15-Pin Through-Hole SIP (Y) & Surface-Mount DDPAK(VR)

NC

NC

NC

+IN1

IN1

OUT1

VS

+VS

OUT2

IN2

+IN2

NC

NC

NC

NC

1

2

3

4

5

6

7

8

9

15

11

12

13

14

10

AD815

TAB IS+VS

NC = NO CONNECTREFER TO PAGE 3 FOR 24-PIN SOIC PACKAGE

REV. A

Information furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for itsuse, nor for any infringements of patents or other rights of third partieswhich may result from its use. No license is granted by implication orotherwise under any patent or patent rights of Analog Devices.

a High Output Cur r entDiffer ential Dr iverAD815

Analog Devices, Inc., 1996

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.ATel: 617/329-4700 Fax: 617/326-870

PRODUCT DESCRIPTION

The AD815 consists of two high speed amplifiers capable ofsupplying a minimum of 500 mA. T hey are typically configuredas a differential driver enabling an output signal of 40 V p-p on15 V supplies. T his can be increased further with the use of a

FEATURES

Flexible ConfigurationDifferential Input & Output Driveror Two Single-Ended Drivers

High Output Power

Power Package26 dBm Differential Line Drive for ADSL Application

40 V p-p Differential Output Voltage, RL= 50

500 mA Minimum Output Drive/Amp, RL= 5Thermally Enhanced SOIC

200 mA Minimum Output Drive/Amp, RL= 10

Low Distortion66 dB @ 1MHz THD, RL= 200, VOUT= 40 V p-p0.05% & 0.45Differential Gain & Phase, RL= 25

(6 Back-Terminated Video Loads)

High Speed120 MHz Bandwidth (3 dB)900 V/s Differential Slew Rate70 ns Settling Time to 0.1%

Thermal Shutdown

APPLICATIONSADSL, HDSL & VDSL Line Interface DriverCoil or Transformer DriverCRT Convergence & Astigmatism AdjustmentVideo Distribution AmpTwisted Pair Cable Driver

FREQUENCY Hz

40

50

110100 10M1k

TOTALH

ARMONICDISTORTIONdBc

10k 100k 1M

60

70

80

90

100

VS= 15VG = +10VOUT= 40V p-p

RL= 50(DIFFERENTIAL)

RL =200(DIFFERENTIAL)

Total Harmonic Distortion vs. Frequency

AMP1

+15V

15V

499

RL120125

499

VOUT =

40Vp-p

VIN =

4Vp-p

1/2AD815

1/2AD815

G = +10

100

100 AMP2

VD =

40Vp-p

1:2TRANSFORMER

R1= 15

R2= 15

Subscriber Line Differential Driver

coupling transformer with a greater than 1:1 turns ratio. Thelow harmonic distortion of 66dB @ 1M Hz into 200combined with the wide bandwidth and high current drive makethe differential driver ideal for communication applications suchas subscriber line interfaces for ADSL, HDSL and VDSL.

The AD815 differential slew rate of 900 V/s and high loaddrive are suitable for fast dynamic control of coils or trans-formers, and the video performance of 0.05% & 0.45differen-tial gain & phase into a load of 25 enable up to 12 back-terminated loads to be driven.

Three package styles are available, and all work over theindustrial temperature range (40C to +85C). M aximumdriver performance is achieved with the power package availableas through hole (Y ) and surface-mount (VR), while the 24-pinSOIC (RB) driver performance is reduced due to the smallerpackage which has a higher thermal resistance.

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AD815SPECIFICATIONS AD815A

Model Conditions VS Min Typ Max Units

DYNAMIC PERFORMANCESmall Signal Bandwidth (3 dB) G = +1 15 100 120 MHz

G = +1 5 90 110 MHzBandwidth (0.1 dB) G = +2 15 40 MHz

G = +2 5 10 MHzDifferential Slew Rate VOUT = 20 V p-p, G = +2 15 800 900 V/sSettling T ime to 0.1% 10 V Step, G = +2 15 70 ns

NOISE/HARMONIC PERFORMANCETotal Harmonic Distortion f = 1 MHz, RLOAD= 200 , VOUT = 40 V p-p 15 66 dBcInput Voltage Noise f = 10 kHz, G = +2 (Single Ended) 5, 15 1.85 nV/HzInput Current Noise (+IIN ) f = 10 kHz, G = +2 5, 15 1.8 pA/HzInput Current Noise (I IN) f =10 kHz, G = +2 5, 15 19 pA/HzDifferential Gain Error NTSC, G = +2, RLOAD = 25 15 0.05 %Differential Phase Error NTSC, G = +2, RLOAD = 25 15 0.45 Degrees

DC PERFORMANCEInput Offset Voltage 5 5 8 mV

15 10 15 mVT MIN TMAX 30 mV

Input Offset Voltage Drift 20 V/CDifferential Offset Voltage 5 0.5 2 mV

15 0.5 4 mVT MIN TMAX 5 mVDifferential Offset Voltage Drift 10 V/CInput Bias Current 5, 15 10 90 A

T MIN TMAX 150 A+Input Bias Current 5, 15 2 5 A

T MIN TMAX 5 ADifferential Input Bias Current 5, 15 10 75 A

T MIN TMAX 100 AOpen-L oop Transresistance 5, 15 1.0 5.0 M

T MIN TMAX 0.5 M INPUT CHARACTERISTICS

Differential Input Resistance +Input 15 7 M Input 15

Differential Input Capacitance 15 1.4 pFInput Common-M ode Voltage Range 15 13.5 V

5 3.5 VCommon-M ode Rejection Ratio T MIN TMAX 5, 15 57 65 dBDifferential Common-Mode Rejection Ratio T MIN TMAX 5, 15 80 100 dB

OUTPUT CHARACTERISTICSVoltage Swing Single Ended, RLOAD= 25 15 11.0 11.7 V

5 1.1 1.8 VDifferential, RLOAD= 50 15 21 23 V

T MIN TMAX 15 22.5 24.5 VOutput Current1, 2

VR, Y RLOAD= 5 15 500 750 mA5 350 400 mA

RB-24 RLOAD= 10 15 200 250 mAShort Circuit Current 15 1.0 AOutput Resistance

15 13

MATCHI NG CHARACTERISTICSCrosstalk f = 1 MHz 15 65 dB

POWER SUPPL YOperating Range3 T MIN TMAX 18 VQuiescent Current 5 23 30 mA

15 30 40 mAT MIN TMAX 5 40 mA

15 55 mAPower Supply Rejection Ratio T MIN TMAX 5, 15 55 66 dB

NOTES1Output current is limited in the 24-pin SOIC package to the maximum power dissipation. See absolute maximum ratings and derating curves.2See Figure 12 for bandwidth, gain, output drive recommended operation range.3Observe derating curves for maximum junction temperature.

Specifications subject to change without notice.

REV. A2

(@ TA= + 25C, VS= 15 V dc, RFB = 1 kand RLOAD= 1 00 un less o therwise no ted)

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AD815

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MAXIMUM POWER DISSIPATIONThe maximum power that can be safely dissipated by theAD815 is limited by the associated rise in junction temperature.

The maximum safe junction temperature for the plastic encap-sulated parts is determined by the glass transition temperatureof the plastic, about 150C. Exceeding this limit temporarilymay cause a shift in parametric performance due to a change in

the stresses exerted on the die by the package. Exceeding ajunction temperature of 175C for an extended period can resulin device failure.

The AD815 has thermal shutdown protection, which guaranteesthat the maximum junction temperature of the die remains below asafe level, even when the output is shorted to ground. Shortingthe output to either power supply will result in device failure.

To ensure proper operation, it is important to observe thederating curves and refer to the section on power considerations.

It must also be noted that in high (noninverting) gain configura-tions (with low values of gain resistor), a high level of inputoverdrive can result in a large input error current, which mayresult in a significant power dissipation in the input stage. This

power must be included when computing the junction tempera-ture rise due to total internal power.

AMBIENT TEMPERATURE C

14

7

4

50 9040

M

AXIMUMPOWERDISSIPATIONWatts

30 20 10 10 20 30 40 50 60 70 80

13

8

6

5

11

9

12

10

0

TJ= 150C

3

2

1

0

AD815 AVR, AY

JA= 41C/W

(STILL AIR = 0FT/MIN)

NO HEAT SINK

JA= 52C/W

(STILL AIR = 0 FT/MIN)

NO HEAT SINKAD815ARB-24

JA= 16C/W

SOLDERED DOWN TO

COPPER HEAT SINK

(STILL AIR = 0FT/MIN)

AD815 AVR, AY

Plot of Maximum Power Dissipation vs. Temperature

ABSOLUTE MAXIMUM RATINGS1

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V T otalInternal Power D issipation2

Plastic (Y & VR) . . . 3.05 Watts (Observe Derating Curves)Small Outline (RB) . . 2.4 Watts (Observe Derating Curves)

Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . VSDifferential I nput Voltage . . . . . . . . . . . . . . . . . . . . . . . . 6 VOutput Short Circuit Duration

. . . . . . . . . . . . . . . . . . . . . . Observe Power Derating CurvesCan Only Short to Ground

Storage Temperature RangeY, VR & RB Package . . . . . . . . . . . . . . . . 65C to +125C

Operating T emperature RangeAD815A . . . . . . . . . . . . . . . . . . . . . . . . . . . 40C to +85C

Lead Temperature Range (Soldering, 10 seconds) . . . . +300CNOTES1Stresses above those listed under Absolute M aximum Ratings may causepermanent damage to the device. T his is a stress rating only and functionaloperation of the device at these or any other conditions above those indicated in theoperational section of this specification is not implied. Exposure to absolutemaximum rating conditions for extended periods may affect device reliability.

2Specification is for device in free air with 0 ft/min air flow: 15-Pin T hrough Hole

and Surface Mount: JA= 41C/Watt; 24-Pin Surface Mount: JA= 52C/Watt.

PIN CONFIGURATION24-Pin Thermally-Enhanced SOIC (RB-24)

TOP VIEW

(Not to Scale)

AD815

13

16

15

14

24

23

22

21

20

19

18

17

12

11

10

9

8

1

2

3

4

7

6

5

NC = NO CONNECT

NC

NC

NC

NC

NC

NC

NC

NC

+IN1

IN1 IN2

+IN2

OUT1

VS

OUT2

+VS

*HEAT TABS ARE CONNECTED TO THE POSITIVE SUPPLY.

THERMAL

HEAT TABS

+VS*

THERMAL

HEAT TABS

+VS*

WARNING!

ESD SENSITIVE DEVICE

CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readilyaccumulate on the human body and test equipment and can discharge without detection.

Although the AD815 features proprietary ESD protection circuitry, permanent damage mayoccur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

ORDERING GUIDE

Temperature Package Package

Model Range Description Option

AD815AY 40C to +85C 15-Pin Through Hole Y-15SIP with Staggered Leads

AD815AVR 40C to +85C 15-Pin Surface M ount VR-15DDPAK

AD815ARB-24 40C to +85C 24-Pin Thermally RB-24Enhanced SOI C

AD815ARB-24-REEL 40C to +85C 24-Pin Thermally RB-24Enhanced SOIC

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REV. A4

AD815 Typical Perf orm ance Charac ter ist ics

4

JUNCTION TEMPERATURE C40 10020 0 20 40 60 80

36

34

18

SUPPLYCURRENTmA

26

24

22

20

30

28

32

VS= 15V

VS= 5V

Figure 4. Total Supply Current vs. Temperature

SUPPLY VOLTAGE Volts

33

30

180 162

TOTALSUPPLYCURRENTmA

4 6 8 10 12 14

27

24

21

TA= +25C

Figure 5. Total Supply Current vs. Supply Voltage


10

0

80

INPUTBIASCURRENTA

40

50

60

70

20

30

10

SIDE B

SIDE A

SIDE A, B+I B

I B

I BSIDE A

SIDE B

VS= 15V, 5V

VS= 5V

VS= 15V

Figure 6. Input Bias Current vs. Temperature


20

15

00 205

COMMON-MODEVO

LTAGERANGEVolts

10 15

10

5

Figure 1. Input Common-Mode Voltage Range vs. SupplyVoltage


40

30

00 205 10 15

20

10

80

60

0

40

20

NO LOAD

RL= 50

(DIFFERENTIAL)

RL= 25

(SINGLE-ENDED)

SINGLE-ENDEDOUTPUTVOLTAGEVp-p

DIFFERENTIALOUTPUTVOLTAGEVp-p

Figure 2. Output Voltage Swing vs. Supply Voltage

LOAD RESISTANCE (Differential ) (Single-Ended /2)

30

25

010 10k100 1k

20

15

10

5

DIFFERENTIALOUTPUTVOLTAGEVoltsp-p

60

50

0

40

30

20

10

VS= 15V

VS= 5V

SINGLE-END

EDOUTPUTVOLTAGEVoltsp-p

Figure 3. Output Voltage Swing vs. Load Resistance

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AD815

REV. A 5

JUNCTION TEMPERATURE C

0

1440 10020

INPUTOFFSETVOLTAGEmV

0 20 40 60 80

2

6

8

10

12

4

VS= 5V

VS= 15V

Figure 7. Input Offset Voltage vs. Temperature


750

600

45060 14040

SHORTCIRCUITCURRENTmA

20 0 20 40 60 80 100 120

700

650

550

500

VS= 15V

SINK

SOURCE

Figure 8. Short Circuit Current vs. Temperature

VOUT Volts

15

0

1520 2016 12 8 4 0 4 8 12 16

10

5

5

10

VS= 10V

VS= 5V

RTIOFFSETmV

VS= 15V

TA= 25C

RL= 25

1k 1k

RL=

25

VOUT

1/2AD815100

49.9

V INf = 0.1Hz

Figure 9. Gain Nonlinearity vs. Output Voltage

LOAD CURRENT Amps

80

0

60

40

20

20

40

60

2.0 2.01.6 1.2 0.8 0.4 0 0.4 0.8 1.2 1.6

VS=

10V

VS=

5V

RTIOF

FSETmV

VS=

15V

TA= 25C

1k 1k

RL=

5

VOUT

1/2AD815100

49.9

V INf = 0.1Hz

Figure 10. Thermal Nonlinearity vs. Output Current Drive

FREQUENCY Hz

100

30k 300M100k

CLOSED-LOOPOUTPUTRESISTANCE

1M 10M 100M

10

1

0.1

0.01

300k 3M 30M

VS= 5V

VS= 15V

Figure 11. Closed-Loop Output Resistance vs. Frequency

FREQUENCY MHz

40

00 146

DIFFE

RENTIALOUTPUTVOLTAGEVp-p

10

30

20

10

RL= 50

RL= 25

RL= 1

2 4 8 12

RL= 100

TA= 25C

VS= 15V

Figure 12. Large Signal Frequency Response

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REV. A6

FREQUENCY Hz

100

10

110 100k100 1k 10k

VOLTAGEN

OISEnV/Hz

100

10

1

CURRENT

NOISEpA/Hz

INVERTING INPUTCURRENT NOISE

NONINVERTING INPUTCURRENT NOISE

INPUT VOLTAGENOISE

Figure 13. Input Current and Voltage Noise vs. Frequency

FREQUENCY Hz

90

80

1010k 100M100k

COMMON-MODEREJECTIONdB

1M 10M

70

60

50

40

30

20

VS= 15V

SIDE A

SIDE B

562

562

562

562

VOUTVIN

1/2AD815

Figure 14. Common-Mode Rejection vs. Frequency

FREQUENCY MHz0.01

0

10

20

30

40

50

60

70

80

90

1000.1

PSRRdB

1 10 100 300

PSRR

+PSRR

VS= 15VG = +2RL= 100

Figure 15. Power Supply Rejection vs. Frequency

FREQUENCY Hz

100 100M1k

TRANSIMP

EDANCEdB

10k 100k 1M 10M

120

110

100

90

80

70

60

50

40

30

PHASEDeg

rees

100

500

0

50

100

150

200

250

TRANSIMPEDANCE

PHASE

Figure 16. Open-Loop Transimpedance vs. Frequency

FREQUENCY Hz

40

50

110100 10M1k

TOTALHARMONICDISTORTIONdBc

10k 100k 1M

60

70

80

90

100

VS= 15VG = +10VOUT= 40V p-p

RL= 50(DIFFERENTIAL)

RL =200(DIFFERENTIAL)

Figure 17. Total Harmonic Distortion vs. Frequency

SETTLING TIME ns

10

10

8

2

2

6

8

6

4

0

4

60

OU

TPUTSWINGFROMVTO0Volts

40 80 100

GAIN = +2

VS= 15V

1% 0.1%

0 20 70

1% 0.1%

Figure 18. Output Swing and Error vs. Settling Time

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AD815

REV. A 7

OUTPUT STEP SIZE V p-p

700

0

600

500

400

300

200

100

0 255 10 15 20

SINGLE-ENDED

SLEWR

ATEV/s

(PERAMPLIFIER)

G = +2

G = +10

1400

0

1200

1000

800

600

400

200 DIFFERENTIALSLEWR

ATEV/s

Figure 19. Slew Rate vs. Output Step Size


85

80

6040 10020

PSRRdB

0 20 40 60 80

75

70

65

+PSRR

PSRR

SIDE B

SIDE A

SIDE B

SIDE A

VS= 15V

Figure 20. PSRR vs. Temperature


74

66

CMRRdB

73

70

69

68

67

72

71

CMRR

+CMRR

Figure 21. CMRR vs. Temperature


5

4

040 10020

OPEN-LOOPTRANSRESISTANCEM

0 20 40 60 80

3

2

1

+TZ

SIDE ASIDE B

SIDE A

SIDE B

TZ

Figure 22. Open-Loop Transresistance vs. Temperature


15

14

1040 10020

OUTPUTSWINGVolts

0 20 40 60 80

13

12

11

VS= 15V

| VOUT |

+VOUT

+VOUT

| VOUT |

RL= 150

RL= 25

Figure 23. Single-Ended Output Swing vs. Temperature


26

22

25

24

23

40 10020

OUTPUTSWINGVolts

0 20 40 60 80

VS= 15V

RL= 50

VOUT

+VOUT

Figure 24. Differential Output Swing vs. Temperature

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AD815

REV. A8

0.04

0.03

0.02

0.010.00

0.01

0.02

0.03

0.04

DIFFGAIN%

0.12

0.10

0.08

0.06

0.04

0.02

0.00

0.02

0.04

DIFFPHASEDegrees

G = +2RF= 1kNTSC

1 2 3 4 5 6 7 8 9 10 11

0.5

0.4

0.3

0.2

0.1

0.0

0.1

0.2

0.3

GAIN

PHASE

0.005

0.000

0.005

0.010

0.015

0.020

0.025

0.030

0.010

DIFFGAIN%

DIFFPHASEDegrees

1 2 3 4 5 6 7 8 9 10 11

6 BACK TERMINATED LOADS (25)

2 BACK TERMINATED LOADS (75)

G = +2RF= 1kNTSC

GAIN

PHASEGAIN

PHASE

Figure 25. Differential Gain and Differential Phase

(per Amplifier)

FREQUENCY MHz0.03

10

20

30

40

50

60

70

80

90

100

0.1

CROSSTALKdB

1 10 100 300

SIDE B

SIDE A

G = +2RF= 499VS= 15V, 5VVIN= 400mVrms

RL= 100

110

Figure 26. Output-to-Output Crosstalk vs. Frequency

FREQUENCY MHz

1

0

1

2

3

4

5

6

7

9

2

0.1 3001

OUTPUTVOLTAGEdB

10 100

SIDE B

SIDE A

562 100

100

49.9

VOUT

VIN

VS= 15V

VIN= 0 dBm

Figure 27. 3 dB Bandwidth vs. Frequency, G =+1

FREQUENCY MHz

0.1

0

0.1 3001

NORMALIZEDFLA

TNESSdB

10 100

15V

5V

499 100

100

49.9

VOUT

VIN

499

A

B

A

B

15V

5V

0.1

0.2

0.3

0.4

0.5

0.6

0.7

1

0

1

2

3

4

5

6

7

8

9

NORMALIZEDFREQ

UENCYRESPONSEdB

Figure 28. Bandwidth vs. Frequency, G =+2

FREQUENCY MHz

0

0.1 3001

NORMALIZEDOUTPUTVOLTAGEdB

10 100

499 100

100 VOUTVIN

124

SIDE A

SIDE B1

2

3

4

5

6

7

1

VS= 15V

Figure 29. 3 dB Bandwidth vs. Frequency, G =+5

10

0%

100

90

1s5V

Figure 30. 40 V p-p Differential Sine Wave, RL=50,f =100 kHz

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REV. A 9

1/2 AD815

0.1F

10F+15V

562

0.1F

10F

7

15V

RL= 100100

50

VIN

PULSEGENERATOR

TR/TF= 250ps

8

Figure 31. Test Circuit, Gain =+1

100mV 20ns

SIDE B

SIDE A G = +1

RF= 698

RL= 100

Figure 32. 500 mV Step Response, G =+1

1V 20ns

SIDE B

SIDE A

G = +1

RF= 562

RL= 100

Figure 33. 4 V Step Response, G =+1

2V 50ns

SIDE B

SIDE A G = +1

RF= 562

RL= 100


1/2 AD815

8

0.1F

10F+15V

0.1F

10F7

15V

RL= 100100

50

VIN

PULSEGENERATOR

TR/TF= 250ps

RS

RF

Figure 35. Test Circuit, Gain =1 +RF/RS

5V 100ns

SIDE B

SIDE A

G = +5

RF= 562

RL= 100

RS= 140


1/2 AD815

8

0.1F

10F+15V

0.1F

10F

7

15V

RL= 100100

55

VIN

PULSEGENERATOR

TR/TF= 250ps

562

562

Figure 37. Test Circuit, Gain =1

100mV 20ns

SIDE B

SIDE A G = 1

RF= 562

RL= 100

Figure 38. 500 mV Step Response, G =1

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REV. A10

Choice of Feedback and Gain ResistorsThe fine scale gain flatness will, to some extent, vary withfeedback resistance. It therefore is recommended that onceoptimum resistor values have been determined, 1% tolerancevalues should be used if it is desired to maintain flatness over awide range of production lots. T able I shows optimum valuesfor several useful configurations. T hese should be used as

starting point in any application.

Table I. Resistor Values

RF() RG()

G = +1 562 1 499 499+2 499 499+5 499 125+10 1K 110

PRINTED CIRCUIT BOARD LAYOUT

CONSIDERATIONS

As to be expected for a wideband amplifier, PC board parasiticscan affect the overall closed-loop performance. Of concern arestray capacitances at the output and the inverting input nodes. Ifa ground plane is to be used on the same side of the board asthe signal traces, a space (5 mm min) should be left around thesignal lines to minimize coupling.

POWER SUPPLY BYPASSINGAdequate power supply bypassing can be critical when optimizingthe performance of a high frequency circuit. I nductance in thepower supply leads can form resonant circuits that producepeaking in the amplifiers response. I n addition, if large currenttransients must be delivered to the load, then bypass capacitors(typically greater than 1 F) will be required to provide the bestsettling time and lowest distortion. A parallel combination of10.0 F and 0.1 F is recommended. U nder some low fre-quency applications, a bypass capacitance of greater than 10 Fmay be necessary. Due to the large load currents delivered bythe AD815, special consideration must be given to careful by-passing. The ground returns on both supply bypass capacitorsas well as signal common must be star connected as shown inFigure 41.

RF

RG(OPTIONAL)

RF

+VS

+OUT

OUT

VS

+IN

IN

Figure 41. Signal Ground Connected in StarConfiguration

1V 20ns

SIDE B

SIDE A

G = 1

RF= 562

RL= 100

Figure 39. 4 V Step Response, G =1

THEORY OF OPERATIONThe AD815 is a dual current feedback amplifier with high(500mA) output current capability. Being a current feedbackamplifier, the AD815s open-loop behavior is expressed astransimpedance, VO/IIN , or T Z. T he open-loop transimped-

ance behaves just as the open-loop voltage gain of a voltagefeedback amplifier, that is, it has a large dc value and decreasesat roughly 6 dB/octave in frequency.

Since RIN is proportional to 1/gM, the equivalent voltage gain isjust T Z gM, where the gMin question is the transconductanceof the input stage. Using this amplifier as a follower with gain,Figure 40, basic analysis yields the following result:

VO

VIN

= G T

Z S( )

TZ S( ) +G RIN + RF

where:

G= 1+ R

F

RG

RIN= 1/gM25

RIN

VIN

RF

VOUT

RG

RN

Figure 40.

Recognizing that G RIN

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DC ERRORS AND NOISEThere are three major noise and offset terms to consider in acurrent feedback amplifier. For offset errors refer to theequation below. For noise error the terms are root-sum-squaredto give a net output error. I n the circuit below (F igure 42), theyare input offset (VIO) which appears at the output multiplied bythe noise gain of the circuit (1 + RF/RG), noninverting input

current (IBNRN) also multiplied by the noise gain, and theinverting input current, which when divided between RFand RGand subsequently multiplied by the noise gain always appear atthe output as IBI RF. T he input voltage noise of the AD815 isless than 2 nV/Hz. At low gains though, the inverting inputcurrent noise times RFis the dominant noise source. Carefullayout and device matching contribute to better offset and driftspecifica-tions for the AD815 compared to many other currentfeedback amplifiers. The typical performance curves inconjunction with the equations below can be used to predict theperformance of the AD815 in any application.

VOU T

= VIO

1+ RFRG

I

BN R

N 1+ RF

RG

I

BI R

F

IBI

IBN

RG

RN

RF

VOUT

Figure 42. Output Offset Voltage

POWER CONSIDERATIONSThe 500mA drive capability of the AD815 enables it to drive a50load at 40V p-p when it is configured as a differentialdriver. This implies a power dissipation, PIN , of nearly 5 watts.

To ensure reliability, the junction temperature of the AD815should be maintained at less than 175C. For this reason, theAD815 will require some form of heat sinking in most applica-tions. The thermal diagram of Figure 43 gives the basicrelationship between junction temperature (TJ) and variouscomponents of JA.

TJ =TA + PIN JA Equation 1

A (JUNCTION TODIE MOUNT)

B (DIE MOUNTTO CASE)

A+ B = JCCASE

TA

TJ

JC CA

TA JA

TJ

PIN

WHERE:

PIN = DEVICE DISSIPATION

TA= AMBIENT TEMPERATURE

TJ= JUNCTION TEMPERATURE

JC= THERMAL RESISTANCE JUNCTION TO CASE CA= THERMAL RESISTANCE CASE TO AMBIENT

Figure 43. A Breakdown of Various Package ThermalResistances

Figure 44 gives the relationship between output voltage swinginto various loads and the power dissipated by the AD815 (PIN)

This data is given for both sine wave and square wave (worstcase) conditions. It should be noted that these graphs are formostly resistive (phase < 10) loads. When the power dissipationrequirements are known, Equation 1 and the graph on Figure 45can be used to choose an appropriate heat sinking configuration

4

3

PINWatts

10 20 30 40

2

1

VOUT Volts p-p

RL= 50

RL= 100

RL= 200

f = 1kHz

SQUARE WAVE

SINE WAVE

Figure 44. Total Power Dissipation vs. Differential OutputVoltage

Normally, the AD815 will be soldered directly to a copper pad.Figure 45 plots JAagainst size of copper pad. T his data pertainsto copper pads on both sides of G10 epoxy glass board connectedtogether with a grid of feedthroughs on 5 mm centers.

This data shows that loads of 100 ohms or less will usually notrequire any more than this. This is a feature of the AD815s 15lead power SIP package.

An important component of JAis the thermal resistance of thepackage to heatsink. The data given is for a direct solderedconnection of package to copper pad. The use of heatsinkgrease either with or without an insulating washer will increasethis number. Several options now exist for dry thermal connec-tions. T hese are available from Bergquist as part # SP600-90.Consult with the manufacturer of these products for details oftheir application.

COPPER HEAT SINK AREA (TOP AND BOTTOM) mm2

35

30

100 2.5k0.5k

JA

C/W

1k 1.5k 2k

25

20

15

AD815AVR, AY (JC= 2C/W)

Figure 45. Power Package Thermal Resistance vs. Heat

Sink Area

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Other Power ConsiderationsThere are additional power considerations applicable to theAD815. First, as with many current feedback amplifiers, there is anincrease in supply current when delivering a large peak-to-peakvoltage to a resistive load at high frequencies. This behavior isaffected by the load present at the amplifiers output. Figure 12summarizes the full power response capabilities of the AD815.

These curves apply to the differential driver applications (e.g.,Figure 49 or F igure 53). I n F igure 12, maximum continuouspeak-to-peak output voltage is plotted vs. frequency for variousresistive loads. Exceeding this value on a continuous basis candamage the AD815.

The AD815 is equipped with a thermal shutdown circuit. Thiscircuit ensures that the temperature of the AD815 die remainsbelow a safe level. I n normal operation, the circuit shuts downthe AD815 at approximately 180C and allows the circuit toturn back on at approximately 140C. This built-in hysteresismeans that a sustained thermal overload will cycle betweenpower-on and power-off conditions. T he thermal cyclingtypically occurs at a rate of 1ms to several seconds, depending

on the power dissipation and the thermal time constants of thepackage and heat sinking. Figures 46 and 47 illustrate thethermal shutdown operation after driving OUT1 to the + rail,and OUT2 to the rail, and then short-circuiting to groundeach output of the AD815. The AD815 will not be damaged bymomentary operation in this state, but the overload conditionshould be removed.

10

0%

100

90

OUT 1

200s5V

OUT 2

Figure 46. OUT2 Shorted to Ground, Square Wave Is

OUT1, RF=1 k, RG=222

10

0%

100

90

OUT 1

5ms5V

OUT 2

Figure 47. OUT1 Shorted to Ground, Square Wave IsOUT2, RF=1 k, RG=222

Parallel OperationTo increase the drive current to a load, both of the amplifierswithin the AD815 can be connected in parallel. Each amplifiershould be set for the same gain and driven with the same signal.In order to ensure that the two amplifiers share current, a small

resistor should be placed in series with each output. See Figure48. This circuit can deliver 800 mA into loads of up to 12.5 .

6

4

5 8

+15V

499 499

1

10

7

15V

499 499

1

RL

9

11

50

0.1F10F

0.1F 10F

1/2AD815

1/2AD815

100

100

Figure 48. Parallel Operation for High Current Output

Differential OperationVarious circuit configurations can be used for differentialoperation of the AD815. If a differential drive signal is available,the two halves can be used in a classic instrumentation config-uration to provide a circuit with differential input and output.

The circuit in Figure 49 is an illustration of this. With theresistors shown, the gain of the circuit is 11. The gain can bechanged by changing the value of RG. T his circuit, however,provides no common-mode rejection.

6

4

5

8

+15V

10

7

15V

RF499

RL

9

11

0.1F 10F

RG100

RF499

0.1F 10F

1/2

AD815

VOUTVIN

1/2AD815

100

100

+IN

IN

OUT 1

OUT 2

Figure 49. Fully-Differential Operation

Creating Differential SignalsIf only a single ended signal is available to drive the AD815 anda differential output signal is desired, several circuits can beused to perform the single-ended to differential conversion.

One circuit to perform this is to use a dual op amp as a pre-driver that is configured as a noninverter and inverter. Thecircuit shown in Figure 50 performs this function. I t uses anAD826 dual op amp with the gain of one amplifier set at +1 andthe gain of the other at 1. The 1kresistor across the inputterminals of the follower makes the noise gain (NG = 1) equalto the inverters. T he two outputs then differentially drive theinputs to the AD815 with no common-mode signal to first order.

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Figure 56. AD815 AVR Evaluation Board Assembly Drawing

Figure 57. AD815 AVR Evaluation Board Layout(Component Side)

Figure 58. AD815 AVR Evaluation Board Layout (Solder Side)

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15-Pin Surface Mount DDPAK

(VR-15)

1

0.080 (2.03)

0.065 (1.65)

2 PLACES

0.694(17.63)

0.684(17.37)

PIN 1

0.516(13.106)

0.110(2.79)BSC

0.042(1.066)TYP

0.137(3.479)TYP

0.394(10.007)

0.152 (3.86)

0.148 (3.76)

0.600 (15.24)BSC

0.079 (2.006)DIA2 PLACES

15

0.024 (0.61)

0.014 (0.36)

0.063 (1.60)

0.057 (1.45)

80

0.088(2.24)

0.068(1.72)

0.426(10.82)

0.416(10.57)

SEATINGPLANE

0.031 (0.79)

0.024 (0.60)

0.100 (2.54)BSC

0.798 (20.27)

0.778 (19.76)

0.182 (4.62)

0.172 (4.37)

15-Pin Through Hole SIP with Staggered Leads

(Y-15)

0.063 (1.60)

0.057 (1.45)

0.6710.006

(17.0430.152)SHORT

LEAD

0.024 (0.61)

0.014 (0.36)

0.6660.006(16.9160.152)LONGLEAD 0

.6910.010

(17.5510.254)

0.7660.010

(19.4560.254)

0.7910.010

(20.0910.254)

0.694(17.63)

0.684(17.37)

PIN 1

0.110(2.79)BSC 0.394

(10.007)

0.152 (3.86)

0.148 (3.76)

0.080 (2.03)

0.065 (1.65)2 PLACES

0.516(13.106)

0.042(1.066)TYP

0.137(3.479)TYP

0.079 (2.006)DIA2 PLACES

0.426(10.82)

0.416(10.57)

1 15

0.700 (17.78) BSC

SEATINGPLANE

0.031 (0.79)

0.024 (0.60)

0.050(1.27)BSC

0.798 (20.27)

0.778 (19.76)

0.182 (4.62)0.172 (4.37)

0.209 0.010(5.308 0.254)

OUTLINE DIMENSIONSDimensions shown in inches and (mm).

24-Pin Thermally Enhanced SOIC

(RB-24)

24 13

121

0.6141 (15.60)

0.5985 (15.20)

0.4193(10.65)

0.3937(10.00)

0.2992(7.60)

0.2914(7.40)

PIN 1

SEATINGPLANE

0.0118 (0.30)

0.0040 (0.10)

0.0201 (0.51)

0.0130 (0.33)

0.1043 (2.65)

0.0926 (2.35)

0.0500(1.27)BSC

0.0125 (0.32)

0.0091 (0.23)

0.0500 (1.27)

0.0157 (0.40)

80

0.0291 (0.74)

0.0098 (0.25)x 45

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AD815