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Ahmed Youssef Fouad 40 Salah-eldin St Alexandria 21533, Egypt Email: [email protected] [email protected] LinkedIn: https://eg.linkedin.com/in/ahmed-youssef-6302a991 +20-1061708523 EDUCATION Faculty of Engineering, Alexandria University Alexandria, Egypt B.Sc , Communications and Electronics graduation year 2016 (Sep 2011 to Jul 2016) Overall Grade: Good (70.3 % ) GPA: 2.9 EXPERIENCE Network engineer (Oct 2016 - Dec 2016) Advanced Chemical Industries (ACI). (http://www.aci-adhesive.com/) responsible of the company network and IT infrastructure of both the factory and administration office. work includes working with Virtual machine dealing with servers, TCP/IP, access controls,cisco based VPN, surveillance cameras and normal helpdesk IT responsibilities. Run Time Verification methodology Based on system verilog assertions synthesis with mutation based auto-correction (April 2015 - present) Mentor Graphics, Cairo, Egypt. The idea was to insert SVA into RTL programs, Synthesizing it into hardware check- ers to be used as a run-time effective verification methodology and then automatically correct detected bugs using a mutation based methodology. Worked on the methodology synthesizing Systemverilog assertions to FPGA platform used for run time verification using Dynamic partial reconfiguration. Responsible for handling auto correction based on mutation using static slicing, backward tracing and ranking approaches. SystemVerilog Assertions Synthesis Compiler (SVA-C) (Oct 2015 - present) Mentor Graphics, Cairo, Egypt. SVA-C is a compiler prototype that can synthesis SystemVerilog assertions through generic replacement of SVA with a pre-designed list of verilog modules. participating in designing the compiler architecture. Responsible for handling Parsing section of compiler. work is done under supervision of Dr.khaled Salah & Dr.Mohamed Abdelsalam. Digital Design Training Program Jan - Feb 2014 Egypt-Japan University of Science and Technology (E-JUST), Alexandria, Egypt. Learned the basics of Digital VLSI Design for Systems On Chip (SOC), Verilog HDL, and worked on ALTERA FPGAs in the university labs. A Hardware implementation of 128 bit Advanced Encryption Standard counter mode (AES-CTR).

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Ahmed Youssef Fouad

40 Salah-eldin StAlexandria 21533, Egypt

Email: [email protected]@gmail.com

LinkedIn: https://eg.linkedin.com/in/ahmed-youssef-6302a991+20-1061708523

EDUCATION Faculty of Engineering, Alexandria University Alexandria, EgyptB.Sc , Communications and Electronics graduation year 2016 (Sep 2011 to Jul 2016)Overall Grade: Good (70.3 % ) GPA: 2.9

EXPERIENCE Network engineer (Oct 2016 - Dec 2016)Advanced Chemical Industries (ACI). (http://www.aci-adhesive.com/)

• responsible of the company network and IT infrastructure of both the factoryand administration office.

• work includes working with Virtual machine dealing with servers, TCP/IP,access controls,cisco based VPN, surveillance cameras and normal helpdesk ITresponsibilities.

Run Time Verification methodology Based on system verilog assertionssynthesis with mutation based auto-correction (April 2015 - present)Mentor Graphics, Cairo, Egypt.

The idea was to insert SVA into RTL programs, Synthesizing it into hardware check-ers to be used as a run-time effective verification methodology and then automaticallycorrect detected bugs using a mutation based methodology.

• Worked on the methodology synthesizing Systemverilog assertions to FPGAplatform used for run time verification using Dynamic partial reconfiguration.

• Responsible for handling auto correction based on mutation using static slicing,backward tracing and ranking approaches.

SystemVerilog Assertions Synthesis Compiler (SVA-C) (Oct 2015 - present)Mentor Graphics, Cairo, Egypt.

SVA-C is a compiler prototype that can synthesis SystemVerilog assertions throughgeneric replacement of SVA with a pre-designed list of verilog modules.

• participating in designing the compiler architecture.• Responsible for handling Parsing section of compiler.

work is done under supervision of Dr.khaled Salah & Dr.Mohamed Abdelsalam.

Digital Design Training Program Jan - Feb 2014Egypt-Japan University of Science and Technology (E-JUST), Alexandria, Egypt.

• Learned the basics of Digital VLSI Design for Systems On Chip (SOC), VerilogHDL, and worked on ALTERA FPGAs in the university labs.

• A Hardware implementation of 128 bit Advanced Encryption Standard countermode (AES-CTR).

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Training program was under supervision of Dr.Ahmed Shalaby & Dr. MohamedMorsy.

OpenGL ES 1.1 Compliant High Performance GPU (Feb 2014 - June 2014)Ain-Shams University, Cairo, Egypt.

• Participated in architecture team under the supervision of Dr.Maged Ghoneima.• Contributed to architecture of fragment processor, texture and Rasterization

blocks.

Coffee Can Radar (MIT Student Project) (Jul - Oct 2014)Egypt-Japan University of Science and Technology (E-JUST), Alexandria, Egypt.This project was a MIT student project aims to learn the basics of RADAR systemwith very low cost as possible.

• The goal was to create a low-power range-Doppler SAR imaging system basedon an existing coffee can antenna design.

• Participate in the Radar hardware embedded system using tiva-c microcon-troller and pcb designing.

International robotics challenge (IRC) 2014 Local Competition (Aug -Jan 2014)

• Member of a team that designed the automatic robot .• Contributed to the design & Implementation of electrical system.• Incorporated an algorithm to locate objects within maze and calculating the

shortest path using ultrasonic sensors.

PERL scripting course (Aug - sep 2016)vlsiEgypt -a nonprofit community based activity to enrich electronics field- the courseheld at Information Technology Institution (ITI).

• was instructor for the Perl scripting course with vlsiEgypt alex chapter.

• for more information you could find it on: http://www.vlsiegypt.com/

RESEARCHINTEREST

Networks,cyber security and distributing computing, Digital VLSI Design,HardwareVerification methodologies, Computer Architecture, FPGA, software programming.

SKILLS • Programming Languages: Verilog, VHDL, System Verilog, C, Matlab, PerlScripting, Python, Shell, TCL, VBA and LaTeX.

• Tools and general skills: Networks CCNA, windows server administra-tion,Mentor graphics model-Sim, Xilinx vivado design suit, Xilinix ISE, Quar-tus, Mentor graphics Questa-Sim, Synopsis Design compiler, Matlab.

• Microcontrollers: good knowledge of Pic, Arduino kit, AVR (basic)

CONFERENCEABSTRACTS,PUBLICATIONS&COMPETITIONS

• System Verilog Assertions Synthesis Based Compiler”, (paper ID 203-LT168),the 53th Design Automation Conference (DAC), in WIP track, June 2016.( http://www2.dac.com/events/eventdetails.aspx?id=200-101)

• System Verilog Assertions Synthesis Based Compiler”,accepted for publishingat Microprocessor/SoC Test and Verification (MTV 2016).

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• Finial winners in IC Design track in IBTICAR 2016 competition for Graduationprojects.

VOLUNTEEREXPERIENCE &COMMUNITYSERVICE

Volunteer at Egypt Scholars Student Chapter (Feb 2014 - Mar 2015)Alexandria University, Alexandria, Egypt

• Member of the Marketing Committee.

Volunteer at Science Club team. (Aug 2012 - present)Alexandria University, Alexandria, Egypt.The team is a part of the scientific committee of the students union.

• Co-founded the team in Aug 2012, and was head of scientific committee till Aug2014.

• Wrote many articles for the Science Club magazine published in college.

Project manager of LET’S MAKE A ROBOT 2014 (Feb 2014 - Mar 2015)Alexandria University, Alexandria, EgyptLET’s MAKE A ROBOT is Science club annual mega event that aims to providestudents with sufficient electrical and mechanical knowledge to enter the world ofrobotics. the event is a competition of three changing phases to build up roboticsknowledge.

• was responsible of dealing with sponsors, Putting the plan of marketing, plan-ning the content of courses, supervising the workshops held and a judge in thelast phase of the competition.

SKILLSGAINED

Communication skills, team player and team building, problem solving,time and effort management, good worker under pressure and adaptingto new situations.

LANGUAGES Arabic (Native), English (Proficient), French (Basic).

REFERENCES • Dr. Ahmed ShalabyPostdoctoral Research FellowEgypt-Japan University of Science and Technology (E-JUST)Alexandria, EgyptEmail: [email protected]

• Dr. Maged GhoneimaProfessor at Faculty of Engineering,Ain Shams UniversityEgypt, Cairo, EgyptEmail: m [email protected]

• Dr. Khaled Mohammed SalahMentor Graphics Corporation.Email: Khaled [email protected]

• Dr. Mohamed AbdelsalamMentor Graphics Corporation.Email: Mohamed [email protected]