Bai Giang Cau Truc May Tinh

Cu trc My tnh 1GV: inh ng Lng

TRNG I HC THY SNKHOA CNG NGH THNG TIN

BI GING

CU TRC MY TNH(Computer Structure)


Gii thiu

Cu trc My tnh(Computer Structure)

Trnh b y : inh ng Lng.T : 058.832078

Mobile: 0914147520Email: [email protected]


Mc ch v yu cu

Mc ch: Tm hiu cu trc v t chc cc my tnh. Tm hiu nguyn l hot ng c bn My tnh. Gii thiu cu trc my tnh tin tin ca Intel.Yu cu: C kin thc lp trnh c bn. Sinh vin c ti liu v lm vic theo nhm thc

hin bo co trn lp.


Ti liu tham kho (sch)

1.Willian Stallings - Computer Organization and Architecture. 2.Andrew Stamenbaum Structure Computer Organization.3.Cm nang sa cha v nng cp my tnh c nhn

Nguyn ng Khoa4.Gio trnh bo tr v nng cp my tnh

(Trng KHTN - TPHCM )L Cng Bo

5. Cu to v nguyn l hot ng ca h thng my RON WHITE - Nguyn Trng Tun (Dch)


Ti liu tham kho (trang web)

@[email protected]@[email protected]@[email protected]


Ni dung mn hc

1. Gii thiu chung.2. H thng my tnh.3. Biu din d liu v s hc my tnh.4. B x l trung tm.5. B nh My tnh.6. H thng vo ra.


Chng 1

1.1 Khi nim chung my tnh

1.2 Phn loi my tnh

1.3 S tin ha ca my tnh

Gii thiu chung


1.1 Khi nim chung

My tnh(computer) l thit b in t thc hin cng vic sau:

nhn thng tin vo. x l thng tin theo chng trnh nh sn bn trong b

nh my tnh. a thng tin ra.Chng trnh (Program): chng trnh l dy cc cu

lnh nm trong b nh, nhm mc ch hng dn my tnh thc hin mt cng vic c th no y. My tnh thc hin theo chng trnh.


Phn mm (Software): Bao gm chng trnh v d liu.

Phn cng (Hardware): Bao gm tt c cc thnh phn vt l cu thnh ln h thng My tnh.Phn do (Firmware): L thnh phn cha c hai thnh phn trn. Kin trc my tnh(Computer Architecture) cp n cc thuc tnh ca h thng my tnh di ci nhn ca ngi lp trnh. Hay ni cch khc, l nhng thuc tnh nh hng trc tip n qu trnh thc hin logic ca chng trnh. Bao gm: tp lnh, biu din d liu, cc c ch vo ra, k thut nh a ch,

1.1 Khi nim chung


T chc my tnh(Computer Organization): cp n cc khi chc nng v lin h gia chng thc hin nhng c trng ca kin trc. V d: trong kin trc b nhn: y l thuc tnh ca h thng x l. B nhn ny s c t chc ring bn trong my tnh hoc n c tnh ton nhiu ln trn b cng cng c mt kt qa nhn tng ng. Cu trc my tnh(Computer Structure): l nhng thnh phn ca my tnh v nhng lin kt gia cc thnh phn. mc cao nht my tnh bao gm 4 thnh phn:

1.1 Khi nim chung


B x l : iu khin v x l s liu.B nh : cha chng trnh v d liu.H thng vo ra : trao i thng tin gia my tnh

vi bn ngoi.Lin kt gia cc h thng : lin kt cc thnh phn

ca my tnh li vi nhau.

1.1 Khi nim chung


M hnh phn lp ca h thng

CC TRNH NG CC TRNH NG DNGDNG

CC PHN MM TRUNG GIANCC PHN MM TRUNG GIAN

H IU HNHH IU HNH

PHN CNG MY TNHPHN CNG MY TNH

Ngi dngNgi dng

Nh Tk OSNh Tk OS

Nh lp trnhNh lp trnh

1.1 Khi nim chung


M hnh c bn

Cc thit b Cc thit b nhpnhp

Cc thit b Cc thit b xutxut

X L X L TRUNG TMTRUNG TM

B NH B NH CHNHCHNH

1.1 Khi nim chung


S cu trc my tnh

Computer

Main Memory

InputOutput

SystemsInterconnection

Peripherals

CentralProcessing Unit

Computer

Communicationlines

1.1 Khi nim chung


S cu trc CPU

Computer ArithmeticArithmeticand and

Login UnitLogin Unit

ControlControlUnitUnit

Internal CPUInternal CPUInterconnectionInterconnection

RegistersRegisters

CPU

I/O

Memory

SystemBus

CPU

1.1 Khi nim chung


Chc nng(Computer Function): l m t hot ng ca h thng hay tng thnh phn ca h thng.Chc nng chung ca mt h thng bao gm:X l d liu.Lu tr d liu.Vn chuyn d liu.iu khin

1.1 Khi nim chung


S chc nng my tnh

DataDataMovementMovementApparatusApparatus

ControlControlMechanismMechanism

DataDataStorageStorageFacilityFacility

DataDataProcessingProcessing

FacilityFacility

1.1 Khi nim chung


1.2 Phn loi my tnh

Phn loi theo phng php truyn thng

My vi tnh ( Microcomputer)

My tnh nh (Minicomputer)

My tnh ln (Mainframe Computer)

Siu my tnh (Super Computer)

Phn loi theo phng php hin i

My tnh bn (Desktop Computer)

My ch (Servers)

My tnh nhng (Embedded Computer)


My bn: l loi my thng dng nht hin nay. bao gm my tnh c nhn (PC: Persional Computer)

v trm (Workstation Computer). gi mua 100$ n 10.000$My ch l my phc v(server) dng trong mng theo m hnh Clent/Server c tc , hiu nng, b nh v tin cy cao gi vi chc nghn n vi chc triu

1.2 Phn loi my tnh


My tnh nhng c t trong nhiu thit b khc nhau iu khin

thit b lm vic c thit k chuyn dng v d: in thoi di ng, b iu khin cc thit gia

nh, Router nh tuyn,

1.2 Phn loi my tnh



S pht trin ca my tnh chia ra 4 th h: Th h 1: My tnh dng n chn khng (Vacumm

Tube) 1946-1955Th h 2: My tnh dng Transitor (1955-1965)Th h 3: My tnh dng mch tch hp IC

(Intergrated Circuit) 1966 1980Th h 4: My tnh dng mch tch hp cc ln

VLSI (Very Large Scale Intergrated )1980 n nay


My tnh ENIAC Electronic Numerical Integrator And Computer


xut nm 1943 v hon thnh 1946 c s dng n1955 do thy tr Eckert v Mauchly Trng i hc Pennsylvania ca M

c im chnh:

Nng 30 tn, chin din tch 150m2 v s dng 140KW.

5000 nghn php cng trn giy.

S dng h thp phn.

Lp trnh bng cng tc.

S dng 18000 bng n in t (vacuum tubes)



My tnh Von Neumann

My tnh IAS(Institute for Advanced Studies) My c m hnh c bn l my tnh ny nay Th k 1947 hon thnh 1952 Xy dng da trn tng ca Turring (M) v Von

Neumann(Anh)

MainMemory

Arithmetic and ogic Unit

Program Control Unit

InputOutput

Equipment


Cc sn phm ca cng ngh VLSI(Very Large Scale Integrated) B vi x l c ch to trn mt con chip Vi mch iu khin tng hp (Chipset) B nh bn dn c lp( ROM, RAM) thit k

thnh Module Cc b vi iu khin chuyn dng.

B vi x l u tin ca Intel 4004 nm1971 B x l c coi hon thin nht l 8088/8086 nm

1978,1979 y c coi l ngy sinh nht ca cc my tnh sau ny



My Micral, Andr Trng Trng Thi sng ch

Micral Php, my vi tnh lp rp hon ton u tin


CeleronPentium 4 (Intel) 20032003

CeleronPentium II (Intel) 19971997

CeleronPentium III (Intel) 19991999

8086 (Intel) 19781978

80286 (Intel)19801980

8088 (Intel) 19791979

Pentium (Intel) 19931993

Lch s pht trin my tnh th h th 4Lch s pht trin my tnh th h th 4



Chng 2

H thng my tnh

2.1 Cc thnh phn c bn ca my tnh 2.2 Hot ng c bn ca my tnh2.3 Lin kt h thng


2.1 Cc thnh phn c bn ca my tnh

M hnh c bn ca my tnh.Cc m hnh my tnh hin nay c thit k da trn kin trc Von Neumann.

Cc c im kin trc ca Von Neumann:D liu v chng trnh cha trong b nh c ghi.B nh c nh a ch cho cc ngn nh khng ph

thuc vo ni dung ca chng.My tnh thc hin lnh mt cch tun t.


S cu trc c bn ca my tnh

B x l trung tm (CPU): iu khin hot ng ca my tnh v x l s liu

H thng nh: cha chng trnh v d liu ang c x l. H thng vo/ra (I/O: Input/Output) : trao i thng tin gia

bn ngoi v bn trong my tnh Lin kt h thng (Interconnection): kt ni v vn chuyn

thng tin gia cc thnh phn vi nhau

2.1 Cc thnh phn c bn ca my tnh


1.B x l trung tm (CPU: Central Processing Unit)

Chc nng: iu khin ton b hot ng ca my tnh.X l d liu (vd: cc php ton s hc v logic)

Nguyn tc hot ng: CPU hot ng theo chng trnh nm trong b nh chnh.Cu trc c bn CPU n v iu khin (CU:Control Unit): iu khin hot ng ca my tnh theo chng trnh nh sn.n v s hc v logic (ALU: Arithmetic And Logic Unit): thc hin cc php ton s hc v logic trn cc d liu c th.Tp thanh ghi (RF: Register File): Lu tr cc thng tin tm thi phc v cho hot ng ca CPU.n v ni ghp BUS(BIU: Bus Interface Unit): kt ni v trao i thng tin gia Bus bn trong v Bus bn ngoi CPU.


B vi x l hot ng theo xung nhp(clock) c tn s xc nh.

Tc vi x l c nh gi gin tip thng qua tn s xung nhp.

Gi To : chu k xung nhp, fo =1/To tn s xung nhp. Mi thao tc ca b x l cn kTo. To cng nh th b

x l chy cng nhanhV d: Mt my tnh Pentium 4 tc 2GHz

Ta c fo=2GHz=2.109HzTo= 1/fo=1/2.109= 0.5ns

1.B x l trung tm (CPU: Central Processing Unit)


2. B nh my tnh

Chc nng: Lu tr chng trnh v d liu.Cc thao tc c bn: Thao tc c d liu (Read)Thao tc ghi d liu (Write)

Cc thnh phn chnhB nh trong (Internal Memory)B nh ngoi (External Memory)


B nh trong(Internal Memory)

Chc nng v c im: Cha thng tin m CPU c th trao i trc tipTc rt nhanhDung lng khng lnS dng b nh bn dn RAM, ROM

Cc loi b nhB nh chnh (Main memory)B nh Cache (Cache Memory) hay gi b nh

m


B nh chnh (main memory)

Cha chng trnh v d liu ang c s dng bi CPU

B nh chnh c t chc thnh cc ngn nh v c nh a ch

Ngn nh thng c t chc theo byte Ni dung ca mt ngn nh c th thay i nhng a

ch vt l ca n c nh l khng thay i


B nh m nhanh(cache memory)

y l b nh bn dn c tc nhanh v chng c t m gia CPU v b nh chnh nhm tng tc truy xut ca CPU ti b nh chnh.

Dung lng nh hn rt nhiu b nh chnhTc nhanh hn rt nhiu lnNgay nay Cache c tch hp vo trong b vi x l

v n trong sut vi ngi s dng.B nh Cache thng thng c chia ra thnh 2 mc.Cache c th c hoc khng


Chi tit cu trc b nh Cache

2. B nh my tnh


B nh ngoi(External memory)

Chc nng v c im Lu tr ti nguyn phn mm My tnh. c kt ni vi h thng nh thit b vo ra. Dung lng rt ln (vi trm GB) Tc chmCc loi b nh ngoi B nh t: a cng, a mm, B nh quang: CD, VCD, DVD, B nh bn dn: flash Disk, memory Card, pen

Disk,


H thng vo ra (Input/Output System)

Chc nng: trao i thng tin gia my tnh vi th gii bn ngoi.

Thao tc c bn Vo d liu (In) Ra d liu (Out)

Cc thnh phn chnh Thit b ngoi vi (Peripheral Devices) Cc Module I/O (IO Module)


Cu trc vo ra c bn

Port I/OPort I/O

Port I/OPort I/O

Port I/OPort I/O

Tb ngoi vi 1Tb ngoi vi 1

Tb ngoi vi 2Tb ngoi vi 2

Tb ngoi vi nTb ngoi vi n

Mo_

Mo_

dule

du

le

I/OI/O

Bus my tnhBus my tnh

H thng vo ra (Input/Output System)


Thit b ngoi vi (Peripherals)

Cc thit b ngoi vi (Peripherals)- Chc nng: chuyn i thng tin t bn ngoi thnh d liu my tnh v ngc li.- Cc thit b ngoi vi c bn: Thit b vo: bn phm, chut, Thit b ra: my in, mn hnh, Thit b nh: a t, quang,. Thit b truyn thng: Modem,


Module vo ra

Chc nng: ni ghp thit b ngoi vi vi my tnh Mi Module c 1 hay nhiu cng vo ra Mi cng c nh a ch xc nh

Cc thit b ngoi vi c kt ni vi my tnh thng qua cng vo ra (v d: COM, LPT, USB, VGA,)


2.2 Hot ng ca my tnh 1. Thc hin chng trnh

L hot ng c bn ca My tnh. My tnh lp i lp li qu trnh thc hin lnh gm hai bc c bn:

Nhn lnh (Fetch)

Thc hin lnh (Execute)

Thc hin chng trnh dng khi:

Mt ngun

Gp lnh dng

Gp tnh hung khng gii quyt c(li)


Chu k thc hin lnh

BeginBegin

EndEnd

Nhn lnhNhn lnh

Thc thi lnhThc thi lnh


1. Thc hin chng trnh

Nhn lnh (Fetch) Bt u mi chu k lnh l CPU tin hnh ly lnh t

b nh chnh. Trong qu trnh ly v thc hin lnh c 2 thanh ghi CPU m ta quan tm PC (Program Counter)v thanh ghi IR(Instruction Register)

B m chng trnh thanh ghi PC gi a ch ca lnh s c nhn.

CPU ly lnh t ngn nh c tr bi PC a vo thanh ghi lnh IR lu gi

Sau mi lnh c nhn th ni dung ca thanh ghi PC t ng tng tr ti lnh k tip s c thc hin.


Thc hin (Execute) B x l gii m lnh c nhn v pht tn hiu

iu khin thc hin thao tc m lnh yu cu. Thc hin trao i gia CPU v b nh chnh Thc hin trao i gia CPU v Module I/O. X l d liu thc hin cc php ton s hc v logic. iu khin r nhnh. Kt hp cc thao tc trn.

1. Thc hin chng trnh


V d: Thc hin chng trnh

0001: loader

0010: store

0101: add


2. Ngt (Interrupt)

Khi nim chung v ngt: Ngt l c ch cho php CPU tm dng chng trnh ang thc hin chuyn sang thc hin mt chng trnh khc, gi l chng trnh con phc v ngt.Cc loi ngt Ngt do li thc hin chng trnh: chia cho 0 Ngt do li phn cng: li RAM Ngt do module I/O pht ra tn hiu ngt n CPU

yu cu trao i d liuHot ng ca ngt


Sau khi hon thnh mt lnh, b x l kim tra tn hiu ngt. Nu khng c ngt th b x l tip tc nhn lnh tip theo. Nu c tn hiu ngt:Tm dng chng trnh ang thc hin. Ct ng cnh (thng tin c lin quan n chng trnh ang thc hin).Thit lp b m chng trnh PC tr n chng trnh con phc v ngtThc hin chng trnh con phc v ngt.Cui chng trnh con phc v ngt. Khi phc li ng cnh v tip tc chng trnh ang b tm dng.

2. Ngt (Interrupt)


Chu k lnh vi ngt

2. Ngt (Interrupt)

Bt uBt u

DngDng

Nhn lnhNhn lnh

Thc hinThc hin

Ngt?Ngt? Chng trnh Chng trnh con phc v ngtcon phc v ngtN Y


X l tn hiu ngt Cm ngt: B x l b qua cc ngt tip theo trong khi

ang x l ngt. Cc ngt vn ang i v c kim tra sau khi ngt

u tin c thc hin xong Cc ngt c thc hin tun t nu cng th t u

tin. Cc ngt trong my tnh my tnh c nh ngha

mc u tin khc nhau. Ngt c mc u tin thp c th b ngt bi ngt c u

tin cao hn. V vy c th xy ra tnh trng ngt lng nhau

2. Ngt (Interrupt)


L hot ng trao i d liu gia thit b ngoi vi vi bn trong my tnh

Cc kiu hot ng I/O: CPU trao i d liu vi module vo ra. Module vo ra trao i d liu trc tip vi b nh chnh

3. Hot ng vo ra


2.3 Lin kt h thng

1. Thng tin cc thnh phn trong my tnh Kt ni Module nh bao gm

a ch: nhn a ch xc nh ngn nhD liu: truyn nhn d liu v lnh t b nhTn hiu iu khin: Bao gm tn hiu iu khin c

v tn hiu iu khin ghi

Module Module nhnh

D LIUD LIU

A CHA CH

D liu hoc lnh

T/h k cT/h k ghi


Kt ni Module I/O

a ch: nhn a ch xc nh cng vo ra D liu: nhn d liu t thit b ngoi vi, CPU hay b nh chnh,

a ra d liu ti thit b ngoi vi, CPU hay b nh chnh. Nhn cc tn hiu iu khin t CPU Pht tn hiu iu khin n TBNV Pht tn hiu yu cu ca TBNV ti CPU

Module Module I/OI/O

D LIU MT&TBNVD LIU MT&TBNV

A CHA CH

T/h k c

T/h k ghi

D LIU MT&TBNVD LIU MT&TBNV

A CHA CH

T/h k TBNV

T/h yu cu ngt

2.3 Lin kt h thng


Kt ni CPU

CPU pht a ch n b nh hay Module vo ra.c lnh v d liua d liu ra sau khi x l Pht tn hiu iu khin n Module nh hay Module

vo raNhn cc tn hiu ngt.

2.3 Lin kt h thng

CPUCPUD LIUD LIU

LNHLNH

T/h y/c ngt

D LIUD LIU

A CHA CH

T/h khin


Khi nim BUS: Bus l tp hp cc ng dy dng vn chuyn thng tin t thnh phn ny ti thnh phn khc bn trong my tnh.

rng ca BUS : l s ng dy c kh nng vn chuyn cc bit thng tin ng thi.

Phn loi BUS: theo chc nng ta chia bus ra lm 3 loi: BUS a ch, BUS d liu v BUS iu khin

2. Cu trc BUS


BUS a ch : Chc nng: dng vn chuyn a ch t CPU n cc Module nh hay cc Module vo ra, nhm xc nh ngn nh hay cng vo ra no cn truy xut trao i thng tin. (y l BUS mt chiu). rng ca BUS a ch (A0,A1,, An-1) Cho bit kh nng qun l cc i s cc ngn nh. Nu s dng rng bus a ch n ng th dung lng cc i ca b nh c th qun l l 2n ngn nh hay tng ng vi 2n byte nh (nu mi ngn nh 1 byte)

2.3 Lin kt h thng


V d: Bus a ch ca mt s b VXL l 8088/8086 n=20 220(1MB) 80286 n=24 224(16MB) 80386Pentium n=32 232(4GB) Pentium II, III,IV n=36 236(64GB)

2.3 Lin kt h thng


BUS d liu: Chc nng: vn chuyn lnh t b nh -> CPU, vn chuyn d liu gia CPU, b nh v cng vo ra. rng ca Bus d liu (D0,D1,.Dm-1) Cho bit s byte c kh nng trao i ng thi m=8,16,32,64,128 bit.V d: 8088 -> m=88086 -> m=1680386 -> m=32Pentium -> m=64

2.3 Lin kt h thng


BUS iu khin: Tp hp cc tn hiu iu khin gm c

Cc tn hiu pht ra t CPU iu khin Module nh v Module vo ra.

Cc tn hiu t Module nh, Module vo ra gi n CPU yu cu.

Ngoi ra cn l BUS cung cp ngun tn hiu xung nhp (clock) vi cc BUS ng b.

Mt s tn hiu in hnh

2.3 Lin kt h thng


Tn hiu (MemR) iu khin c d liu t b nh t ngn nh xc nh. (IOR) Tn hiu c d liu t mt cng vo ra.

Tn hiu (MemW) iu khin ghi d liu c sn trn BUS d liu n mt ngn nh xc nh. Tn hiu iu khin (IOW) ghi d liu c sn ra cng.

Interrupt Request(INTR) tn hiu yu cu ngt t cc thit b ngoi vi

Interrupt Acknowlegde(INTA) tn hiu chp nhn ngt pht ra t CPU

Ngoi ra cn c cc tn hiu khc nh: t/h yu cu v chp nhn CPU chuyn nhng BUS (BRQ,BGT),

2.3 Lin kt h thng


c im ca cu trc n BUS. C nhiu thnh phn ni vo mt BUS chung. Ti mt thi im ch phc v c mt yu cu trao

i d liu. Cc thnh phn ni vo BUS c th c tc khc

nhau. Cc module nh v module vo ra ph thuc vo cu

trc ca CPU.Khc phc: Xy dng cu trc a BUS bao gm cc h thng BUS khc nhau v tc . Trong hu ht cc my PC bus c phn 3 cp v cc bus ni vi nhau thng qua cu ni BUS

2.3 Lin kt h thng


2.3 Lin kt h thng

B VXLB VXL

Cu ni Cu ni BUSBUS

Cu ni Cu ni BUSBUS

BUS b VXL

BUS b nh chnh

BUS vo/ra tc chm


Cu trc Pentium II in hnhIntel Intel PemtiumPemtium

NorthNorthBrigdeBrigde

South South BridgeBridge

SuperSuperI/OI/O

Cache Cache L2L2

ROMROM

Cache L1

BUS 66MHz ca VXL

BUS ISA

BUS PCI

LPTCOM1COM2

a mm

Bn phm Chut

IDE1IDE2

Khe cm PCI

Khe cm ISA

USB1 USB2

CMOS & RTC

66MHz 66MHz SIMM EDO (16)DIMM SDRAM (66)


Cu trc Pentium 4

Intel Pemtium 4Intel Pemtium 4ProcessorProcessor

MCHMCH

ICH2ICH2

Flash BIOS

ATA 100MB/sATA 100MB/s2 IDE2 IDE

LAN InterfaceLAN Interface 4 USB Ports

6 Channel Audio

PCI

RDRAM

RDRAM

RDRAM

RDRAM

AGP 4XAGP 4X

Inter Hub Architecture

133MB/s

Dual chanel4.0 GB/s

>1GB/s

4.2 or 3.2 GB/s


V d: Cu hnh mt my tnh

Intel MotherBoard D915PBLL, Socket T ATX 800FSB, DDR2 533, PCI-E 16x, SATA, 8ch Audio & LAN

3.2GHz Pentium IV processor. 512 MB DDRAM. 80 GB hard disk. keyboard and a mouse, foppy disk drive, 24x speed DVD drive, 19" monitor with 1280 x 1024 pixels resolution, 56 Kbit Modem, 100 Mbit Ethernet card.


Phn trao i v gii p


Tm tt chng 2

c im kin trc Von Neumann. Cu trc v chc nng c bn ca h thng my tnh. Quy trnh thc hin chng trnh trong my tnh. Ngt l g? Ti sao phi s dng ngt trong h thng

my tnh. BUS my tnh? Phn loi v chc nng BUS my tnh. Cu trc a bus trong my tnh. Nhn din c tt c cc thnh phn phn cng trong

my tnh ca bn.


Chng 3

Biu din d liu v s hc my tnh

3.1 Cc h m c bn

3.2 M ho v lu tr trong my tnh

3.3 Biu din s nguyn

3.4 S hc nh phn

3.5 Biu din s du chm ng

3.6 Biu din k t


3.1 Cc h m c bn

H thp phn (Decimal System): con ngi s dng

H nh phn (Binary System): my tnh s dng

H thp lc phn (Hexadecimal System): dng biu din rt ngn s hc nh phn

Cch chuyn i gia cc h m.


H thp phn (decimal)

B k t c s gm 10 s: 09Dng tng qut: an-1an-2an-3a1a0,a-1 a-2a-m

45

123

=123,45

=

=

1

10*n

mi

iiaA

V d: 123,45

Phn nguyn : 123 : 10 = 12 d 3

12 : 10 = 1 d 2

1 : 10 = 0 d 1

Phn phn : 0,45*10 = 4,5

0,5 *10 = 5

Trong (ai = 09).


H nh phn(Binary)B k t c s gm 2 s: 0,1Dng tng qut: an-1an-2an-3a1a0,a-1 a-2a-m

V d: 11011,0112 = 24+23+21+20+2-2+2-3 =27,375 Thp lc phn (hexadecimal)B k t c s: 09,AFDng tng qut: an-1an-2an-3a1a0,a-1 a-2a-m

V d: 89ABH = 1000 1001 1010 1011B.

)1,0(2*1

== =

i

n

mi

ii aaA

)..,9..0(16*1

FAaaA in

mi

ii ==

=

H nh phn (Binary)H thp lc phn (Hexadecimal)


3.2 M ho v lu tr trong my tnh

Nguyn tc chung v m ho d liuMi d liu c a vo my tnh c m ho thnh s nh phn.Cc loi d liu: D liu nhn to: do con ngi quy c D liu t nhin: tn ti khch quan vi con ngi M ho d liu nhn to D liu s nguyn: m ho theo mt s chun qui c D liu s thc: m ho bng s du chm ng D liu phi s (k t): m ho theo cc b m k t hin hnh nh : ASCII, Unicode,


M hnh m ho v ti to tn hiu vt l

B cm B cm bin tn bin tn

hiu hiu (Sensor)(Sensor)

B ti to B ti to tn hiutn hiu

B chuyn B chuyn i s=> i s=> tng ttng t

(ADC(ADC

B chuyn B chuyn i tng t i tng t

=> s=> s(ADC)(ADC)

My tnhMy tnh

T/h vl

T/h vl

Cc d liu vt l thng dng

m thanh

Hnh nh


Th t lu tr cc byte d liu MT

B nh chnh t chc lu tr d liu theo n v byte di t d liu c th chim t 1 n 4 byte. V vy

cn phi bit th t chng lu tr trong b nh chnh i cc d liu nhiu byte.

C hai cch lu tr c a raLittle Endian (u nh): Byte c ngha thp hn

c lu tr trong b nh v tr c a ch nh hn.Big Endian (u to): Byte c ngha thp hn c

lu tr trong b nh v tr c a ch ln hn.


V d: lu tr mt t 32bit 0001 1010 0010 1011 0011 1100 0100 1101B 1 A 2 B 3 C 4 D HBiu din trong ngn nh theo 2 cch

300 4D 300 1A301 3C 301 2B302 2B 302 3C303 1A 303 4D

Little Endian Big Endian



Lu tr ca cc b vi x l in hnh Loi my Intel: 80x86, Petium -> little endian Motorola 680x0 v cc b x l RISC -> big endian Power PC & Itanium: tch hp c hai cch trn



3.3. Biu din s nguyn

My tnh biu din s nguyn chia thnh 2 loi Biu din s nguyn khng du (unsign integer) Biu din s nguyn c du (sign integer) S nguyn khng du: Gi s dng n bit biu din s nguyn khng du-> di m n bit biu din c t 0 -> 2n-1. Gi tr ca s nguyn c tnh:

Di min tr ca s nguyn khng du c biu bng hnh trn Gi tr nh nht bng 0 Gi tr ln nht bng 2n-1

=

1

0

2*n

i

iia


V d: n=8 028-1 (255)n=16 0 216-1 (65535).n=32 0232-1

V d: S nguyn khng du


S nguyn c du

S b mt v s b haiN: Cho mt s nh phn N c biu din bi n bit. Ta c S b mt ca N bng (2n-1)-N S b hai ca N bng 2n-N

V d: Cho s N = 0001 00012 c biu din bi n=8bit. Xc nh s b 1 v b 2 ca N.Ap dng cng thc 1111 1111 (2n-1)

0001 0001 Ns b mt ca N 1110 1110


S nguyn c du

Nhn xt: s b mt ca mt s N c xc nh bng cch o cc bit trong N

Ap dng cng thc 1 0000 0000 (2n) 0001 0001 N

s b hai ca N 1110 1111 Nhn xt: s b hai ca mt s N c xc nh

bng cch ly s b mt ca N cng thm 1 S b 2 ca N =(s b 1 ca N)+1


S nguyn c du

Gi s dng n bit biu din s nguyn c du-> di m n bit biu din c t (- 2n-1 ..-1,0 .. 2n-1-1). Gi tr ca s nguyn c tnh theo 2 phn ring bit: Phn gi tr dng (0 -> 2n-1-1). Phn gi tr m (- 2n-1-1). Di min tr ca s nguyn c du c biu bng hnh trnGi tr nh nht bng - 2n-1

Gi tr ln nht bng +2n-1-1


S nguyn c du

Trong : Bt c trng s cao nht (hay bit ngoi cng bn tri ca dy nh c my tnh s dng biu din du ca gi tr) nu:

= 0 : th s nh phn cn tnh gi tr l s dng.Dng tng qut l: 0an-2an-3a0

= 1 : th s nh phn cn tnh gi tr l s m. Dng tng qut l: 1an-2an-3a0


V d 1

V d 1: Cho s nguyn c du biu din n=8bit sau:A=B5H v B=6AH

Hy xc nh gi tr ca hai s nguyn c du A v B di dng h s ngi s dng

Bi gii Biu din s nguyn A di dng nh phn

A=B5H = 1011 01012 =>A= -128 + 53 = - 75

Biu din s nguyn B di dng nh phn B=6AH = 0110 10102

=> B = 64+32+8+2 = 106


V d 2

V d 2: Biu din s nguyn c du sau y A=+97 v B=-101 theo hai dng kiu n=8bit v n=16bit trong my tnh.

Li gii Biu din s A dng s nguyn c du trong my tnh

A = 0110 00012 (n=8bit) Biu din s B dng s nguyn c du trong my tnh

Biu din s +101 = 0110 01012Ly b 2 1001 10112

=> B = - 101 = 1001 10112


Biu din s A dng s nguyn c du trong my tnh A = 0000 0000 0110 00012 (n=16bit)

Biu din s B dng s nguyn c du trong my tnhBiu din s +101 =0000 0000 0110 01012Ly b 2 1111 1111 1001 10112

=> B =-101 = 1111 1111 1001 10112

V d 2



Cho hai gi tr:Khi lng mt tri: 199000000000000000000000000000000000gKhi lng in t: 0.00000000000000000000000000000910956g lu tr con s ny th my tnh cn n s bit rt ln. Nh vy, trong trng hp ny th loi s c du chm tnh s rt bt tin. V vy tt c my tnh lu tr nhng s trn di dng du chm ng (floating point) 1.990 x 1033 v 0.910956x 10-27 hay theo s khoa hc l : 1.999E+33 v 0.910956E-27.


Dng tng qut M.RE Trong : M (Matissa) phn nh tr

R (Radix) c sE(Exponent) s m

X=(-1)s 1.M 2E-B Trong : s: l bit du (s=0 phn nh tr l dng; s=1 phn nh tr l m)

M : l phn nh tr.E: l s m c dch chuyn i B n v.R c bit (R=2) my tnh lu s du

chm ng bao gm hai thnh phn chnh



Chun IEEE 754-1985 phn nh 3 dng s du chm ng c bn

(IEEE: Institute of Electrical and Electronics Engineers )S c chnh xc n di 32 bit (single)S c chnh xc kp di 64 bit (double)S c chnh xc m rng di 128bit (quadruple)



Loi Single Double Quadruple

B rng ca trng (bit)SEMTng cngE cc iE cc tiu dch

1823322550127

1115264204701023

11511112832767016383



S E M

Biu din s du chm ng chun IEEE 32bit

e

S=1 phn nh tr l m

S=0 phn nh tr l dng

E: gi tr E nm trong 8 bit, l s m c dch chuyn i 127

M: phn nh tr, gi tr nm trong 23 bit

Ta c s 2345,125 trong h thp phn. Hy biu din chng di dng chun IEEE 32bit trong my tnh


B1: Chuyn i s trn ra h hai-2345,125d = -1001 0010 1001.001b (dy s nh phn c biu din bnh thng)

B2: Chun ho theo IEEE 32bit-1.001 0010 1001 001 x 211

B3: Xc nh cc thng s biu din s,M,ES: phn nh tr l s m, nn s l 1E : phn m c xc nh e = E-127 => E = 11+127=138=10001010M: phn nh tr c xc nh l 001 0010 1001 0010 0000 0000 (s 32 bit)



thc mt php cng hoc tr hai s du chm ng phi tin hnh theo cc bc sau:

Tng s m ca s c s m nh hn cho bng s c s m ln hn.

Cng (hoc tr) cc phn nh tr.Nu cn thit chun ho kt qu tr li.


X1 -> M1 v E1 biu din X1 =M1*RE1

X2 -> M2 v E2 biu din X2 =M2*RE2

X1*X2 = (M1*M2)*RE1+E2

X1/ X2 = (M1 / M2)*RE1-E2

X1X1=(M1*R(E1-E2) M2)*RE2 (vi gi thit E1>E2)


Mt s quy cNu e =255 v M0 -> khng phi l sNu e =255 v M=0 -> Gi tr m hoc dng v cngNu e =0 v M=0 -> gi tr bng 0Di biu din: 2-127 n 2+127 hay tng ng 10-38 n 10+38

Overflow Underflow Overflow

-2+127 2+127 2-127 -2-127



3.5 Biu din k t.

C hai b m thng s dng trn my tnh: B m ASCII B m Unicode

B m ASCII (American Standard Code for Information Interchange)

Do ANSI (American National Standard Institute) thit k

B m 8 bit -> m ho 28 k t c m 00H ->FFH . Trong


128 k t chun c nh c m (00H -> 7FH)33 k t iu khin khng th hin th nn mn hnh.

Bao gm cc k t iu khin nh dng vn bn, iu khin truyn s liu v iu khin phn cch thng tin. Cn li cc k t cn li hin th c l bao gm:

26 k t hoa 41h -> 5Ah26 k t thng 61h ->7Ah10 k t s 30h ->39h

cc du s hc v k t c bit.

3.5 Biu din k t.


128 k t cn li l k t m rng c th thay i tu nh ch to my tnh hay ngi pht trin phn mn s dng vo nhng vic ring. C m 80H -> FFH B m hp nht Unicode: Do cc hng my tnh hng u th gii kt hp thit k.B m 16 bit c th xy dng b m ton cu 216 k t vi 128 k t u c m trng m trong bng m ASCII.C h tr cc k t Ting Vit

3.5 Biu din k t.


Phn trao i v gii p


n tp chng 3

Cc h m, ngha ca chng trong my tnh.M ha d liu trong my tnh.M ha s nguyn(m ha s nguyn c v khng

du). M ha s thc (s du chm ng)M ha k t (ASCII, Unicode)Lu tr d liu trong my tnh


t cu hi

Cu 1: Kt qu hin thi ln mn hnh l bao nhiu? Khi thc hin on lnh sau:Var a: shortint;Begin

a:=-1;writeln(Gia tri a:=,a);writeln(Gia tri ngan nho:=, mem[seg(a):ofs(a)]);

End.


t cu hi


a:=-128;writeln(Gia tri a:=,a);writeln(Gia tri ngan nho:=, mem[seg(a):ofs(a)]);

End.


t cu hi


a:=$6A;writeln(Gia tri a:=,a);writeln(Gia tri ngan nho:=, mem[seg(a):ofs(a)]);

End.


t cu hi

Cu 4: Kt qu hin thi ln mn hnh l bao nhiu? Khi thc hin on lnh sau:

Var b : integer absolute 3715:100;a : shortint absolute 3715:100;

Beginb:=$00B5;writeln(Gia tri a:=,a);writeln(Gia tri ngan nho:=, mem[seg(a):ofs(a)]);

End.


t cu hi

Cu 5: Kt qu hin thi ln mn hnh l bao nhiu? Khi thc hin on lnh sau:

Var b : integer absolute 3715:100;a: shortint absolute 3715:100;

Beginb:=-75;writeln(Gia tri a:=,a);writeln(Gia tri ngan nho:=, mem[seg(a):ofs(a)]);writeln(Gia tri ngan nho:=, mem[seg(a):ofs(a)+1]);writeln(Gia tri ngan nho:=, memw[seg(a):ofs(a)]);

End.


Chng 4

B x l trung tm

4.1 Cu trc ca CPU

4.2 Tp lnh (Instruction File)

4.3 Hot ng ca CPU

4.4 Kin trc Intel


4.1 Cu trc ca CPU

Nhim v CPU: thc hin lnh ca chng trnh. Nhn lnh (Fetch Instruction): CPU nhn lnh t b

nh Gii m lnh(Decode Instruction): Xc nh thao tc

m lnh yu cu Nhn d liu(Fetch Data): Nhn d liu t b nh hay

cng vo ra X l d liu(Process Data): thc hin cc php ton

s hc v logic i vi d liu Ghi d liu (Write Data): Ghi d liu ra b nh hay

cng vo ra.


a. Cu trc CPU

CPURegisterRegister

Control Control UnitUnit

ALUALU

Control Data Address Bus Bus Bus

System bus


b. n v s hc v logic (ALU)

Chc nng: thc cc php ton s hc v logicS hc: cng, tr, nhn, chia, tng, gim, o,..Logic: AND, OR,XOR, NOT, dch bit,

M hnh kt ni ca ALU

ALUALU

Thanh ghi cThanh ghi c

Dliu vo t thanh ghi

T.h iu khinKt qu


c. n v iu khin

Chc nng: Nhn lnh t b nh a vo thanh ghi lnh IP.Tng ni dung thanh ghi PC mi khi nhn lnh songGii m lnh v xc nh thao tc m lnh yu cu Pht ra tn hiu iu khin thc thi lnh.Nhn cc tn hiu yu cu t BUS h thng v gii

quyt p ng yu cu .


c. n v iu khin

M hnh kt ni n v iu khin

Thanh ghi lnhThanh ghi lnh

Control Control UnitUnit

BUS IU KHIN

T. h iu khin bn trong CPU

Cc c

Clock

T.h yu cu t BUS h thng

T.h iu khin n BUS h thng


c. n v iu khin

Cc thng tin kt ni n CU Clock: tn hiu xung nhp t mch to dao ng.M lnh t thanh ghi lnh a n CU gii mCc trng thi c a n cho bit trng thi ca

CPU cng nh trng thi thc hin cc php ton trong ALU.

Cc tn hiu iu khin t BUS iu khin.Cc tn hiu iu khin bn trong CPU: iu khin

thanh ghi, ALU.Cc tn hiu iu khin bn ngoi CPU l B nh

hay cng vo ra


4.2 Tp thanh ghi

Chc nng Thc cht l vng nh c CPU nhn bit qua tn

thanh ghi v c tc truy xut cc nhanh.Cha thng tin tm thi phc v cho hot ng thi

im hin ti ca CPU S lng thanh ghi tu thuc vo b vi x l c th ->

tng hiu nng CPUThanh ghi chia 2 loi: Loi lp trnh c v loi

khng lp trnh c


4.2 Tp thanh ghi

Phn loi thanh ghi theo chc nng Thanh ghi a ch: Thanh ghi c s dng qun l

a ch ca ngn nh hay cng vo ra.Thanh ghi d liu: Thanh ghi dng lu tr d liu

tm thiThanh ghi a nng: Thanh ghi c th cha d liu hoc

a ch u c.Thanh ghi iu khin/trng thi: Thanh ghi cha thng

tin v trng thi CPU.Thanh ghi lnh: thanh ghi cha lnh ang c thc

hin


4.2 Tp thanh ghi

Mt s thanh ghi in hnh B m chng trnh PC Ngn xp SS (Stack) Con tr ngn xp SP

SP (196)

y Stack

194195196197198199200

Thm vo Ly ra

Ngn nh CS

Ngn nh Truy cp

300301

302

303

304305

306

Thanh ghi c s

Thanh ghi ch s


4.2 Tp thanh ghi

Cc thanh ghi d liuCha cc d liu tm thi v kt qu trung gian.Cc thanh ghi s nguyn 8,16,32,64 bit.Cc thanh ghi s du chm ng. Thanh ghi trng thi (State Register)

&Thanh ghi c (FR: Flag Register).Cha cc thng tin trng thi ca CPU.Cc c php ton bo hiu trng thi kt qu.Cc c iu khin bo hiu trng thi ca CPUV d: c ZF, CF, SF, OF, IF (c ngt =1 cho ngt =0

cm ngt


4.3 Tp lnh

Gii thiu chung v tp lnh Mi b x l c tp lnh xc nh. Mt tp lnh thng n vi chc n vi nghn lnh Mi lnh l chui nh phn m b x l c th phn

tch v hiu thc hin thao tc m lnh yu cu. Cc lnh khi vit thng c nh x ra thnh cc k

hiu gi nh. ADD, MOV, IN, OUT, SHL, ROL, y ta ca cu lnh ca hp ng

(Lp ASSEMBLY)


4.3 Tp lnh

Cc thnh phn mt lnh my 2 phn:

M thao tc (Operation Code: Opcode): M ch ra thao tc m b vi x l cn phi thc hin.

a ch ton hng (Operand Address): Ch ra ni cha cc ton hng m m thao tc s tc ng. o Ton hng ngun: d liu vo ca thao tco Ton hng ch: d liu ra ca thao tc

a ch ton hnga ch ton hngM thao tcM thao tc


4.3 Tp lnh

Cc kiu thao tc Thao tc chuyn d liu Thao tc x l s hc v logic Thao tc vo ra d liu qua cng Thao tc iu khin r nhnh Thao tc iu khin h thng Thao tc x l s du chm ng Thao tc chuyn dng khc: x l nh, m thanh, ting

ni,


4.3 Tp lnh

Cc lnh chuyn d liu Lnh Mov

Sao chp d liu t ton hng ngun -> ch Lnh Load

Np d liu t b nh -> b x l Lnh XCHG

Trao i ni dung ca hai ton hng cho nhau Lnh PUSP

Ct ni dung ca mt ton hng ngun vo stack Lnh POP

Ly ni dung nh Stack ra ton hng ch Lnh Set, Clear


4.3 Tp lnh

Cc lnh s hc Lnh ADD : cng Lnh SUB : tr Lnh MUL: nhn Chia DIV : chia

Cc lnh logic Lnh Test

Thc hin lnh AND thit lp c Lnh Shift

Dch tri, hoc phi Lnh Rotate

Quay tri hoc quay phi Lnh Convert

Chuyn i d liu t dng ny sang dng khc

Lnh AND, OR, XOR, NOT,.


4.3 Tp lnh

Cc lnh vo ra Lnh Input: Lnh Output Cc lnh chuyn iu

khin Lnh Jump Lnh Call Lnh Return : tr v t

chng trnh con

Cc lnh iu khin h thng Lnh Halt : dng thc hin

chng trnh Lnh Wait : tm dng thc hin

chng trnh, lp kim tra cho n khi tho mn th tip tc thc hin

No Operation: khng thc hin g c

Lnh Lock : Cm khng cho chuyn nhng BUS

Lnh Unlock: cho php chuyn nhng BUS


Cc phng php nh a ch (Addressing Models)

Ton hng ca ca lnh c th l: Mt thanh ghi c th Ni dung ca thanh ghi Ni dung ca ngn nh hay cng vo ra Cc phng php nh a ch thng dng: nh a ch tc thi nh a ch thanh ghi nh a ch trc tip nh a ch gin tip qua thanh ghi nh a ch gin tip nh a ch dch chuyn


nh a ch tc th

Ton hng l hng s nm ngay trong trng a ch ton hng

y ch c th l ton hng ngun Khng tham chiu b nh Truy cp ton hng rt nhanh Di gi tr ton hng b hn ch

ADD R1, const

constADDADD


nh a ch thanh ghi

Ton hng c cha trong mt thanh ghi, thanh ghi c tn trong trng a ch ton hng.

Tp thanh ghi

Ton hng

Thanh ghiOPCODEOPCODE


nh a ch trc tip

Ton hng l ngn nh c a ch c ch ra ngay trong trng a ch ton hng

B nh

Ton hng

a chOPCODEOPCODE


nh a ch gin tip qua thanh ghi

Ton hng l ngn ngn nh c a ch c ch ra trong thanh ghi. Trng a ch ton hng lu tr tn thanh ghi .

Thanh ghi c th l ngm nh

Thanh ghi ny c gi l thanh ghi con tr

B nh

Ton hng

Thanh ghi

a ch

Thanh ghiOPCODEOPCODE


nh a ch gin tip qua ngn nh

B nh

a ch

Ton hng

a chOPCODEOPCODE


nh a ch dch chuyn

xc nh ton hng gm 2 thnh phn Tn thanh ghi v hng s a ch ton hng = Ni dung thanh ghi + hng s

+

B nh

Ton hngTp thanh ghi

constADDADD


4.4 Hot ng ca CPU

Chu k lnh CPU bao gm: Nhn lnh, gii m lnh, nhn ton hng, thc hin lnh, ct ton hng, ngt.

Gin trng thi chu k lnh

Nhn lnh

Tnh a ch lnh

Tnh a ch ton

hng

Gii m thao tc

Thao tc dl

KT ngt v ngt

Ct ton hng

Nhn ton hng

Tnh a ch ton

hng

Lnh tip theo D liu mng hay chui


Phn trao i v gii p


Cu hi n tp

Cu trc v chc nng ca CPU Kin trc tp lnh Cc phng php tham chiu ton hng. Hot ng c bn CPU Kin trc BXL tin tin


Chng 5

B nh my tnh5.1 Tng quan b nh trong My tnh

5.2 B nh bn dn

5.3 B nh m nhanh (Cache)

5.4 B nh ngoi (b nh ph)

5.5 H thng nh trn my PC hin nay


5.1 Tng quan

Cc c trng ca b nhV tr: Bn trong CPU: tp thanh ghi, cache B nh trong: B nh chnh v Cache B nh ngoi: cc thit b nh, RAIDDung lng: di t nh (tnh bng bit) S lng t nhn v truyn: T nh Khi nh


5.1 Tng quan

Phng php truy nhp: Truy nhp tun t (bng t) Truy nhp trc tip (cc loi a) Truy nhp ngu nhin (b nh bn dn) Truy nhp lin kt (cache)Hiu nng: Thi gian truy nhp Chu k truy xut b nh Tc truyn


5.1 Tng quan

Kiu b nh vt l: B nh bn dn B nh t B nh quangCc c tnh vt l: Kh bin/khng kh bin Xo c/khng xo c


Phn cp b nh

Registers

Central Memory

Disks

CD/ROM

Archival Stores

Kch thc

Tc

Perip

heral

mem

ories

CPU Cache

Disk Cache


Phn cp b nh

Tp thanh ghi

B nh B nh Cache L1Cache L1

B nh B nh CacheCache

L2L2

B nh B nh chnhchnh

B nh trongB nh trong

B nhB nhmngmng

T tri qua phi: dung lng tng dn, tc gim dn, gi thnh tnh theo n v byte hoc bit gim dn.

registerregister


5.2 B nh bn dn

B nh ch c (ROM: Read Only Memory)B nh khng kh binS dng lu cc thng tin sau: Th vin cc chng trnh con. Cc chng trnh con iu khin h thng (BIOS) Cc bng chc nng.

2k t nh

(n bit t nh)

k ng a ch

n ng d liu ra


5.2 B nh bn dn

Cc kiu ROM:ROM mt n, PROM: Programmable ROM, EPROM: Erasable PROM, EEPROM Electrically EPROM, Flash Memory ( B nh cc nhanh): Ghi theo khi, xo bng in.


5.2 B nh bn dn

B nh truy cp ngu nhin (RAM : Random Access Memory) B nh c ghi (R/W memory) B nh kh bin Lu thng tin tm thi C hai loi chnh l SRAM (Static RAM) v DRAM

(Dynamic RAM)

2k t nh

(n bit t nh)

k ng a ch

ReadWrite

n ng d liu vo

n ng d liu ra


5.2 B nh bn dn

RAM tnh (SRAM: Static RAM) Cc bit c lu da trn cc Flip- Flop (4-8 FF lu 1

bit) Thng tin lu n nh Cu trc phc tm Dung lng nh(KB) Tc nhanh (6-8 ns) Dng lm cache Gi thnh cao


5.2 B nh bn dnRAM ng (DRAM: Dynamic RAM) Cc bit c lu da trn cc t in => nguyn nhn

thng xuyn lm ti. Dung lng ln. Tc chm (60-80ns). Dng lm b nh chnh Gi thnh phi chng. Cc DRAM tin tin:

SDRAM: Synchronous Dynamic RAM, DDRAM: Double Data RAM. Ram BUS RDRAM.


B nh chnhCc c trng c bn Tn ti trn mi h thng my tnh Cha chng trnh ang thc hin v cc d liu c

lin quan. Gm cc ngn nh c nh a ch trc tip bi

CPU. Dung lng b nh chnh bao gi nh hn khng

gian m CPU c th qun l. Vic qun l logic b nh ph thuc vo h iu

hnh.


T chc ca chip nh

S c bn ca chip nh

Chip nh2nx m bit

A0..An-1

D0..Dm-1

csOEWE


T chc ca chip nh

Cc tn hiu ca chip nhCc ng a ch: A0An-1 xc nh 2n ngn nh.

Cc ng d liu: D0Dm-1 di t nh (m bit)=>dung lng chip nh = 2n x m bit

Cc tn hiu iu khino Tn hiu chn chip hot ng: CS (Chip Select)o Tn hiu iu khin c hoc ghi (WE: Write

Enable; OE: Output Enable)o Thng cc tn hiu iu khin tch cc vi mc 0


Thit k Mudule nh

Thit k module nh bn dn Cho chip nh 2n x m bit Yu cu s dng chip nh trn thit k module nh

dung lng l bi kch thc chip nh trn.Gii quyt vn C hai cch: Thit k tng di t nh, s ngn nh khng

thay i. Thit k tng s lng ngn nh, di t nh

khng thay i.


Thit k Mudule nh

Thit k tng s lng t nhGi thit: Cho cc chip nh c dung lng 2n x m bit.Yu cu: Thit k module nh c kch thc:

2n x (k.m) bit Gii quyt:

thit k c yu cu ta xc nh hai thng s n (s ng a ch)v k(s chip nh cn ghp vo module thit k


Thit k Mudule nh

V d: Cho cc chip nh SDRAM dung lng 4K x 4 bit. Hy thit k module nh c kch thc 4K x 8 bit

Dung lng chip nh 212 x 4 bit Thng tin cn cho chip nh s ng a ch n =12 v

s ng d liu m=4 Thng tin v module nh s ng a ch l 12 ng

(s ngn nh khng thay i), s ng d liu l 8 ng v s chip s dng thit k 2(k=2)


Thit k Mudule nh

Chip nh212 x 4 bit

csOEWE

Chip nh212x 4 bit

csOEWE

A0A11

csWEOE

D0D3D 4D7


Thit k Mudule nh

Thit k tng s lng ngn nhGi thit: Cho cc chip nh c dung lng 2n x m bit.Yu cu: Thit k module nh c kch thc:

2k.2n x m bit Gii quyt:

thit k c ta xc nh hai thng s n+k (s ng a ch) v 2k (s chip nh cn ghp vo module thit k)


Thit k Mudule nh

V d : Cho cc chip nh SDRAM dung lng 4K x 8 bit. Hy thit k module nh c kch thc 8K x 8 bit.

Dung lng chip nh gii thit 212 x 8 bit Thng tin cn cho chip nh s ng a ch n =12 v

s ng d liu m=8 Thng tin v module nh s ng a ch l 13

ng (s ngn nh thay i) v s ng d liu l 8 ng( di t nh khng i).


Thit k Mudule nh

x1

0110

1000

Chip nh212 x 8 bit

csOEWE

Chip nh212x 8 bit

csOEWE

A0A11

cs

D0D7B gii m

1->2

0y

1yG

AA12

OEWE

G A 1y 0y


Bi lm thm

Thit k module nh 16K x 8 bit t cc chip nh 4K x 8 bit



Thit k module nh 32M x 32 bit t cc chip nh 4M x 32 bit


Pht hin v chnh li trong b nh

Pht hin v chnh li trong b nhNguyn tc chung: Trong qu trnh truyn d liu c th gp s thay i cc bit thng tin do nhiu hoc do sai hng ca thit b hay module vo ra. V vy, thc t t ra l phi lm sao pht hin c li v c th sa sai c. Mt trong phng php pht hin li (EDC: Error Dectecting Code) v sa li (ECC: Error Correcting Code) l: Gi s cn kim tra m bit th ngi ta ghp thm k bit kim tra c m ho theo cch no ri truyn t ghp m+k bit (k bit c truyn khng mang thng tin nn gi l bit d tha) Trong m l s bit cn ghi vo b nh v k bit l s bit cn to ra kim tra li trong m bit.



Khi c d liu ra c kh nng sau:Khng pht hin d liu c li. Pht hin thy d liu li v c th hiu chnh d liu

li thnh ng. Pht hin thy li nhng khng c kh nng ch ra li

v th pht ra tn hiu bo li. S pht hin li v sa li



B nh

B to m

B to m

B so snh

B hiu chnh v a

d liu ra

Dliu ra

Tbo li

m bit m bit

k bitk bit

k bit

M bit k bit



V d 1: Pht hin li vi bit chn l(Party)M EDC n gin l bit chn l c gn thm

vo cc bit d liu. Nu bit chn l =1: nu s bit 1 trong xu l lHoc s dng Nu bit chn l =0: nu s bit 1 l chnu im: n gin v s bit d tha t.Nhc im: khng nh v c li, hoc nu c s thay i c hai bit hoc 1 hoc 0 th khng pht hin c. Khc phc nhc im trn xy dng m EDC khi.


Pht hin v chnh li trong b nhV d 2: Pht hin li bng m d tha CRC (Cycle Redundary Check).Nguyn tc: Mt xu nh phn bt k c th coi l tp hp cc h s ca a thc B(x) trong x l h s. Chn a thc G(x) l a no ta quy nh trc gi a thc sinh. Ta tin hnh chia module2 a thc B(x) cho G(x) ta c thng s Q(x) v phn d R(x). a thc sinh do t chc vin thng quc t quy nh. Khi ta cn truyn xu B(x) + R(x) bit kim tra li ta cn chia gi tr nhn c cho a thc sinh nu php chia c d th c li xut hin trong xu.



V d: Xu gc: 1101011011 M(x)=x9+x8+x6+x4+x3+x+1(m=9) a thc sinh G(x) = x4+x+1 10011 (r=4) Xu gc: 11010110110000 x4M(x) Chia mod2 11010110110000 10011

1100001010 -> thng

1110 phn d php chia Xu cn truyn i: 11010110111110 T(x)



V d 3: M sa li HammingNguyn tc: Mt t m Hamming gm m bit d liu v k bit kim tra chn l. Mi bit c chn v tr thch hp pht hin chnh xc v tr c th sa li c. V d chn m=4 => k=3 (m=2n; k=n+1)Ta c th t sau:

7 6 5 4 3 2 1I4 I3 I2 C3 I1 C2 C1

Cc bt ny c m ho theo quy lut sau:C1=I1 I2 I4C2=I1 I3 I4C3=I2 I3 I4



Gi s cc bit cn truyn l: I4 I3 I2 I1 = 1101 tnh cc C3C2C1=010

Bit cn truyn 1100110 Gi s ta c b li, th d bit I2 t gi tr 0 thnh gi tr

1 m nhn c 1110110. Bn thu tnh ra bit kim tra: C3=1 1 1=1

C2=1 1 1=1C1=1 1 1=1

Nu module 2 s ny ta c 111 010 = 101 (C1,C3 thay i v v tr thay i l 101 (5))


5.3 B nh m nhanh

Nguyn tc: Cache c tc truy xut nhanh hn rt nhiu b nh

chnh Cache c t gia CPU v b nh chnh nhm tng

tc trao i thng tin gia CPU v b nh chnh. Cache thng c t trong chip vi x l


5.4 B nh m nhanh

Thao tc ca Cache CPU yu cu ly ni dung ca mt ngn nh bng

vic a ra mt a ch xc nh nh. CPU kim tra xem c ni dung cn tm trong Cache Nu c: CPU nhn d liu t b nh Cache Nu khng c: B iu khin Cache c Block nh

cha d liu CPU cn vo Cache. Tip chuyn d liu t Cache n CPU S thao tc cache, b nh chnh v CPU


5.4 B nh m nhanh

Start

Done

a ch RA t CPU

Truy cp b nh ly ra BLOCK cha a ch RA

a BLOCK vo mt Line trong Cache

Chuyn t a ch RA ti CPU

C BLOCK no trong cache cha RA

Chuyn t ng RA ti CPU

miss

hit


5.4 B nh m nhanh

Tag Line 1Line 2Line 3

Line C

CPU

B nh CacheB nh chnh

Block M

Block M-1

Block M-2

Block 4

Block 3

Block 2

Block 1


5.3 B nh m nhanh

T chc CacheGi s b nh chnh gm c 2n t nh c nh

a ch ( mi t nh c a ch duy nht rng n bit)B nh chnh chia thnh M khi, mi khi c K t nh

M=2n/KB nh Cache c C khe mi khe c K t nh.(C


5.3 B nh m nhanh

V d cho phng php nh x c th trong cache Cho dung lng Cache l 64KB (m=16)

Mi khi knh thc 4 bytes=> C=16K(214) lines mi line kch thc 4 bytes

Cho dung lng b nh chnh 16MB (n=24)Mi khi knh thc 4 bytes=> M=4M(222) khi mi khi kch thc 4 bytes


5.3 B nh m nhanh

Phng php nh x trc tip (Direct mapping) Mi block c nh x duy nht ti 1 line trong cache a ch pht ra t CPU c chia 2 phn w bits c trng s thp xc nh duy nht t cn

truy xut(WORD) s bits cn li xc nh khi nh. Trong s bits chia 2

nhm r bits LINE v s-r bits TAGC th ha v d:

Tag s-r Line or Slot r Word w

8 14 2


5.3 B nh m nhanh

Tng bit trong a ch b nh chnh n=24 bit: trong 2 bit phn word xc nh chnh xc 4 t22 bit xc nh khi( 8 bit tag (=22-14) v 14 bit slot or line)

Khng c hai block no trong Cache c cng Line v Tag.

Kim tra ni dung t tn ti Cache chnh l kim tra a ch line v Tag


5.3 B nh m nhanh


5.3 B nh m nhanh

Cache line Main Memory blocks0 0, C, 2C, 3C2s-C1 1,C+1, 2C+12s-C+1

C-1 C-1, 2C-1,3C-12s-1Nhn xt: n gin Chi ph t Nhc im l s c nh cc khi trong cc line ca Cache.

Trong trng hp chng trnh mun truy xut ti 2 Block tin tc m 2 block c phn nm trong cng line th kh nng Cache miss rt cao.


5.3 B nh m nhanh


5.3 B nh m nhanh

Phng php nh x lin kt(Associative mapping) Mt Block ca b nh chnh c th nhp bt k line

no trong Cache. a ch CPU pht ra c chia thnh 2 a ch tag v

word a ch Tag xc nh khi duy nht ca b nh nm

trong Cache. Mi gi tr Tag ca Line l khc nhau. Chi ph phng php ny i vi Cache l cao.


5.3 B nh m nhanh


5.3 B nh m nhanh

22 bit Tag lu tr Block 4 byte d liu. Vic kim tra Cache da vo cc gi tr Tag trong line

(22 bit) nhn bit Cache hit hay miss. 2 bits cui xc nh chnh xc t cn truy xut V d

a ch Tag D liu Cache lineFFFFFC FFFFFC 24682468 3FFF

Tag 22 bitWord2 bit


5.3 B nh m nhanh


5.3 B nh m nhanh

Phng php nh x lin kt tp hp(Set Associative mapping) Cc line trong Cache c chia ra thnh tp(nhm)

line Mi block ch c nh x vo bt k line no trong

tp no m thi. V d Block b ch c th np vo bt k line no trong nhm cc line th i. V d 2 lines mt nhm (two way associative mapping), S Block b nh chnh l modulo 213

000000, 00A000, 00B000, 00C000 nh x cng nhm.


5.3 B nh m nhanh


5.3 B nh m nhanh

S dng tp hp bit tp no c truy xut. So snh trng Tag xc inh Cache hit hay miss V d:

a ch Tag D liu s tp1FF 7FFC 1FF 12345678 1FFF001 7FFC 001 11223344 1FFF

Tag 9 bit Set 13 bitWord2 bit


5.3 B nh m nhanh


5.4 B nh m nhanh

Mt s Block ca b nh chnh c np vo trong cc line ca Cache Ni dung th TAG (th nh) cho bit block no ca b nh chnh hin ang c cha trong line Khi CPU truy nhp c hay ghi mt t nh ca b nh chnh, c 2 kh nng xy ra : T nh c trong Cache (cache hit). T nh ang khng c trong cache (Cache miss).Phng php ghi d liu khi cache hit Ghi xuyn qua (Write Through): ni dung sau khi x l xong c cp nhp vo c Cache v b nh chnh. Tc chm.


Cache trong cc b x l Intel

Ghi sau (Write back): D liu x l ch c ghi ra Cache, tc nhanh. Tuy nhin khi Block trong cache khng dng na th phi ghi tr c block ti b nh chnh.

Dung lng Cache c s dng cho th h my: 80486: c 3KB nh Pentium : c 2 cache L1 trn chip l Cache lnh v

cache d liu (8KB). Cache L2 lin hp Pentium 4: hai mc Cache L1 v L2 trn chip. Cache

L1 mi cache 8KB. Cache L2: mi cache 256KB, 512KB, 1GB


5.5 B nh ngoi

Cc kiu b nh ngoi a t a quang B nh Flash RAID


a cng (HDD: Hard Disk Driver)

L thnh phn quan trng lu tr h iu hnh v cc phn mm tin ch my tnh

Mt my tnh c th mt a hoc nhiu a Dung lng mi a rt ln. Nm 1993 a ln nht 200MB

n nay 80 hay 120GB Tc c ghi nhanh so cc b nh ngoi khc Gi thnh h c s dng lm b nh RAID (Redundant Array of

(Inexpensive) Independent Disks). H thng nh gm nhiu a cng kt hp vi nhau m HH coi nh mt logic duy nht.

D liu c lu tr phn tn trn tt c cc a C th to v lu tr thng tin d tha nhm mc ch cho

vic phc hi khi a no b hng. tin cy trong lu tr thng tin rt cao. c s dng l b nh cho cc h thng my ch.


a quang (CD-ROM, DVD)

CD-ROM (Compact Disk ROM) CD-R (Recordable CD) CD-RW (Rewriteable CD) Dung lng ph bin 650MB a CD CD ROM: c th c d liu t a CD CD RW : C th va c a CD v c th ghi d liu ln

a CD-R, v CD-RW. Tc c c s 150KB/s Tc bi ln : 40x, 50x, 60x, DVD(Digital Video Disk): ch dng trn u c DVD (Digital Versatile Disk): dng trn a my tnh Dung lng thng dng 4.7GB


Flash disk

Thng kt ni qua cng USB Khng phi dng a l b nh bn dn cc nhanh Dung lng pht trin nhanh Gn nh v tin li c im a Flash

1)Supports USB full-speed (12MBps) transmission2) Driverless installation in Windows ME / 2000 / XP, Mac 9.0 and above, Linux 2.4 and above3) Supports boot-up by USB-HDD or USB-ZIP mode4) LED indicator displays status


Flash disk

5) Write protection switch6) Reading and writing speed: 900k/s and 700k/s7) Password protection and data encryption prevents unauthorized

access to data8) Application software support in Windows OS security function9) Application software resize (partition) available10) Capacity: 16MB, 32MB, 64MB, 128MB, 256MB, 512MB, 1GB11) Compliance: FCC(B), CE, C-Tick


GiI THIU TNG QUAN V RAID

Xut x RAID l cm t vit tt nhm t Redundant Array of

Inexpensive (Independent) Disks

Thut ng RAID c a ra trong mt bi bo ca mt nhm cc nh nghin cu ti i hc tng hp California, Hoa K.

RAID c xut nhm xa b khong trng ln tc CPU v cc a in c tng i chm.

Hiu sut thi hnh vt tri so vi khi dng mt a n ln t tin (SLED: Single Large Expensive Disk)

.



Khi nimRAID: l cu trc a a vt l to nn mt a logic c kch thc ln, tin cy v kh nng vn hnh cao hn.

Mc chNng cao hiu sut vn hnh ca ton b h thng.

Kh nng lm vic song song cc a.

An ton d liu tn dng tnh d tha d liu nhm ci thin tin cy a.

Cung cp b nh ln


c im chng ca RAID

RAID l tp hp cc a vt l c nhn t h iu hnh nh a logic n.

D liu c phn b trn mng cc a vt l. S dng k thut Striping. (Striping l k thut phn chia d liu trn hai hay nhiu a lm tng kh nng lm vic song song h thng)

Dung lng a d tha c s dng lu tr thng tin chn l nhm m bo kh nng phc hi d liu trong trng hp c h hng v a.



Cc mc ca RAID

C 6 mc chnh ca RAID RAID 0 RAID 1 RAID 2 RAID 3 RAID 4 RAID 5


RAID LEVEL 0


RAID LEVEL 1


RAID LEVEL 2


RAID LEVEL 3


RAID LEVEL 4


RAID LEVEL 5


RAID LEVEL 0


c im chung RAID mc 0

C th coi RAID 0 khng l thnh vin ca RAID D liu c phn chia nhiu a => c kh nng

truyn d liu song song. Khng lu tr d liu d tha Ph hp h thng i hi dung lng nh ln v kh

nng vn hnh cao hn l tin cy trong h thng.


RAID LEVEL 1



L mc rt khc so cc mc cn li v cch lu tr d liu d tha.

Mi a d liu c mt a d phng a d phng cn gi mirror disk.

u im:p ng yu cu vo ra h thng Phc hi d tt nht trong cc mc ca RAIDNhc im:Kh nng cp nht d liu chmChi ph mua a caoKQ: Vn hnh tt cho h thng thng xuyn truy xut

d liu


RAID LEVEL 2



S dng cng ngh truy cp song song. Tt c a u vn hnh tham gia yu cu trao i d liu. Kch thc Strip c th byte hay word. C s dng m Hamming pht hin li v sa liu im:C kh nng pht hin li v sa nhng li n h thng. S a s dng t hn so mc RAID 1Nhc im:Chi ph mua a cao.KQ: ng dng trong h thng hay xut hin li


RAID LEVEL 3



Ging RAID 2 nhng t chc n gin hn. S dng mt a d phng.

Tt c a u vn hnh tham gia yu cu trao i d liu. Kch thc Strip c th byte hay word. C s dng m Parity phc hi d liu.u im:C kh nng truyn d liu song song. S a s dng d phng l 1 a. Chi ph thp.Nhc im:Ti mt thi im ch tha mn mt yu cu vo ra.KQ: ng dng trong h thng hay xut hin li


RAID LEVEL 4



Ging RAID 3 nhng t chc n gin hn. S dng mt a d phng.

D liu t chc thnh khi. Cc a s dng phng php truy cp c lp. C s dng m Parity phc hi d liu.u im:C kh nng p ng nhiu yu cu vo ra ng thi. S a s dng d phng l 1 a. Chi ph thp.Nhc im:Kh nng truyn d liu song song l km.KQ: ng dng trong h thng hay xut hin li


RAID LEVEL 5



Ging RAID 4, tuy nhin s phn b u thng tin d phng trnh c hin tng tc nghn(bottle neck)

D liu t chc thnh khi. Cc a s dng phng php truy cp c lp. C s dng m Parity phc hi d liu.u im:C kh nng p ng nhiu yu cu vo ra ng thi. S a s dng d phng l 1 a. Chi ph thp.Nhc im:Kh nng truyn d liu song song l km.KQ: ng dng nhiu trong thc t.


RAID LEVEL 6


RAID LEVEL 10


RAID LEVEL 50


5.6 H thng nh trn my PC hin nay

H thng Cache: tch hp trc tip trn cc chip vi x l

B nh chnh: tn ti di dng module nh RAM SIMM: Single Inline Memory Module 30 pin : 8 ng d liu 72 pin : 32 ng d liu DIMM: Dual Inline Memory Module 168 pin: 64 ng d liu RIMM:Rambus Inline Memory Module


ROM BIOS

ROM BIOS: Basic Input Output System ROM cha chng trnh sau:

Chng trnh POST (Power On Self Test)Chng trnh CMOS setup (Compementary Metal

Oxide Semiconductor)Chng trnh Bootstrap LooaderChng trnh iu khin vo ra c bn (BIOS)CMOS RAMCha cu hnh h thng hin thing h v ngy thng nm h thngC pin nui ring


Chng 6

6.1 Tng quan v h thng vo ra

6.2 Cc phng php iu khin vo ra

6.3 Ni ghp thit b ngoi vi

6.4 Cc cng vo ra thng dng

Gii thiu chung



Gii thiu chung h thng vo raChc nng: Trao i thng tin gia My tnh vi mi trng bn ngoi.Cc thao tc c bn: Vo d liu Ra d liuCc thnh phn chnh: Thit b ngoi vi Module ghp ni vo ra



Thit b ngoi viChc nng: phng tin chuyn i thng tin gia bn trong v bn ngoi my tnhc im cc thit b

Trn th trng tn ti rt nhiu cc thit b ngoi vi khc nhau v: Nguyn tc hot ng, tc , nh dng d liu truyn, v.v. ng thi cc thit b ny c tc lm vic chm hn CPU v RAM rt nhiu. Chnh v l do trn cn c Module vo ra ghp ni cc thit b ngoi vi vo h thng BUS my tnh.


Phn loi: Thit b nhp: Keyboard, Mouse, Scan, Micro, Thit b xut: Monitor, Printer, Thit b xut nhp: Modem, NIC, Driver,Cu trc tng qut ca thit b ngoi vi:B chuyn i tn hiu: chuyn i d liu gia bn trong v bn ngoi My tnhB m d liu: ni lu tr d liu trung gian gia My tnh v thit b ngoi vi, t bn trong thit b ngoi vi.Khi logic iu khin: iu khin hot ng ca thit b ngoi vi theo tn hiu t Module I/O gi ti thit b.




B m d liu

B chuyn i tn hiu

Khi Logic iu khinT/h trng thi

(State)

D liu vo/ ra Module

T/h iu khin

D liu vo/ra bn

ngoi


6.1 Tng quan v h thng vo raModule I/OChc nng: Ni ghp thit b ngoi vi vi bus ca my tnh. iu khin v nh thi Trao i thng tin vi CPU Trao i thng tin vi thit b ngoi vi m gia my tnh vi thit b ngoi vi Pht hin li ca cc thit b ngoi vi.Cu trc chung:Thanh ghi m d liu: m d liu trong qu trnh trao iCng ni ghp vo ra: kt ni thit b ngoi vi, mi cng c a ch xc nh v chun kt ni ring ph thuc s chn.Thanh ghi trng thi/iu khin: lu tr thng tin trng thi cho cc cng vo raKhi logic iu khin: iu khin Module vo ra


Thanh ghi m

d liu

Cng ni

ghp vo/ra

Thanh ghitrng thi/iu khin

Khi Logic iu khin

Cng ni

ghp vo/ra

Bus d liu Bus d liu

Cc ng /c

Cc ng /k

ng /kh

State



V d cng ghp ni song song(LPT)

Cc ng dn ca cng song c ni vi 3 thanh ghi 8 bit khc nhau:Thanh ghi d liu (a ch c s)Thanh ghi trng thi (a ch c s +1)Thanh ghi iu khin (a ch c s +2)

Cc i ch cng c th l:LPT1: 378h (379h ; 37Ah)LPT2: 3BChLPT3: 278hLPT4: 2BCh


V d cng ghp ni song song(LPT)

Hp ng: xut ra d liu: OUT DX, AL hoc OUT DX, AX nhp vo d liu: IN AL, DX hoc IN AX, DX(DX cha a ch; AL cha gi tr) Turbo C xut ra d liu: outportb(ia_ch, gi_tr) nhp vo d liu: bien = inportb(a_ch) Turbo Pascal xut ra d liu: port[ia_ch]:= gi_tr nhp vo d liu: bien:=port[a_ch]


V d cng ghp ni tip(COM)

Cc thanh ghi chnh:Thanh ghi m (Buffer Register) a ch c sThanh ghi trng thi (Status Register) CCS+5Thanh ghi iu khin (Control Register) CCS+3

Cc a ch cng c th l:COM1: 3F8h (3FDh ; 3FBh)COM2: 2F8hCOM3: 3E8hCOM4: 2E8h



Phn loi: Vo ra bng chng trnh Vo ra bng ngt Truy cp b nh trc tip DMAVo ra bng chng trnhNguyn tc chung: S dng lnh vo ra trong chng trnh trao i d liu vi

cng vo ra.Khi CPU thc hin chng trnh gp lnh vo ra th CPU iu

khin trao i d liu vi cng vo ra.Lnh I/O:Vi khng gian a ch vo ra ring bit: s dng cc lnh vo

ra chuyn dngVi khng gian vo ra dng chung b nh th cc lnh trao i

d liu s dng nh ngn nh.



Hot ng vo ra bng chng trnh CPU gp lnh trao i vo ra, yu cu thao tc vo ra Module vo ra thao tc vo ra Module vo ra thit lp cc bit trng thi(State) CPU kim tra cc bit trng thi:

Nu cha sn sng th quay li kim tra liNu sn sng th chuyn sang trao i d liu vi Module

vo ra.


Lu thc hin chng trnh:


c trng thi sn sng

Module I/O sn sng?

Trao i d liu vi Module I/O

N

Y


Nhn xt:CPU trc tip iu khin vo ra: c trng thi, kim tra trng thi, thc hin trao i. Trong trng hp nhiu thit b cng cn trao i d liu v thit b cha sn sng tn rt nhiu thi gian CPU Vic thc hin trao i n ginVo ra bng ngtNguyn tc chung: CPU khng phi i trng thi sn sng ca Module vo ra. Module vo ra khi n sn sng pht ra tn hiu yu cu ngt CPU CPU thc hin chng trnh vo ra tng ng trao i d liu. CPU tr li chng trnh ang b ngt.




Cc phng php ni ghp S dng nhiu ng yu cu ngt. Kim tra vng bng phn mm (Polling) Kim tra vng bng phn cng S dng b iu khin ngt. Nhiu yu cu ngt ng thi CPU s dng nhiu ng yu cu ngt. Np vo thanh ghi yu cu ngt. Hn ch s lng Module vo ra Cc ng ngt c qui nh mc u tin.


CPU pht ra tn hiu chp nhn ngt n Module u tin. Nu Module khng gy ra ngt thi n gi tn hiu ti

cc Module k tipModule I/O gy ngt s t vector ln bus d liu CPU s dng ngt xc nh chng trnh con iu khin

ngt Th t vo ra cc Module trong chui xc nh th t u

tin.




Truy nhp b nh trc tip(DMA: Direct Memory Access)

Vi nhc im chnh ca hai phng php trn l: CPU tham gia trc tip vo trao i d liu v vic trao i lng d liu nh. khc phc hai phng php trn mt phng php mi c tn DMA s s dng thm mt Module phn cng c DMAC (DMA Controller). V vy khi trao i d liu khng cn CPU.



B m dl

Thanh ghi dl

Thanh ghi /c

Khi logic/ K/K c

/k ghiY/c DMAChp nhn DMA

Y/c BusChuyn nhng BusNgtT/h c/ghi

Cc ng dl

Cc ng /c



Cc thnh phn ca DMAC Thanh ghi d liu: cha d liu trao i. Thanh ghi a ch: cha a ch ca ngn nh d liu B m d liu: cha s t d liu cn trao i Khi logic iu khin: iu khin hot ng ca

DMACHot ng ca DMA Khi cn vo ra d liu th CPU nh DMAC tin hnh

vo ra d liu vi thng tin cho bit nh sau:



a ch thit b vo ra a ch u ca mng nh cha d liu v DMAC np

thanh ghi a ch S t d liu cn truyn v DMAC np vo b m d

liu CPU s i thc hin vic khc DMAC iu khin vic trao i d liu sau khi truyn

mt t d liu th ni dung thanh ghi a ch tng ln v ni dung b m d liu gim xung mt n v.

Khi b m bng d liu bng 0, DMAC gi tn hiu ngt CPU bo kt thc DMA



CPU

DMAC

Thit b I/O

B nh

BUS A CH

BUS D LIU

HOLD

HLDA

YU CU YU CU

CHP NHN CHP NHN

BUS /K, T/H IO/MEM



Cc kiu thc hin DMA DMA truyn theo khi: DMAC s dng BUS truyn c khi

d liu (CPU chuyn nhng BUS cho DMAC) DMA ly chu k: DMAC cng bc CPU treo tm thi tng

chu k BUS thc hin truyn mt t d liu DMA trong sut: DMAC nhn bit nhng chu k no CPU

khng s dng BUS th chim BUS trao i d liu (DMAC ly ln chu k)

c im DMA CPU khng tham gia trong qu trnh trao i d liu DMAC iu khin trao i d liu gia b nh chnh v Module

vo ra vi tc nhanh. Ph hp vi yu cu trao i mng d liu c kch thc ln.



B x l vo ra Vic iu khin vo ra c s dng bi mt b iu

khin vo ra chuyn dng. B x l vo ra hot ng theo chng trnh ring

ca n. Chng trnh ca b x l vo ra c th nm trong b

nh chnh hoc b nh ring. Hot ng theo kin trc a x l



Ni ghp thit b ngoi viCc kiu ni ghp vo ra Ni ghp song song Ni ghp ni tipNi ghp song songTruyn cc bit song songTc truyn nhanhCn ng truyn song song Tn nhiu dy dn



Ni ghp ni tip Truyn ln lt tng bit Cn c b chuyn i t song song sang ni tip Tc chm Cn t ng truyn d liuCc cu hnh ghp ni ghp im ti im (point to point): Qua mt cng vo ra ch c th

ghp mt thit b ngoi vi (PS/2, COM, LPT,) im ti a im (Point to multipoint): Thng qua mt cng

vo ra ghp nhiu thit b vo ra. V d: SCSI(7,15), USB (127),


6.4 Cc cng vo ra thng dng

Cc cng vo ra thng dng PS/2 : ni ghp bn phm v chut VGA(Video Graphic Adapter): Cng ni ghp mn

hnh LPT (Line PrinTer): ni ghp vi my in l cng song

song COM (COMmunication): ni ghp vi Modem, chut,

v thit b khc. Cng ni tip 9 hoc 25 chn. USB: cng ni tip a nng cho php ni ghp ni tip

ti a 17 thit b thng qua Hub.


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Bai Giang Cau Truc May Tinh