31
CSE 245: Computer Aided Circuit Simulation and Verification Instructor: Prof. Chung-Kuan Cheng Winter 2003 Lecture 1: Formulation

CSE 245: Computer Aided Circuit Simulation and Verification

  • Upload
    hang

  • View
    50

  • Download
    0

Embed Size (px)

DESCRIPTION

CSE 245: Computer Aided Circuit Simulation and Verification. Winter 2003 Lecture 1: Formulation. Instructor: Prof. Chung-Kuan Cheng. Agenda. RCL Network Sparse Tableau Analysis Modified Nodal Analysis. History of SPICE. SPICE -- Simulation Program with Integrated Circuit Emphasis - PowerPoint PPT Presentation

Citation preview

Page 1: CSE 245: Computer Aided Circuit Simulation and Verification

CSE 245: Computer Aided Circuit Simulation and Verification

Instructor:Prof. Chung-Kuan Cheng

Winter 2003

Lecture 1: Formulation

Page 2: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 20032

Agenda RCL Network Sparse Tableau Analysis Modified Nodal Analysis

Page 3: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 20033

History of SPICE SPICE -- Simulation Program with Integrat

ed Circuit Emphasis 1969, CANCER developed by Laurence Nag

el on Prof. Ron Roher’s class 1970~1972, CANCER program May 1972, SPICE-I release July ’75, SPICE 2A, …, 2G Aug 1982, SPICE 3 (in C language) No new progress on software package sinc

e then

Page 4: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 20034

RCL circuit

Vs

R L

C

svi

v

ri

v

l

c 0

1

10

0

0

1

2

1

2

l

vi

v

l

r

l

ci

vs

0

1

10

1

2

1

2

Page 5: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 20035

RCL circuit (II) General Circuit Equation

Consider homogeneous form first

BUAYY

AYY

0YeY At

...!

...!2!1

22

k

tAtAAtIe

kkAt

Q: How to Compute Ak ?

and

Page 6: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 20036

Assume A has non-degenerate eigenvalues

and corresponding linearly independent eigenvectors , then A can be decomposed as

where and

Solving RCL Equation

1A

k ,...,, 21

k ,...,, 21

k

0

0

00

2

1

k ,...,, 21

Page 7: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 20037

What’s the implication then?

To compute the eigenvalues:

Solving RCL Equation (II)

1A

01

1 ...)det( ccAI nn

n

0)...(...))(( 212

0 ppp

realeigenvalue Conjugative

Complexeigenvalue

212A 212A

tAt ee 1 where

ke

e

e

e t

0

0

002

1

Page 8: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 20038

Solving RCL Equation (III)

In the previous example

)0(

)0(

1

2//1

/10

01

2

i

veXe

i

v tlrl

c

At

0

0

11

10 11A

2

31

2

31

j

j

where

1

2

31

12

31

3 j

jj

2

31

2

3111

1 jj

hence

e

ee At

0

01

Let c=r=l=1, we have

Page 9: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 20039

What if matrix A has degenerated eigenvalues? Jordan decomposition !

Solving RCL Equation (IV)

JA 1

J is in the Jordan Canonical form

And still JtAt ee 1

Page 10: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200310

Jordan Decomposition

0

1J

t

ttJt

e

teete

00

1

10

01

00

10

01

J

t

tt

ttt

Jt

e

tee

et

tee

te

00

0!2

00

10

01

100

010

001

2

similarly

Page 11: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200311

Agenda RCL Network Sparse Tableau Analysis Modified Nodal Analysis

Page 12: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200312

Equation Formulation KCL

Converge of node current KVL

Closure of loop voltage Brach equations

I, R relations

Page 13: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200313

Types of elements Resistor Capacitor

Inductor

L is even dependent on frequency due to skin effect, etc…

Controlled Sources VCVS, VCCS, CCVS, CCCS

dt

dvvc

dt

dv

v

vQ

dt

dQi )(

)(

dt

diil

dt

di

i

i

dt

dv )(

)(

Page 14: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200314

Cut-set analysis

1. Construct a spanning tree

2. Take as much capacitor branches as tree branches as possible

3. Derive the fundamental cut-set, in which each cut truncates exactly one tree branch

4. Write KCL equations for each cut

5. Write KVL equations for each tree link

6. Write the constitution equation for each branch

1

2

3

4

5

6

Page 15: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200315

0

0

0

0

0

11000000

10110000

00011010

00000110

00000011

56

46

45

35

34

24

13

12

46

45

34

24

12

5646453534241312

i

i

i

i

i

i

i

i

c

c

c

c

ciiiiiiii

KCL Formulation

0

iA

1

2

3

4

5

6

#nodes-1 lines

#braches columns

Page 16: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200316

KCL Formulation (II) Permute the columns to achieve a

systematic form

0~

|

iAI

0

0

0

0

0

100

110

011

001

001

10000

01000

00100

00010

00001

56

23

13

46

45

34

24

12

46

45

34

24

12

i

i

i

i

i

i

i

i

c

c

c

c

c5623134645342412 iiiiiiii

1

2

3

4

5

6

Page 17: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200317

KVL Formulation

56

46

45

35

34

24

13

12

46

45

34

24

12

11000

10000

01000

01100

00100

00010

00111

00001

v

v

v

v

v

v

v

v

v

v

v

v

v

VeAT

0

10011000

01001100

00100111

56

35

13

46

45

34

24

12

56

35

13

v

v

v

v

v

v

v

v

l

l

l

0BV

Remove the equations for tree braches and systemize

IBB~

1

2

3

4

5

6

Page 18: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200318

Cut & Loop relation

0

BV

VeAT

0TBA

0]~

][~[ TAIIB

0~

TAB

TAB~~

100

110

011

001

001

~A

11000

01100

00111~B

In the previous example

Page 19: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200319

Sparse Tableau Analysis (STA) n=#nodes, b=#branches

e

v

i

KK

AI

A

vi

T

0

0

00(n-1) KCL

b KVL

b branch relations

b

b

n-1

S

0

0

Totally 2b+n-1 variables, 2b+n-1 equations

b b n-1

Due to independentsources

Page 20: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200320

STA (II) Advantages

Covers any circuit Easy to assemble Very sparse

Ki, Kv, I each has exactly b non-zeros. A and AT each has at most 2b non-zeros.

Disadvantages Sophisticated data structures & programmin

g techniques

Page 21: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200321

Agenda RCL Network Sparse Tableau Analysis Modified Nodal Analysis

Page 22: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200322

Nodal Analysis Derivation

SvKiK

eAv

iA

vi

T

0

SAKeAKAK

SAKvKAKiA

SKvKKi

iT

vi

ivi

ivi

11

11

11

From STA:

(1)

(2)

(3)

(3) x Ki-1

(4) x A

(4)

Using (a)

(5)

(6)

Tree trunk voltages

Substitute with node voltages (to a given reference), we get the nodal analysis equations.

e

Page 23: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200323

Nodal Analysis (II)

SAKeAKAK iT

vi

11

1iK

12y13y

24y34y

35y45y

46y56y

IKv

11000000

10110000

00011010

00000110

00000011

A

46

45

34

24

12

564656

5656453535

353534131313

13241313

13131312

1

v

v

v

v

v

yyy

yyyyy

yyyyyy

yyyy

yyyy

eAKAK Tvi

1

2

3

4

5

6

Page 24: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200324

2

2

2222

2

W

J

I

V

ZAY

AY nT

n

Modified Nodal Analysis General Form

Node Conductance matrix

KCL

Independent current source

Independent voltage source

Due to non-conductive elements

Yn can be easily derived

Add extra rows/columns for each non-conductive elements using templates

Page 25: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200325

11000000

10110000

01101000

00011010

00000101

00000011

MNA (II) Fill Yn matrix according to incidence matrix

5645354535

45464534243424

353435341313

24241212

13121312

00

0

0

00

00

yyyyy

yyyyyyy

yyyyyy

yyyy

yyyy

Yn

5646453534241312 iiiiiiii

6

5

4

3

2

1

n

n

n

n

n

n

A

Choose n6 as reference node

1

2

3

4

5

6

Ten AAYY

Page 26: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200326

MNA Templates

j

j

i

i'j

j

j

'j

ji

11

1

1

1

'

m

j

j

'jj vv

gv

Independent current source

Independent voltage source

j

'j

gv

Add to the right-hand side of the equation

jiji

Page 27: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200327

MNA Templates (II)

CCVS

'j

ji

j k

'k

ji

CCCS

11

1

1

jcc iNNNN

1

m

N

N

N

N

c

c

r11

11

1

1

1

1kjkkjj iivvvv ''

2

1

'

'

m

m

k

k

j

j

'j

ji

j k

'k

jri

ki

Page 28: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200328

MNA Templates (III)

'j

j k

k

jv

VCVS

'j

jv

j k

'k

jmvg

VCCS

11

1

1

kkkjj ivvvv ''

1

'

'

m

k

k

j

j+

-

jv

ki

+

-

mm

mm

gg

gg'k

k

'jj vv

Page 29: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200329

2

1

11

11

1

1

1

1

LjMj

MjLj

MNA Templates (IV)

j

'j

k

'k

+ +

- -

jv kv

1L 2L

1i 2i

j

'j

k

'k

i

'

'

k

k

j

j

M'' kkjj vvvv 2i

'

'

k

k

j

j

2

1

m

m

Mutual inductance

Operational Amplifier

11

1

1

'' kkjj vvvv i

1m

1i

Page 30: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200330

MNA Example

n 1n 2

n 3 n 4G 2 G 3

C 4

C 5v g

n 0

+

_

v 6 v 7= v 6

Circuit Topology

0

0

0

0

0

00100

000001

1000

0000

00

0100

4

3

2

1

44

533

434322

22

g

vcvs

g

n

n

n

n

v

i

i

v

v

v

v

CjCj

CjGG

CjGCjGGG

GG

n 1 n 2 n 3 n 4

n 0

2 3

4

5 6 71i g

i vcvs

MNA

Equations

Page 31: CSE 245: Computer Aided Circuit Simulation and Verification

Jan. 24, 2003 Cheng & Zhu, UCSD @ 200331

MNA Summary Advantages

Covers any circuits Can be assembled directly from input data.

Matrix form is close to Yn

Disadvantages We may have zeros on the main diagonal. Principle minors could be singular