前言: 磷化銦是值得重視的半導體材料

III-V 族半導體元件的製作與應用已經廣泛的被應用，在許多化合物半導體中磷化銦具備了小的電子游離係數[1]。而且，磷化銦相對於其它的半導體材料有較高的電子移動率和較高的電子飽和速率[2]。由以上的優點所述磷化銦半導體運用在場效電晶體(field effect transistors：FET) 、接面場效電晶體(junction field effect transistors：JFET)、高電子移動率電晶體(high electron mobility transistors：HEMT) 、異接面雙極性電晶體(heterojunction bipolar transistors：HBT) 、微波元件、長波長雷射二極體(long-wavelength laser diodes)、發光二極體(light-emitting diodes：LED)、和太陽電池相當具有極佳的潛力。

目前用於製作半導體的材料，大多集中運用矽及砷化鎵；但是，隨

著光纖通訊的迅速發展，以及資訊網路的逐漸普及，第三種半導體材

料：磷化銦，勢必成為一個炙手可熱的科技發展領域。 磷化銦及相關材料，主要的應用有兩個領域，一是光電方面，用於光纖通訊、光纖網路光源、光接收器等，其二是利用它的電特性比矽或

砷化鎵優越，而製作快速電晶體。以磷化銦材料發展出的 1.3um 雷射，現在用於通信，而即將呈現的大量應用，則是資訊網路；不過，它有雷

射熱的問題，必須得靠冷卻器包裝，如果能克服雷射熱而又不需複雜的

冷卻包裝，將可普及化、大量化使用。 故這次專題我們以磷化銦半導體為基材之二極體作主要之探討對象，此次實驗是以磷化銦半導體的物理特性為主要研究方向。

1

實驗步驟:

上為本實驗之實驗流程簡圖

本實驗的量測有 1. I-V 特性以 HP 4145B system 來量測

2.以 SIMS 分析元素在沉積後之分佈

3.XRD 分析其所產生的相

4.AFM 觀察其變化表面

2

上圖為本次實驗之試片簡圖

其中 Pt 為 500 Å，而 Al 為 85 Å

3

實驗結果: 本次實驗的研究結果顯示在 300 度熱退火及 400 度熱退火之 XRD

圖中，皆有產生氧化鋁的相位。而在 SMIS 的分析中也有相同的表現，固可以證實實驗的準確性進而可印證之前學者的論述。

XRD 儀器名稱：(中文)： X-Ray 繞射分析儀

(英文)：X-Ray Diffraction 放置地點：崑山科技大學奈米技術研發中心-X-Ray 繞射分析室 功能簡介：

利用 X 繞射分析儀可知道其結晶構造、晶格常數、原子面間距離等。

4

20 30 40 50 60 70 80 900

100

200

300

400

500

600

700

800

900

1000

Al(3

11)

Pt(3

11)Al(2

00)P

t(200

)Pt

(111

)

InP(

400)

InP(

200)

Unannealed

Inte

nsity

Diffraction Angle

上圖為試片在未退火之 XRD 圖

20 30 40 50 60 70 80 900

100

200

300

400

500

600

700

800

900

1000

Pt(3

11)

Al(3

11)

Al(2

00)

Pt(2

00)

Pt(1

11)

Annealed-200oC

Inte

nsity

Diffraction Angle

上圖為試片在 200 度熱退火之 XRD 圖

5

20 30 40 50 60 70 80 900

100

200

300

400

500

600

700

800

900

1000

Al 2O

3(110

)

Pt(3

11)

Al(3

11)Al(2

00)

InP

(400

)

Pt(2

00)

InP

(200

)

Pt(1

11)

Annealed-300oC

Inte

nsity

Diffraction Angle

上圖為試片在 300 度熱退火之 XRD 圖

20 30 40 50 60 70 80 900

100

200

300

400

500

600

700

800

900

1000

Al 2O

3(110

)

Pt(3

11)

Al(3

11)

Al(2

00)

InP

(400

)

Pt(2

00)

Pt(1

11)

InP

(200

)

Annealed-400oC

Inte

nsity

D iffraction Angle

上圖為試片在 400 度熱退火之 XRD 圖

6

AFM 儀器名稱：(中文)：掃描探針顯微鏡

(英文)：Scanning Probe Microscope 放置地點：崑山科技大學奈米技術研發中心-掃描探針顯微鏡分析室 功能簡介：

原子力顯微術：具有最佳之原子解析度檢測能力，協助學術界研究薄膜

特性，如鍍膜粗糙度量測等等。 磁力顯微術： 具有高解析度表面磁性檢測能力，協助學術界研究高密

度磁記錄薄膜表面磁區分佈。

儀器實景圖

7

下列兩圖為試片在未退火之 AFM 照片

(A)

(B)

8

下列兩圖為試片在 200 度熱退火之 AFM 照片

(A)

(B)

9

下列兩圖為試片在 300 度熱退火之 AFM 照片

(A)

(B)

10

下列兩圖為試片在 400 度熱退火之 AFM 照片

(A)

(B)

11

結論: 本實驗在經過一連串的實驗分析之後發現 Pt/Al/InP 在 300 度熱退火的 XRD 時，開始有氧化鋁的相角產生但是並不顯著。而在 400 度熱退火之後氧化鋁的相角更加明顯固可以確定實驗的準確性，而在與

SIMS 分析元素在沉積後所分佈之結果做交叉比對之後。發現在 SIMS

分析之中也有氧化鋁的產生，故可用來印證前人之論述。 本篇論文發表於 2004 年材料年會，下為論文全文

論文全文:

Effect of aluminum-oxide on the InP MIS diode Wen Chang Huang（黃文昌）, *Dong-Rong Cai (蔡東融)

Department of Electronic Engineering, Kun Shan University of Technology（崑山科技大學電子工程系）

Barrier height enhancement of the metal/n-InP was investigated. In the double metal contact structure, Pt/Al/n-InP diode, the barrier height was improved from 0.64eV to 0.74eV after it was treated in the furnace annealing 300°C for 10 min. The phase of aluminum-oxide was observed in the annealed sample from X-ray diffraction patterns. From the Secondary Ion Mass Spectroscopy, it showed aluminum and oxygen overlaid and existed in the contact interface. The barrier enhancement was due to the formation of aluminum-oxide layer between metal and n-InP substrate.

Key words: InP, aluminum-oxide, barrier height

12

1. Introduction Indium phosphide is a promising III-V compound semiconductor for

application in high speed metal semiconductor field-effect transistors (MESFET),[1-3] electro-optics,[4] and laser diodes.[5] Its attractive features include high electron mobility, large and direct bandgap, high saturation velocity and breakdown voltage. Surface Fermi level pinning, arising from the high density of surface states and other nonstoichiometric defects, make it difficult for n-InP to obtain a Schottky barrier height greater than 0.5 eV.[6-8] Such a low barrier height causes a large reverse leakage current and bad electrical performance for Schottky diodes made of n-InP. Therefore, formation of a high Schottky barrier height is an important research issue in InP device development. Various techniques such as applying H2 plasma or PH3 plasma treatments,[9] growing a thin P3N5 film,[10] POxNyHz film,[11] a InSb film[*] or an interfacial oxide layer[12-15] on the InP surface have been proposed. Although introduction of a thin oxide layer between metal and InP increases the barrier height and improves the electrical characteristics,[6,9-15] it also adds an additional processing step. Recent research into depositing metal directly onto the InP surface has been reported. Shi and Ande

rson[16] proposed low-temperature (77K) deposition technique for metal/n-InP contact with a Schottky barrier height of 0.96 eV. They attributed the barrier height to the formation of phosphides during low temperature deposition which acted as an insulator. Dunn and Stringfellow[17] studied Ag/Al contacts with n-InP and reported a barrier height of 0.65 eV and a reduced leakage current in a fabricated device. Migazaki et. al.[**] proposed a Ni/Ai/Ni contact structure to form a wide bandgap material to improve barrier height.

Relating to the research of n-InP Schottky, we had published the Pt/Al/n-InP contact structure.[18] And we concentrated on the electrical characteristics including current-voltage (I-V), current-voltage-temperature (I-V-T), capacitance-voltage (C-V). Also we supposed the barrier height improving was due to the formation of aluminum at the discussion. In this paper, we discuss the P/Al/n-InP diode according to the material analysis. The X-ray diffraction (XRD) analysis was employed to observe the phase formation. Secondary Ion Mass Spectroscopy (SIMS) was used to see the distribution of all elements in the diode. Atomic force microscope (AFM) was used to discuss the morphology of the surface 2. Diode Fabrication and Measurement

The diodes were fabricated on (100) n-InP substrate wafers with a free-carrier concentration of 5-9×1015 cm-3. Low resistance ohmic contact on the back side was formed by evaporating an AuGeNi eutectic source ( 84% Au, 12% Ge, 4% Ni by

13

weight ), followed by annealing at 400°C for 3 min. During the annealing process, an InP wafer was place as a cap on the front surface of the substrate to prevent phosphorus out-diffusion. The wafers were then degreased with trichloroethylene (TCE), acetone (ACE), methanol and de-ionized water in sequence, and soaked in H2SO4 (98%) for 3 min. They were then etched in NH4OH:H2O2:H2O=3:1:15 for 3 min to remove surface damage. A 2000Å thick layer of SiO2 was then deposited on the front-side of the wafers and the contact patterns were defined photo-lithographically. The SiO2 in the contact windows was removed in buffered oxide etch (BOE), and the wafers were rinsed in de-ionized water. Multiple layer of metals Pt/Al were deposited sequentially on the wafers in a vacuum of 4×10-6 Torr, and metal patterns were obtained by using a lift-off process. The Pt thickness was about 500 Å and the Al thickness is 85 Å The diode’s area was 4.6×10-4 cm2. The wafers were then annealed in an N2 gas flow, for a long time.

The I-V characteristics were measured with an HP 4145B system. To evaluate the distribution of elements in the deposited films, a SIMS analysis was performed with a primary beam of 133Cs+ at 10 KeV, with a current of 16 nA and a rastering area of 225x225 μm2. XRD analysis was employed to observe the phase formation. AFM was used to discuss the morphology of the surface 3. Results and Discussion

Fig. 1 shows one of the best I-V characteristics of a Pt(500Å)/Al(85Å)/n-InP diode annealed at 300°C for 10 min. The diode exhibits a forward characteristic with an ideality factor of n = 1.11 over five decades. The effective barrier height Øb derived from the forward characteristic is 0.74eV. The reverse leakage current at -4V is 2.22×10-4 A/cm2. For the unannealed Pt/Al/n-InP diode, its barrier height is 0.64eV, its ideality factor is 1.35 and its reverse leakage current is 2.73×10-3 A/cm2 at -4V.

Figure 2(a) and 2(b) show the variation of barrier height and ideality factor after the diode was treated at different annealed temperature. It shows that a stable and good diode characteristic was obtained at the annealing temperature from 300 to 400°C. The I-V characteristic showed great variation between diodes in the low temperature annealing samples. The diode was degraded and showed poor current-voltage characteristic after it was treated at 500°C annealing.

14

10-8

10-6

0.0001

0.01

1

100

-4 -3 -2 -1 0 1 2

As deposited300C annealed

Voltage (V) Figure 1 I-V characteristic of the Pt/Al/n-InP with annealed and without annealed, respectively.

200 250 300 350 400 450 5000.40

0.45

0.50

0.55

0.60

0.65

0.70

0.75

0.80

Bar

rier H

eigh

t (eV

)

Annealed Temperature (C)

Figure 2 (a) Variation of barrier height of the Pt/Al/n-InP diode after it was annealed with different

temperature.

200 250 300 350 400 450 5001.00

1.05

1.10

1.15

1.20

1.25

1.30

1.35

1.40

1.45

1.50

1.55

1.60

Idea

lity

Fact

or

Annealed Temperature (C)

Figure 2 (a) Variation of ideality factor of

the Pt/Al/n-InP diode after it was annealed with different temperature.

15

Figure 3 Shows the XRD analysis of the diodes after it was treated with different annealed temperature. In Figure 3(a), the diffraction angle 2θ centered at 30.3°, 63.2° indicates to InP(200) and InP(400), respectively. The diffraction signals of platinum are Pt(111) 38.5°, Pt(200) 44.3° and Pt(311) 81.7°, respectively. The aluminum signal was found at Al(200) 64.4° and Al(311) 77.6°. Figure 3(b) shows the spectrum of the diode after furnace annealed at 300°C. Basically, no obviously change on the diffraction pattern, while a new phase was observed. The weak new phase of Al2O3 (110) was found at 2θ=20.4°. For the 400°C annealed result as shown in Figure 3(c), the intensity of the Al2O3 (110) signal strengthen. It shows a better crystallize on the phase of Al2O3 (110). The better quality of the aluminum-oxide interfacial layer on the contact interface make a better prohibit on the electron transporting between metal and semiconductor.

20 30 40 50 60 70 80 90

100

200

300

400

500

Al(3

11)

Pt(3

11)

Al(2

00)P

t(200

)

Pt(1

11)

InP

(400

)

InP(

200)

Unannealed

Inte

nsity

(a) Diffraction Angle

20 30 40 50 60 70 80 90

100

200

300

400

500

Al 2O

3(110

) Pt(3

11)

Al(3

11)

Al(2

00)

InP

(400

)

Pt(2

00)

InP

(200

)

Pt(1

11)

300oC annealed

Inte

nsity

(b) Diffraction Angle

16

20 30 40 50 60 70 80 90

100

200

300

400

500

Al 2O

3(110

) Pt(3

11)

Al(3

11)

Al(2

00)

InP(

400)

Pt(2

00)

Pt(1

11)

InP

(200

)

400oC annealedIn

tens

ity

(c) Diffraction Angle

Figure 3 (a), (b), (c) shows the XRD spectrum of the Pt/Al/n-InP structure, after it was treated with

different annealed temperature.

Figure 4 shows the SIMS in-depth profile of the Pt/Al/n-InP structure. The signals of In and P were detected in parallel and representing the InP substrate. The peak of the Al signal was detected on the InP surface, also we found that the oxygen signal was detected and tracing with the aluminum counts. This is due to aluminum trapped with the oxygen during evaporation and forming aluminum-oxide as conformed in the XRD results.

1

10

100

1000

104

105

106

107

0 100 200 300 400 500 600 700

OAlPInPt

Sputtering Time (sec)

O

metal InP substrate

PPt

AlIn

Figure 4 shows the SIMS indepth profile of the Pt/Al/n-InP structure.

17

(a)

(b)

(c)

Fig. 5 The AFM images of Pt/Al/InP (a)un-annealed

(b)300℃-annealed (c)400℃-annealed for 10 min .

condition un-annealed 300℃-annealed 400℃-annealed RMS(nm) 2.376E+01 4.461E+01 5.573E+01 RA(nm) 1.909E+01 3.593E+01 4.337E+01 Table 1 The RMS values and the average roughness of the Pt/Al/InP sample after annealed with

different temperature.

The surface microstructure morphology of the Pt/Al/n-InP contact with different annealed temperature were observed using AFM. Images in three dimensional are shown in Figure 5. The surface of the unannealed sample is composed of grain like structures. The average roughness is increased as the annealed temperature is increased. The value of the average roughness and the roughness root mean square are summarized in the Table 1. From the AFM results, we knew that there are some new grain growth after 300°C and 400°C annealing. The grains make uneven distribution of the Pt/Al/n-InP contact surface.

The electrical characteristic of Pt/Al/n-InP structure is better than the conventional single metal/n-InP contact. This is due to the existence of an

18

aluminum-oxide on the contact interface. Moreover, the electrical characteristic can be more improved as the diode was annealed in furnace at 300-400°C for 10 min. We prove that, this is due to the phase formation of Al2O3 layer in the contact interface. For the unannealed and the 200°C-annealed diode, the quality the insulating layer, Al2O3, is not good enough to barrier the current during voltage bias on the electrode. So, they show lower barrier height and larger reverse leakage current. For the 300°C and the 400°c annealed diode, they show higher barrier and smaller reverse leakage current. 4. Conclusion

Barrier height enhancement of the metal/n-InP was investigated. In the double metal contact structure, Pt/Al/n-InP diode, the barrier height was improved from 0.64eV to 0.74eV after it was treated in the furnace annealing 300°C for 10 min. The phase formation of aluminum-oxide was observed in the annealed sample from X-ray diffraction patterns. From the Secondary Ion Mass Spectroscopy, it showed aluminum and oxygen overlaid and existed in the contact interface.

19

參考文獻

[1]. J. S. Barrera and R. J. Archer, IEEE Trans. Electron Devices, ED-22, 1023 (1975).

[2]. P. M. Smith, P. C. Chao, K. H. G. Duh, L. F. Lester and B. R. Lee, Electron Lett., 22, 781 (1986).

[3]. P. M. Soloman and H. Morkoc, IEEE Trans. Electron Devices ED-31, 1015 (1984).

[4]. S. Y. Wang, S. H. Lin, and Y. M. Huang, Appl. Phys. Lett. 51, 83, (1987). [5]. M. Razeghi, R. Blondeau, M. Krakowski, B. de Cremoux, J. P. Duchemin, F.

Lozes, M. Martinot and M. A. Bensoussan, Appl. Phys. Lett. 50, 230 (1987). [6]. E. H. Rhoderick and R. H. Williams, Metal-Semiconductor contacts (Clarendon,

Oxford, 2nd ed., 75, 1988). [7]. E. Hokelek and G. Y. Robison, Solid-St. Electron. 24, 99 (1981). [8]. L. J. Brillson and C. F. Brucker, J. Vac. Sci. Technol. 21, 564 (1982). [9]. T. Sugino, H. Yamamoto, Y. Sakamoto, H. Ninomiya and J. Shirafuji, Jpn. J.

Appl. Phys. 30, L1439 (1991). [10]. Y. H. Jeong, G. T. Kim, S. T. Kim, K. I. Kim, and W. J. Chung, J. Appl. Phys. 69,

6699 (1991). [11]. D. T. Quan and H. Hbib, Solid-St. Electron. 36, 339 (1993). [12]. Z, Benamara, B. Akkal, A. Talbi, B. Gruzza, L. Bideux, Materials Science and

Engineering, C2 , 287 (2002) [13]. H. Yamagishi Jpn. J. Appl. Phys. 25, 1691(1986). [14]. K. Kamimura, T. Suzuki, and A. Kunioka, J. Appl. Phys. 51, 4905 (1980). [15]. O. Wada, A. Majerfeld, and P. N. Robson, Solid-St. Electron. 25, 381 (1982). [16]. Y. S. Lee and W. A. Anderson, J. Appl. Phys. 65, 4051, (1989). [17]. Z. Q. Shi, R. L. Wallace and W. A. Anderson, Appl. Phys. Lett. 59, 446 (1991). [18]. J. Dunn and G. B. Stringfellow, Journal of Electronic Material 17, 181 (1988). [19]. S. Miyazaki, M. Saruta, T. Okumura, Applied Surface Science, 117/118, 357

(1997) [20]. W. C. Huang, T. F. Lei and C. L. Lee, Journal of Appl. Phys. 78, 291 (1995).

20