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7/29/2019 lecture15_ee620_vcos
http://slidepdf.com/reader/full/lecture15ee620vcos 1/24
Sam Palermo
Analog & Mixed-Signal Center
Texas A&M University
ECEN620: Network Theory
Broadband Circuit DesignFall 2012
Lecture 15: Voltage-Controlled Oscillators
7/29/2019 lecture15_ee620_vcos
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Announcements & Agenda
• VCO Fundamentals• VCO Examples
• VCO Noise
2
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Charge-Pump PLL Circuits
• Phase Detector
• Charge-Pump
• Loop Filter• VCO
• Divider
3
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Voltage-Controlled Oscillator
• Time-domain phase relationship
4
VDDVDD/20
ω0 1
K VCO
( ) ( ) ( )tvK tt cVCOoutout +=∆+= 00 ω ω ω ω
( ) ( ) ( )∫ ∫=∆= dtdt tvK tt cVCOoutout ω φ Laplace Domain Model
φout(t)
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Voltage-Controlled Oscillators (VCO)
• Ring Oscillator• Easy to integrate
• Wide tuning range (5x)
• Higher phase noise
• LC Oscillator
• Large area
•
Narrow tuning range (20-30%)• Lower phase noise
5
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Barkhausen’s Oscillation Criteria
• Sustained oscillation occurs if
• 2 conditions:
• Gain = 1 at oscillation frequency ω0
• Total phase shift around loop is n360° at oscillation frequency ω0
6
( )( )ω
ω
jH
jH
−1Closed-loop transfer function:
( ) 1=ω jH
n
[Sanchez]
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Ring Oscillator Example
7
[Sanchez]
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Ring Oscillator Example
8
[Sanchez]
• 4-stage oscillator• A0 = sqrt(2)
• Phase shift = 45
• Easier to make alarger-stageoscillator oscillate, asit requires less gainand phase shift perstage
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LC Oscillator Example
( )
( )( ) 22
1222
11
221
22
12
11
1
1
1
ω ω
ω ω
CRCL
LR jsZ
sCRsCL
sLRsZ
S
Seq
S
Seq
+−
+==
++
+=
LC tank impedance
• Oscillation phase shift conditionsatisfied at the frequency whenthe LC (and R) tank loaddisplays a purely realimpedance, i.e. 0° phase shift
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LC Oscillator Example
• Transforming the series lossresistor of the inductor to anequivalent parallel resistance
10
S
PPS
PR
LRCC
L
RLL
221
1221
2
1 ,,1ω
ω ≈=
+=
PPCL
11 =ω
R P
[Razavi]
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LC Oscillator Example
11
( ) 12
≥PmRg
PPCL
11 =ω
Loop Gain
• Phase condition satisfied at
• Gain condition satisfied when
[Razavi]
• Can also view this circuit as a parallelcombination of a tank with loss resistance2R P and negative resistance of 2/gm
• Oscillation is satisfied when
P
m
R
g
≤1
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Supply-Tuned Ring Oscillator
12
( )thc
stage
DVCOVV
nCnT T
−≈= β
22
stagec
VCOVCO
nCV
f K
2
β =
∂
∂=
[Sidiropoulos VLSI 2000]
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Current-Starved Ring Oscillator
13
[Sanchez]
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Capacitive-Tuned Ring Oscillator
14
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Symmetric Load Ring Oscillator
15
[Maneatis JSSC 1996 & 2003]
• Symmetric load provides frequency tuning at excellentsupply noise rejection
• See Maneatis papers for self-biased techniques to obtain
constant damping factor and loop bandwidth (% of ref clk)
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LC Oscillator
• A variable capacitor(varactor) is often used toadjust oscillation frequency
• Total capacitance includesboth tuning capacitance andfixed capacitances which
reduce the tuning range
16
( )fixedtunePPP
oscCCLCL +
==11
ω
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Varactors
• pn junction varactor• Avoid forward bias region to prevent oscillator nonlinearity
17
• MOS varactor
• Accumulation-mode devices have better Q than inversion-mode
[Perrott]
n-well[Razavi]
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Oscillator Noise
18
Jitter
[McNeill]
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Oscillator Phase Noise Model
19
( ) ( )dBc/Hz
PowerCarrier
DensitySpectralNoise
= log10f L
( )
∆
∆+
∆+=∆
f
f
f
f
QP
FkTf L
f o
sig
3/1
2
12
11
2log10Leeson’s Model:
• For improved model see Hajimiri papers
[Perrott]
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Open-Loop VCO Jitter
• Measure distribution of clock threshold crossings
• Plot σ as a function of delay ∆T 20
[McNeill]
∆T
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Open-Loop VCO Jitter
• Jitter σ is proportional to sqrt(∆T)
• Κ is VCO time domain figure of merit 21
( )( ) T TOL T ∆≈∆∆ κ σ
[McNeill]
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VCO in Closed-Loop PLL Jitter
22
• PLL limits σ for delays longer than loop bandwidth τL
LL f π τ 21=
[McNeill]
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Converting Phase Noise to Jitter
23
• Integration range depends on application bandwidth
• f min set by standard
• Ex. Assumed CDR tracking bandwidth
• Usually stop integration at f o /2 or f o due to measurement limitationsand aliasing components
( ) ( )df Tf f So
T
∫
∞
∆ ∆=0
2
2
2 sin8
π
ω
σ ϕ • RMS jitter for ∆T accumulation
• As ∆T goes to ∞ ( ) ( )df f SRoo
T ∫∞
==0
22
2 40
2ϕ ϕ
ω ω σ
[Mansuri]
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Next Time
• VCO Noise (cont.)• Divider Circuits
24