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Recitation 9 MOSFET VI Characteristics 6.012 Spring 2009 

Recitation 9: MOSFET VI Characteristics

Before the class first do an exercise on MOS capacitor.

Under T.E., suppose we are under depletion, positive charges at M-O interface, negativecharges (Na−) at O-S interface & depletion region  xdo.

How does the C-V measurement curve look like? 

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=  

Recitation 9  MOSFET VI Characteristics 6.012 Spring 2009 1 1 1

= +C tot   C ox   C d

ox

  sC ox   =   , C d =tox   xd(V GB)

Useful relations:

V FB   =   −(φgate − φbody)

1  

V T(n+/p) =   V FB − 2φp + 2sqN a(−2φp)C ox

C min  1

oxC ox 1 +  2C 2 (V  T−V  FB)

qsN a

Where is  C min? When  V GB   changes,  C ox  does not change.   C d  changes due to  xd(V GB).

xd   = 0 at V FB,

xd   =   xd,max at V T   =   C min⇒

In tutorial, you can also find what the GV curves look like for p + − n MOS or p+ − p MOS,

or n+ − n MOS.

MOSFET Device

•  We only talked about 2 terminals in our MOS capacitor. Where are the other termi-nals? Source/Drain. In the MOS capacitor, S/D tie to bulk ground.→

Figure 1:   MOSFET: 4 terminal device

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Recitation 9  MOSFET VI Characteristics 6.012 Spring 2009 

•  As we mentioned,  V GB   =⇒   V G − V B. In MOSFET, we usually have,

V DS   =   V D − V S V GS   =   V G − V S 

You can do manipulation:   V GD =  V G − V D =  V GS − V DS

•  If the substrate of MOSFET is p-type, what type of MOSFET device this is? n-MOS

or p-MOS? It is n-MOS. MOSFET operates when it is in Inversion. So for n-MOS: Source/Drain are n+. Thus we have two p − n+  junctions between source-substrate (bulk), n+ (D) and p (B). When we apply biases, we try to keep  V BS   ≤   0, V BD   ≤   0 otherwise the p − n+  junction will conduct. 

•  When we use n-MOS, we always try to use source as reference:   V GS, V DS  etc. To start

with, we let  V BS  = 0 =   V GB = V GS⇒

From yesterday’s discussion or 6.002, what are the I-V characteristics (i.e. when

applying V DS, what does  I DS   look like) of a n-MOS?

1. Remember we need to apply positive  V GB   (i.e.   V GS   here) in order to reachthreshold. Before threshold, no conduction.

=   V GS  < V T, I DS = 0 always (cutoff)⇒

2.  V GS   ≥  V T, now we have inversion layer. If the  V DS  = 0, what is the inversion

layer charge density? |Qn| = C ox(V GS − V T) 

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Recitation 9 MOSFET VI Characteristics 6.012 Spring 2009 

When  V DS   >  0, how will this charge density change? Now from S to D, alongthe channel interface, potential is no longer 0.

V (y) =   0(0 < y < L) at each location y

∴, |Qn(y)|   =   C ox(V GS − V (y) − VT)

Decrease from source(y = 0)V (y) = 0 to minimum at  D(y =  L, V (L) = V DS).

To calculate  I DS  remember current  ∝  charge density,  ∝  carrier velocity.

I DS =  W   · |Qn(y)| · vy(y) (vy(y) is velocity in the y  direction at location  y) (1)

How to calculate  vy(y)?   v =  µ E . So need to know  E y(y). How to know  E y(y)?·

E y(y) = dV (y)

(we have  V (x, y) at each location:   dV   will give  E x)dy   dx

Therefore to plug everything in the equation (1)

I DS  =  w · C ox(V GS − V (y) − V T) · µn · dV 

dy

(y)

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Recitation 9 MOSFET VI Characteristics 6.012 Spring 2009 

Integrating,

y v(y)

I DS dy   =   wµnC ox(V GS − V T − V (y)) dV (y) (2)0 0

I DS · y= (V GS − V T)   V (y) −

 1V 2(y) (3)

wµnC ox·

2

So we can solve the potential along each location  y .

V (y) = (V GS − V T) −   (V GS − V T)2  2I DS·y

−wµnC ox

Since I DS  should be the same everywhere, when  y  =  L, V (y) = V DS, plug in (3)

I DS =  wL

µnC ox(V GS − V T −  V 2DS ) · V DS

When V DS  is small,

wI DS 

LµnC ox(V GS − V T)   ·V DS →   linear

Gate voltage controlled resistor

Then as  V DS  increases,  I DS  bend over. When  V DS =  V GS − V T :  I DS  saturates

w   1I DSAT =   µnC ox ·   (V GS − V T)2

L   2    (only depend on  V GS)

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Recitation 9 MOSFET VI Characteristics 6.012 Spring 2009 

PMOSFET Case 

Will need  V BS ≥ 0, V BD  ≥ 0 always. (typically V BS = 0). Now in order to have inversion:

V GB =  V GS  <  0

In p-MOS, we use

V SG   =   V S − V G  >  0

V SD   =   V S − V D  >  0

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Recitation 9 MOSFET VI Characteristics 6.012 Spring 2009 

When working with p-MOS, simply transform n   −→   p

V Tn   −→ −V Tp

I Dn   −→ −I Dp

V GS   −→   V SG

V DS

Triode/linear: − I Dp

−→

=

V SD

w

LµpC ox

V SG + V Tp  −

 V SD

2

V SD   V SD ≤ V SG + V Tp

Saturation:  − I Dp   =  w

2LµpC ox(V SG + V Tp)2 V SD ≥ V SG + V Tp

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6.012 Microelectronic Devices and Circuits

Spring 2009 

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