Roma, Riunione CSN1: Maggio 2004F. Bedeschi, INFN-Pisa 1/13 CDF Stato del Tevatron Stato del rivelatore Upgrades in corso Richieste finanziarie

Roma, Riunione CSN1: Maggio 2004 F. Bedeschi, INFN-Pisa

1/13

CDF

Stato del TevatronStato del rivelatoreUpgrades in corsoRichieste finanziarie (MOF)Stato analisi dati G. PunziStato computing S. Belforte

OUTLINERiunione CSN1

Roma: 17 Maggio, 2004

Franco BedeschiINFN-Pisa


2/13

Extended Tev goals

Luminosity plan 2002 Goals 2002/03 accomplished link Goals 2004 ~ 300 pb-1

Very likely Tevatron is performing very well P-bars injected from recycler!

Year Base plan luminosity/yr (fb-1)

Design plan

Luminosity/yr (fb-1)

FY02 0.08 0.08

FY03 0.20 0.22

FY04 0.31 0.38

FY05 0.39 0.67

FY06 0.50 0.89

FY07 0.63 1.53

FY08 1.14 2.37

FY09 1.16 2.42

Total 4.41 8.56

0

1

2

3

4

5

6

7

8

9

0 1 2 3 4 5 6 7 8 9 10

End FY

fb-1

Base plan

Design plan

Base plan ~ no recycler

link

Lmax = 2 x 1032


3/13

Design and Base Projections

0

10

20

30

40

50

60

9/29/03 9/29/04 9/30/05 10/1/06 10/2/07 10/2/08 10/3/09

Start of Fiscal Year

Inte

grat

ed L

umin

osit

y pe

r W

eek

(pb-1)

Phase 1(FY04)

Phase 2(Slip Stacking)

Phase 3(Recycler &

Electron Cooling)

Phase 4(Stacktail upgrade)

Phase 5(Tevatron upgrades

complete)

Phase 6(No upgrade-related studies)

Design Projection

Base Projection

We arehere


4/13

0

10

20

30

40

50

60

70

11/23/03 12/21/03 1/18/04 2/15/04 3/14/04 4/11/04 5/9/04

Pe

ak

Lu

min

osi

ty (

b-1

/se

c)

Meas

Design

Base

TeV Luminosity(current situation)

Peak luminosity Best 7.0 x1031 !!!

Delivered/on tape 500/400 pb-1/~100 bad due to COT

Analyses use data till Feb. 04 ~ 240 pb-1 > 2 x Run 1

Delivered

On tape

Integrated

Luminosity

Initial

Instantaneous Luminosity

7 x 1031

Luminosity vs. time


5/13

Startup luminosity

Current delivered luminosity is exceeding design goals

0

50

100

150

200

250

300

0 30 60 90 120 150 180 210 240 270 300 330 360

Days Since October 1

Inte

gra

ted

Lu

min

osi

ty (

pb

-1)

FY04

FY03

FY02

FY04 Design

FY04 Base

2002

2003

2004

DesignBase


6/13

COT problem

COT is experiencing an unexpected gain loss ~ 20%/yrChamber is currently operating at

strongly reduced gain to prevent further damage

New wire

SL 2 wire now


7/13

COT problem

Chamber expected to be very radiation hardExpected currents on SL1 is 4.5 mA/wire @ L = 2x1032

From 0.15 Coul/cm (2 fb-1) to 0.60 Coul/cm (8 fb-1)

Predict < 1% gain loss at 1 Coul/cm no problem …..


8/13

COT problem

Observations and diagnosis:Gain loss has z and phi dependenceReversing gas flow reverses pattern of damageDamage most likely caused by insufficient gas flow

Actions taken: Implement gas re-circulation system (80% re-circulated)

Old flow 20 SCF/hr 40 200 testing effectiveness now

Can push as high as 1000 SCF/hr this summer

Back up plans: Increase operating temperature 72 82 FChange gas Ar-CO2 (or even CF4 ?)


9/13

Trigger status

Continuously update to deal with higher luminosity December 2003: 10kHz, 300Hz, 55Hz had ~25% deadtime

L1: improve prescales and XFT

L2: cut on muons, faster code, SVT fast abort

L3: 64 more CPU’s, faster code

Now: L1/L2/L3 can run at 20kHz, 350Hz, 60Hz with low dead time, but…

SVT is dropped beyond 6x1031 …..Faster SVX readout

Road Warrior (mostly Italian work) to remove ghost track before fitters

SVT upgrade


10/13

Status CPR

M&S:PO’s completed~ All material at Fermilab

Module production started2 modules finished Italian techs at work

HV work in progressCables and patch panelsControl and monitor software

Timeline: Installation starts September 04Module construction ends in July


11/13

Status CPR

Performance of first two modules as expectedProduction at full speed

16 pe/MIP after full optical path

Source scan


12/13

Status SVT upgrade

Prototype AM Chip design ready for productionBid approval by INFN delayedHope to get into end of June slot at UMC

Chips back in 3 mo

Plan for production in early 2005With real design less patterns/chip more chips needed

Additional cost is 40 k€ on FY2005

Long range plans of SVT upgrade being made at CDFEven more chips may be needed, but with additional out side

contributions


13/13

MOF

History:250 k€ requested at September 2003 CSN1 meeting

Referees favorable, but only 150 k€ assigned INFN rep. promised 300 k$ = 250 k€ at IFC meeting in October

2003150 k€ already spent and accounted forPlan for use of additional 100 k€ already discussed with Fermilab

Mostly help on unexpected COT costs

Request:100 k€ now to complete FY2004 running cost contributions

Contributions to computing separateDiscussed in Belforte’s presentation


14/13


15/13

Tev 2003 Luminosity

Goals for 2003 Base goals:

200 pb-1 in FY 200310 pb-1/wk end of 2003

5.4x1031 typical

Stretch goals: 320 pb-1 in FY 200315 pb-1/wk end of 2003

7.6x1031 typical (~max achievable without Recycler)

Integrated luminosity goal achieved, but …

Half of shutdown in FY04Avg. lum. lower than predicted

FY04: Double data set

~150 pb-1

As of 5/6/03

~250 pb-1

As of 9/3/03

back


16/13

Tev goals beyond 2003

Fermilab long range plan (M.Witherell P5 presentation – March 26, 2003)

back


17/13

Silicon status

~ 92% operational~85% has low readout

error rate

92% Operational ladders

Error rate < 1%

Jan 04

Jun 03

Jan 02

Jun 02


18/13

CDF Data Acquisition System

Level 1 trigger pipelined and

“deadtimeless” fully synchronous designed for 132ns

operation on L1A, write data to 1 of 4

local L2 buffers Level 2 trigger

asynchronous L1 + supplemental info

Level 3 trigger full detector readout PC farm runs reconstruction output to mass storage


19/13

CDF Run II Trigger System

Level 1 trigger tracking calorimeter: jets & electrons, MET muons

Level 2 trigger L1 information (tracks, e, ) calorimeter shower max silicon information algorithms run in L2 processor

Level 3 trigger full detector readout “offline” processing

Det

ecto

r R

ead

ou

t p

ath


20/13

Summary of Run IIb specifications

Level 1 Accept rate: >25kHz (spec 50kHz) deadtimeless

Level 2 Accept rate: 750 Hz bursts to 1.1kHz L2 processing deadtime < 5% readout deadtime (on L2A) < 5%

Level 3 Accept rate: 85Hz Event builder rate: 400MB/s Output data rate: 40MB/s

Reminder: trigger & bandwidth rates estimated based upon Run IIa, significant underestimate possible (assumes linear growth in fake contribution)


21/13

DAQ/Trigger Summary These are the pieces of the

CDF Front-end, Trigger and Data Acquisition system we need to upgrade/update to carry out a high pT physics program TDC replacement XFT upgrade SVT upgrade L2 replacement Event builder/L3 upgrade

The remainder of the Run IIa CDF front-end/trigger/DAQ system will perform well throughout Run IIb

Documents

Roma, Riunione CSN1: Maggio 2004F. Bedeschi, INFN-Pisa 1/13 CDF Stato del Tevatron Stato del rivelatore Upgrades in corso Richieste finanziarie