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JTEG & JKIT-rev15 2008.09.02
P.1Hitachi ULSI Systems Co .,Ltd.Advanced Materials Technology
TEG wafer and chips for Assembly technology1.Custom-make TEG waferお客様の仕様に基づくカスタムTEGの作製を承ります。
we make the custom-make wafer, it is based on the specifications of the customer.
可提供客製化晶圓服務。
・Wafer size:φ4inch~φ12inch(300mm)
・Wafer Material:Si , Glass , GaAs etc.
・Wire Material:AL , Au , Cu etc.
・Layout :daisy-chain , any pattern
・Passivation : SiO , SiN , PI
・Bump Material:Solder bump(Sn/Ag, Sn/Ag/Cu), Cu pillar, etc.
2.Original TEG wafer弊社オリジナルのTEGウエハを各種販売しております。(P3~)
We provide the solution of various test wafer and kit. (P3~)
我們也提供各種不同規格的現有(晶圓)產品。
3.Custom-make Substrateお客様の仕様に基づくカスタム基板の作製を承ります。
we make the custom-make substrate, it is based on the specifications of the customer.
Example rigid , flexible , glass , etc.
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.2Hitachi ULSI Systems Co .,Ltd.Advanced Materials Technology
TEG wafer and chips for Assembly technology
4.Bumping serviceウエハへのバンプ加工試作を承ります。
We supply the bump processing to the wafer.
可選擇附加bump製程。
・Bump Material:Solder bump(Sn/Ag, Sn/Ag/Cu), Cu pillar, etc.
量産製品のためのバンプ加工技術立ち上げをお手伝い致します。
We support the bump processing technique for mass production
products of the customer.
我們提供的bump製程, 皆為量產標準。
製品量産時は、弊社協力工場が承ります。
Our cooperation factory supports
the product mass production.
本公司之協力產商, 亦有量產規模已久,
確保優秀的製程品質。
5.Wafer thinning & dicingWe supply the wafer thinning , dicing.
Si
T-SiO2 500nm
SiN 400nmTEOS 700nm
PI 4μm
Bump Hight15μm
UBM(Ti/Cu)
Al-0.5%Cu 800nmTiN 100nm
Bump size φ20μm 40μm pitch solder bump (example)
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.3Hitachi ULSI Systems Co .,Ltd.
[ TEG 0_WB ]
Advanced Materials Technology
・Wafer Size :φ8inch・Chip Size : 2.34mm sq.・Pad Metal : AL-0.5%Cu・Pad Pitch : 130um(108pads/chip)・Pad Size : 80um sq.・Top Passivation:PI or SiN
Si
T-SiO2TiN
AL-0.5%Cu
PI
TEOS+SiN
Cross section
Φ8inch Si wafer
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.4Hitachi ULSI Systems Co .,Ltd.
[ TEG11-80_WB ]
Advanced Materials Technology
・Wafer Size :φ8inch・Chip Size : 7.3mm sq.・Pad Metal : AL-0.5%Cu・Pad Pitch : 80um(328pads/chip)・Pad Size : 60um sq.・Top Passivation: PI or SiN
Si
T-SiO2TiN
AL-0.5%Cu
PI
TEOS+SiN
Cross section
Φ8inch Si wafer
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.5Hitachi ULSI Systems Co .,Ltd.
[ TEG200M_LF ]
Advanced Materials Technology
・Wafer Size :φ8inch・Chip Size : 5.02mm sq.・Bump Material: Sn-3Ag-0.5Cu(SAC305) etc.・Bump Pitch : 200um(22x22=484bumps/chip)・Bump Height : 74um・Bump Size :φ109um・Top Passivation :PI or SiN
Si
T-SiO2TiN
AL-0.5%Cu
PI
TEOS+SiN
Cross section
Solder Bump
Φ8inch Si wafer
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.6Hitachi ULSI Systems Co .,Ltd.
[ TEG150M_LF ]
Advanced Materials Technology
・Wafer Size :φ8inch・Chip Size :10.0mm sq.・Bump Material: Sn-3Ag-0.5Cu(SAC305) etc.・Bump Pitch : 150um(62x62=3,844bumps/chip)・Bump Height : 65um or 50um・Bump Size :φ92um・Top Passivation :PI or SiN
Si
T-SiO2TiN
AL-0.5%Cu
PI
TEOS+SiN
Cross section
Solder Bump
Φ8inch Si wafer
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.7Hitachi ULSI Systems Co .,Ltd.
[ TEG125M_LF ]
Advanced Materials Technology
・Wafer Size :φ8inch・Chip Size :10.0mm sq.・Bump Material: Sn-3Ag-0.5Cu(SAC305) etc.・Bump Pitch : 125um(74x74=5,476bumps/chip)・Bump Height : 50um・Bump Size :φ60um・Top Passivation :SiN
Cross section
Si
T-SiO2TiN
AL-0.5%Cu
TEOS+SiN
Solder Bump
Φ8inch Si wafer
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.8Hitachi ULSI Systems Co .,Ltd.
[ TEG100M_LF ]
Advanced Materials Technology
Φ300mm Si wafer・Wafer Size :φ300mm・Chip Size : 8.5mm sq.・Bump Material: Sn-Ag etc.・Bump Pitch : 100um(78x78=6,084bumps/chip)・Bump Height : 40um・Bump Size :φ47um・Top Passivation :PI or SiN
Cross section
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.9Hitachi ULSI Systems Co .,Ltd.Advanced Materials Technology
[ AXP-1C ] ・Wafer Size :φ12inch・Chip Size :15.0mm sq.・Bump Size :φ75um・Bump Pitch : 150,225,375um・Bump Height : 43um
15.0
15.0
150um pitchLattice
150um pitchStagger
225um pitchLattice
225um pitchLattice
375um pitchLattice
375um pitchLattice
Φ300mm Si wafer
150um pitch
φ75um
43um
10um
30um
Ni 3um
Cu
Solder
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.10Hitachi ULSI Systems Co .,Ltd.Advanced Materials Technology
[ AXP-II ] ・Wafer Size :φ12inch・Chip Size :15.0mm sq.・Bump Size :φ20um・Bump Pitch : 40,60,100um・Bump Height : 20um
15.0
15.0
40um pitchLattice
40um pitchStagger
60um pitchLattice
60um pitchLattice
100um pitchLattice
100um pitchLattice
Φ300mm Si wafer
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.11Hitachi ULSI Systems Co .,Ltd.
[ TEG 6_GB]
6_25
scribe center
scribe
cent
er
PHASE6_25
Bump Spec.
TEG 6_GB_20 TEG 6_GB_30
Chip size 15.1×1.6mm
Bump size 13×75μm 20×75μm
Bump pitch 20μm 30μm
Bump hight 13μm 15μm
Bump pitch
Bump width
※ TEG 6_GB_20 T.B.D.
Advanced Materials Technology
Si
T-SiO2
TiN+AL-0.5%Cu
TEOS+SiN
Gold electroplating bump
Cross section
Φ8inch Si wafer
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.12Hitachi ULSI Systems Co .,Ltd.Advanced Materials Technology
Φ8inch Si wafer[ Blanket wafer ]
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.13Hitachi ULSI Systems Co .,Ltd.Advanced Materials Technology
Φ300mm Si wafer[ Blanket wafer ]
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.14Hitachi ULSI Systems Co .,Ltd.
FR-5 Sub. Kit(for 125μm pitch FCP)
・Outline : 35mm sq.
・Material :MCL-E-679FG + ABF-13
・Regist Mat.:PSR4000 AUS703
・Pad surface : Ni/Au , Cu-OSP , Cu
[ KIT125M_BU ]
SIDE A
Advanced Materials Technology
Cross section
SIDE A KIT 125M_BU(125um pitch)
SIDE B KIT 150M_BU(150um pitch)
CORE MCL-E-679FG
ABF-13
ABF-13
PSR4000 AUS703
PSR4000 AUS703
Cu + Ni/Au
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.15Hitachi ULSI Systems Co .,Ltd.
[ KIT150M_BU ]
SIDE B
Advanced Materials Technology
FR-5 Sub. Kit(for 150μm pitch FCP)
・Outline : 35mm sq.
・Material :MCL-E-679FG + ABF-13
・Regist Mat.:PSR4000 AUS703
・Pad surface : Ni/Au , Cu-OSP , Cu
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.16Hitachi ULSI Systems Co .,Ltd.
Glass Sub. Kit(for 30μm pitch Chip On Glass)
・Outline : 52.55mm×24.0mm×0.7mmt
・Material :Non Alkali Glass
・Wire Metal:ITO , AL , Cu , Au etc.
[ KIT 6-30_COG ]
Advanced Materials Technology
Glass
Metal layer
Cross section
2014.11.10
JTEG & JKIT-rev15 2008.09.02
P.17Hitachi ULSI Systems Co .,Ltd.Advanced Materials Technology
Heater TEG chip with temperature-sensitive functionHT-TEG011.Characteristic points
This TEG has two metal-line.
・Heater line: 40Ω、Max. 2A
・Sensor line: 40Ω、for Temperature caribration
by Standard curve(Temperature vs Resistance)
2.TEG Specifications
・Outline : 5mm sq.
・Thikness : 0.4mmt
・Metal : Ti/Pt
・Material :Arumina
・Pad surface : Ti/Pt/Au
35
40
45
50
55
60
25 80 ℃ 119 ℃ 156 ℃
Standard curve(Temperature vs Resistance)
配線抵抗(Ω) Chip Layout
Ω
2014.11.10