7
IEEE TRANSACTIONS ON EDUCA TION, VOL. 50, NO. 3, AUGUST 2007 229 FFT Spectrum Analyzer Project for Teaching Digital Signal Processing With FPGA Devices Trini Sansaloni, Asun Pérez-Pascual, Vicente Torres, Vicenç Almenar, José F. Toledo, and Javier Valls  Abstract—This paper presents a course on digital signal pro- cess ing with eld- programmable gate arrays (FPGA) devi ces. The course int egr ate s two se par ate dis cip lines , digita l sig nal processing (DSP) and very large scale integration (VLSI) design, and focuses on the development of a sophisticated DSP design fro m simulation to xed- point imple menta tion. The stru ctur e and methodology used in the proposed course are oriented to the design and implementation of an fast Fourier transform (FFT) spectrum analyzer. This applic ation covers most topics included in a DSP course and gives better results that those obtained with typ- ical courses performing independent multiple simple experiments. The project is divided into modules that show specic learning necessities and determine the course contents and organization. Each laboratory part is dedicated to design and implements the block of the analyzer related to the theoretical content presented in the class. At the end of the course the students have designed all the pieces in the DSP project and have completed and veried the system. The used methodology enables students and engineers to understand and develop complex xed-point applications, looking for the best signal processing algorithms on hardware implemen- tations, and also results in more motivated and active students.  Index Terms—Arithmeti c, coord inate rota tion digita l com- puter (CORDIC), decimate lters, digital circuits, digital signal proc essi ng (DS ˛ P), dir ect digital synth esis (DDS), fast Four ier trans for m (FFT), eld- prog rammable gate arra ys (FPGA) im- plementat ion, logic desi gn, mixer , rea l-time appli catio ns, signa l processing, spectrum analyzer , windowing. I. INTRODUCTION T HE dig ital sig nal pro ces sin g (DSP) ind ust ry req uir es engineers capable of developing DSP solutions to appli- cations. Thus, DSP is an important component in a curriculum, especially when the real-time applications are physically im- pleme nted. Many curricula include sepa rate classes in both DSP alg ori thms and har dware imp lementations. Finding a choice which combines both skills in a DSP hardware course is not easy. Usually, digital signal processing courses focused on the implementation iss ues use DSP mic rop roc ess ors to implement the algorithms [1]–[8]. Hardware DSP courses are seldom employed because of lack of time and resources [9], [10]. However, with the development of eld-programmable gate arrays (FPGA) devices and software development tools, teaching most efcient hardware DSP algorithms from design Manuscript received April 5, 2006; revised March 21, 2007. T. Sansaloni, A. Pérez-Pascual, V. Torres, and J. Valls are with the De- partment of Electronics, Universidad Politécnica de Valencia, 46730 Grao de Gandia, Spain (e-mail: [email protected]). V. Alme nar is with the Depar tmen t of Communic ation s, Univ ersidad Poli téc- nica de Valencia, 46730 Grao de Gandia, Spain. J. F. Toledo is with the Electronics Engineering Department, Universidad Politécnica de Valencia, 46730 Grao de Gandia, Spain. Digital Object Identier 10.1109/TE.2007.90 0025 to implementation can be accomplished effectively [11]. By using FPGAs, students are given the opportunity to design and explore custom hardware implementations. A framework for teaching real-time digital signal processing with FPGAs is presented in [11]. However, two different envi- ronments are used: Matlab software for modeling the system and a hardware description language (HDL) for performing hardw are imple menta tion on FPGA. The two env ironme nts result in a nonfast prototyping system for teaching real-time DSP implementations. With the above issues in mind, a course on FPGA digital signal processing wa s introduced into the post- graduate curriculum. This course introduces the use of system generator (SG) [12] environment to model DSP projects. Its capability to model complex DSP systems and to transform the theoretical design into a nite precision xed-point system are two important reasons in this choice [13]. This fast system pro tot ypi ng too l all ows students to see the ef fec ts of the ir design decisions. This course, which empha sizes practical DSP aspects, is based on the development of a real-world project on FPGA devices. The design of a complex project is used to motivate stu den ts, to af rm cou rse conten ts, and to pro vid e gre ate r pro gre ss in tec hnical ski lls and abi lit ies tha t the tra dit ional laboratory practices used earlier in the same course. The fast Fourier transform (FFT) spectrum analyzer project has been chosen to relate all the topics in the syllabus and to put them into context: hardware architectures for DSP algo- rithms, arithmetic circuits, FPGA devices and their resources to implement DSP blocks, and software tools for fast system pro- totyping. Each of the blocks of this system is a good excuse to explain one of the modules in a DSP course and an excellent practice to develop in the laboratory. Other applications have been considered to be implemented; however, for DSP teaching purpose, the spectrum analyzer project is the best candidate. The rest of the paper is organized as follows. Section II presents the course details, their logistic, contents, and organ- iza tio n. Sec tio n III descri bes the ped ago gic al issues of the course (goals and methodology). Section IV is focused on the neces sary details to imple ment the FFT spec trum analyzer , in particular, its blocks and the required development tools. Finally, the evaluation data is addressed, and the conclusions are presented. II. COURSE DETAILS  A. Course Logistics This course is a postgraduate course taught by the Digital Communications Laboratory group within the Electronics En- gineering Department at Polytechnic University of Valencia, 0018-9359/$25.00 © 2007 IEEE

04287125

Embed Size (px)

Citation preview

Page 1: 04287125

7/28/2019 04287125

http://slidepdf.com/reader/full/04287125 1/7

Page 2: 04287125

7/28/2019 04287125

http://slidepdf.com/reader/full/04287125 2/7

Page 3: 04287125

7/28/2019 04287125

http://slidepdf.com/reader/full/04287125 3/7

Page 4: 04287125

7/28/2019 04287125

http://slidepdf.com/reader/full/04287125 4/7

Page 5: 04287125

7/28/2019 04287125

http://slidepdf.com/reader/full/04287125 5/7

Page 6: 04287125

7/28/2019 04287125

http://slidepdf.com/reader/full/04287125 6/7

Page 7: 04287125

7/28/2019 04287125

http://slidepdf.com/reader/full/04287125 7/7