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Analysis of Three Phases Four Wire Hysteresis

Current Controller for Unbalanced Loads Like

DC Motor and Diode Rectifier onDifferent Phases Using DSTATCOMD V N Ananth,

Member, IEEE, Electrical

and Electronics Engineering,

VITAM College ofEngineering,

Visakhapatnam, [email protected]

G V Nagesh Kumar,

Member, IEEE,Electrical and Electronics

Engineering,GITAM University,

Visakhapatnam, India

K V Ramana,Electrical and Electronics

Engineering,VITAM College ofEngineering,


S. Sai Kiran,Electrical and Electronics

Engineering,VITAM College ofEngineering,


B Rajesh

Electrical and

Electronics EngineerinVITAM College ofEngineering,


Abstract- Unbalanced and distorted loads create lot of

disturbances in source voltages and other neighboring loads.

The loads like light or computers are sensitive, they may flicker

or cause heat internally and may loses its life earlier. For

controlling unbalanced loads, custom power devices like

DSTATCOM, DVR and UPQC are most widely used. In this

analysis, in three phases, three different loads like resistor load,

diode rectifier load and DC motor load is placed. The resistor

load gives normal voltage and current, diode rectifier load

voltage and current which will distort voltage waveform and

DC motor load will distort both voltage and current

waveforms. In the analysis, these loads are considered with

different power ratings, so unbalanced voltages and currents

are produced. In this paper, DSTATCOM with hysteresis

controller is used for compensating unbalanced voltages and to

reduce total harmonic distortion (THD) in source voltage and

current.

Keywords- independent phase control scheme, unbalanced load,

DC motor load, diode rectifier load, hysteresis controller,

DSTATCOM, three phase four leg converter

I. I NTRODUCTION

Harmonics or voltage disturbances are introduces

into the system by diode or thyristor loads, arc furnaces or

motor type loads under certain conditions. Diode or thyristor

loads will make the transient turn on-off operations, during

such conditions voltage waveform also disturbs. The Dc

motor loads are special non-linear loads in which the AC

supply is converted into DC by thyristor switches. Duringrectification, rippled DC current and voltage surges are

formed in the same phase(s) where it was connected.

Reactive power is generated by diode or thyrsitor rectifier

loads and so total useful power (real power) gets decreased.

These harmonics are to be limited and to be filtered to make

the system behavior as per proposed operation and extensive

time working conditions. These filters help in making

disturbed sinusoidal voltage to be pure sinusoidal with total

harmonic distortion (THD) less than 5% as prescribed by

IEEE standards.With advancements in custom power devices like

DSTATCOM, Dynamic Voltage Regulator (DVR), and

Unified Power Quality Conditioner (UPQC) are designed as

active filters to mitigate harmonics and make voltage

waveform sinusoidal. DSTATCOM is a shunt device, DVR is

series and UPQC is combination of both DSTATCOM and

DVR connected near load to improve power factor, mitigate

harmonics and to regulate voltage sags and swells.

In [1], authors investigated the ride through

characteristic of STATCOM considering positive and

negative sequence components of voltage during

unsymmetrical fault and flicker and variable type loads. The

unbalanced load behavior was analyzed using 48 pulse [2

and 12 pulse [3] STATCOM. A simple Hardware based

STATCOM controller was implemented in [4] using

superposition principle and sequence components and

achieved a solution for risky over current mitigation.

Application of DSTATCOM for petrol extraction

type loads is shown in [5]. Application of DSTATCOM for

three phase three wire for fast acting DC link with hybrid AC

and DC loads is shown in [6], voltage unbalance mitigation

[7]. Different control algorithms like instant reactive power

theory (IRC) and synchronous reference frame (SRF) using

adalaine technique to extract reference currents [8], unified

approach like adaptive and extended Kalman filter technique

for flicker and unbalance voltage mitigations [9], bifurcation

theory for stability enhancement [10]. All these methods usethree phase three wire systems. Three phase four wire with

neutral current clamping methods are adopted in [11-17].

The paper is organized in four sections. The test

system under study is described in section II and Section III

gives block diagram representation of proposed algorithm

and digital simulation results using MATLAB is given in

section IV. Conclusion of work with and without

DSTATCOM is given followed by Appendix and references.

978-1-4799-2275-8/13/$31.00 ©2013 IEEE

2013 Annual IEEE India Conference (INDICON)

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II. TEST SYSTEM UNDER STUDY

The block diagram under study is given in Fig 1. In

this circuit, Rs and Xs refer to internal resistance and

inductance of source, with Vs as source voltage. It can be

observed that in each phase there are three independent loadsViz., in A-phase, a 1 diode rectifier with resistive (R) load,

in B-phase a series resistive-inductive (RL) load and in C-

phase a DC motor load. Neutral of star connected source and

load are connected as shown in Fig.1 and Fig.2. The

DSTATCOM is in shunt at point of common coupling (PCC),

with Rf and Lf as filter resistance and inductance. Cdc is

capacitance of voltage source converter (VSC) with voltage

across Cdc is Vdc. The 4 leg VSC consists of 4 legs with two

IGBTs in each leg as shown in Fig 2. In this, three legs

represent three phases and fourth leg is for neutral current

clamping.

A RL load will not distort waveforms and will have

linear voltage and current waveforms, a rectifier with DCmotor load makes source and load voltage and current

waveform distorted and a diode resistive load make current

waveform rippled DC rather sinusoidal. Hence these three

different loads make current waveforms a combination AC,

DC with different magnitudes as load ratings are different,

voltage waveform will be distorted and produces surges in

the phase containing diode R-load. Also with these loads

makes the source power factor very low which is also not

desired. The rating of loads, source and DSTACOM

parameters are given in Appendix

In this regard, a DSTATCOM is placed in shunt as

shown in Fig. 1 and 2; it has to be so designed to make source

voltage and current to be sinusoidal with minimum

interference to other loads connected near source or at PCC.

The total harmonic distortion (THD) has to be very low as

per standards.

Fig.1. Block diagram of unbalanced load with VSI

Fig.2 Sub-system of 3 Phase- 4 Leg IGBT Converter

III. DESIGN OF CURRENT COMPENSATION CONTROLLER

The control circuit of DSTATCOM is shown in Fig

3 and internal block diagram for getting load powers in each

phase i.e., PLa, PLb and PLc is given in Fig 4. The load

powers are passed through low pass filters (LPF) and then

average is taken. The error between reference DC voltage

(V and DC voltage across capacitor ( V is controlled by

using tuned PI controller to get compensated power by

DSTATCOM. The DSTATCOM is controlled in all three

phases independently. Motivation for independent phase

control scheme is given in references [18 and 19].

The general first transformed Clark’s transformation

coefficients 0αβ are obtained from as shown in equations

=

√ √ √ 1

0 √

√

(1a)

=

√ √ √ 1 0 √ √

(1b)

The power through the neutral (pn) and instantaneous rea

() and reactive (q) powers are represented as

= 0 00 0 (2)

The relation between load power in three phases and voltage

can be written as

+

)

=

(

+

_

(3a)

Therefore current flowing in A- phase is

Or =

_ (3b)

Based on equation 3b, Fig.3 control circuit for

single leg in block diagram form is shown. Based on current

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control action, switching is done; hence real powers are used

as reference rather reactive power compensation. In this

Vaalpha and V abeta are Clark’s coefficient derived from

generalized stationary frame of reference for A-phase. The

figure is shown for A-phase, the other two phase current

control switches can be adopted by using Ib and Ic in the

place of Ia.

The A-phase equations are written as

Sin( ωt)*220√ 2 =

Cos( ωt)*220√ 2 =

I La ( ωt* La )= I La ( ωt* La+

= = (4)

Similarly B-phase and C-phase will have a phase shift of

and in sine and cosine terms.

Fig.3 Control circuit of DSTATCOM for A-phase

The internal block diagram of real power generation circuit

for single phase (Pla) is shown in Fig.4.

Fig.4 Sub-system of real power generation for A-phase

In order to synchronize the current injected byDSTATCOM in same phase sequence to supply and load

phase sequence during distorting or abnormal conditions,

phase locked loop (PLL) is used. In this method, two

quadrant stationary frames of reference (alpha, beta) are used.

The reference current (I) is compared with A-phase current

(Ia) and from hysteresis current control technique, switches

S21 and S24 operates for A-phase. The remaining two

phases (B,C) are operated by comparing the respective phase

currents with reference currents. The neutral phase switching

is controlled by comparing neutral current with reference zero

(Amps) and based on error offset, the switches S11 and S12

operate respectively.

The major advantages of hysteresis controller

include dynamic load rejection disturbance, simple loop

design for current compensation, quiescent curren

compensation is and stability during abnormal conditions is

excellent. Based on nonlinear feedback current contro

technique hysteresis two level switch works, if the error

between reference and actual current value exceeds certain

band, switch operates as shown in Fig 5. This type o

hysteresis control helps in minimizing current through neutra

and makes current and there by voltage as nearly sinusoidal

as possible. Therefore it is having inherent advantages

compared to scalar or vector PWM controllers. Hence neutra

current is compensated and voltage is made balanced.

Fig.5 traditional hysteresis controller switch for single phase operation

IV. R ESULT ANALYSIS

The system in Fig. 1 is analyzed under two cases

case: A without DSTATCOM and case: B with DSTATCOM

and the performance is evaluated using SIMULINK.

Case: A- unbalanced load without DSTATCOM

The load voltage and current for unbalanced and

distorting loads is shown in Fig.6. The blue color graph is for

rectifier with R load, green color graph is for linear RL load

and red color graph is load with rectifier with DC motor. It

can be observed from the figure, diode rectifier is having DC

current and voltage is AC. Due to DC motor load, voltage is

having surges at both positive and negative peaks and curren

is also not purely sinusoidal. The RL load is a sensitive load

having current sinusoidal but voltage is distorted mainly due

to DC motor load. The Y-axis represents Load voltage and

current and X-axis is time in seconds.

Fig. 6 Load voltage and current waveforms for unbalanced loads withou

DSTATCOM

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The source voltage and current waveforms without

DSTATCOM is shown in Fig.7. Since source and loads are

connected in directly without any nodes, both look alike.

Fig.7 Source voltage and current for unbalanced loads without

DSTATCOM

The current flowing through the neutral is having 24Amps

peak-to-peak as shown in Fig.8. The neutral current which

has to be zero for an ideal system, it is having the value equal

to load current, therefore lot of energy is wasted.

Fig.8 neutral current due to unbalanced system operation without

STATCOM

The DC motor load waveforms are shown in Fig.9. This

figure include, motor armature current, electromagnetic

torque and armature voltage. Y axis represents magnitude andX-axis represents time in seconds.

Fig.9 DC motor parameters showing Armature current in Amps,

Electromagnetic Torque in Nm and Armature voltage in Volts.

It can be seen from Fig.9, that armature voltage is

having waveform like semi controlled rectifier. In the circuit,

a single phase diode rectifier is used to supply DC power

input to motor. It represents a non-linear load and its power

rating is different from other two phases, hence will behave

like unbalanced load. This load acts as an interface and

distorts voltage in linear RL load and hence due to sudden

switching operation, voltage surges in RL load are formed.

Fig.10 Total Harmonic Distortion (THD) of source voltage (left) and curren

for phase containing DC motor load

The phase containing DC motor load is having THD abou13% for voltage and 38% for current. As per IEEE and other

standard norms, the voltage THD has to be less than 5% and

current has to be less than 3% for safe operation of machine.

Hence it is aimed to control neutral current flow

balance unbalanced voltage due to unbalanced load, and

minimize surges due to non-linear loads, optimize load

current and to minimize THD of source voltage less than 5%

and current less than 3%. The THD for phase containing DC

motor is considered, the remaining two phases are having

THD about 11% for source voltage and 23% for curren

depending on load impedance value.

Case: B unbalanced load with DSTATCOM

The source and load voltage and current due to unbalanced

load after placing DSTACOM is shown in Fig.11 and in

Fig.12. It is clearly evident that both source and load

voltages surges are mitigated, and are made balanced and

sinusoidal.

Fig. 11 Source voltage and current for unbalanced loads with DSTATCOM

The current in source voltage is sinusoidal, but load

current is delivering as per load requirements. It can also be

seen that, load current is having smaller value than source

current. The excess current is for charging capacitor and wil

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deliver it when desired. It is not a waste current. It is also to

be noted that; maintaining unity power factor and balancing

voltage cannot be done simultaneously.

Fig.12 Load voltage and current for unbalanced loads with DSTATCOM

The injected voltage and current by DSATCOM is

shown in Fig.13, STATCOM current is sinusoidal and

voltage is discontinuous. The diode rectifier with resistor (R)load is waveform with blue color. Linear RL load is with

green color and DC motor rectifier load is with red color.

During the time when the waveform is away from sinusoidal,

the voltage is injected or absorbed by STATCOM to make

source and load voltages sinusoidal. Hence it is not having

sinusoidal output voltage.

Fig. 13 injected voltage and current for unbalanced loads by STATACOM

The DC voltage across the capacitor and neutral

current flowing in the fourth phase with STATCOM is shown

in Fig.14. It can be seen that voltage across capacitor is is

constant and having 228 volts and neutral current is

approximately zero amperes.

Fig.14 Voltage across DC capacitor and current through the neutral

Fig.15 Total Harmonic Distortion (THD) of source voltage (left) and currenfor phase containing DC motor load

The total harmonic distortion of phase containing

DC motor load with DSTATCOM controller for voltage is

4% and current is 0.17%. Hence for this type of system, if

DSTATCOM is used, harmonics can be reduced there by

system life time increases, eddy and hysteresis losses can be

reduced.

V. CONCLUSION

A new real power control technique for

compensating neutral current and to make source and load

voltages balanced was proposed. The controller is designed

based on stationary frame (alpha and beta) of reference and

hysteresis controller. The controller is simpler in design

compared to SVPWM or d-q frame based PWM controller

but still efficient in making source and load voltage

sinusoidal. It is based on individual phase control scheme, to

control independently all the three phases. Voltage surges and

neutral current are minimized. The advantages of this circuitis, no need to have external passive shunt inductance and

capacitance filters which adds extra cost, unfair operation

during faulty or sudden transient operations during load

switching’s. The proposed circuits can works efficiently

when load in single phase is made open circuited and the

other two phase loads are at rated value. It is also verified tha

(not shown in paper), even source fails to supply power to

load for some time; DSTATCOM can deliver power but little

decrease in voltage magnitude. It can still be maintained a

same potential if higher rating capacitor is chosen. Hence

such designed circuits can be adopted for practica

applications. It is found that THD of phase containing DC

motor load is 4% compared to the same system withoutDSTATCOM is 13%, whereas for current is 0.17% compared

to the same phase without THD is 38%. This controller

technique does not require shunt passive filters for harmonic

control due to load disturbances or controller disturbances.

APPENDIX

System parametersRated source voltage 240V (RMS Ph-Ph)

Supply frequency 60 (Hz)

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Source parameters 0.0184Ω and 18uHLoad parameters

A-ph: diode rectifier, 100 Ω

B-ph: 0.1Ω, 25mHC-ph: diode rectifier DC motor load

Ra, La= 2.581Ω and 0.028HRf, Lf= 281.3Ω and 156H

Field armature mutual inductance=0.9483HJ, B = 0.02215 kgm2, 0.002953 NmsCompensator parameters

Y-Δ transformer: 25kVA, 60Hz,

Primary: 240V, Rp=0.002 , Xp=0.08Secondary: 230, Rs=0.002 , Xs=0.08

Series filters: Rf=0.1 and Lf=3mHCdc = 8000uF, Vdc=230Volts

La= tan-1(0.6), Lb=tan-1(0.53), Lc=tan-1(0.86)

R EFERENCES

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[6] Mishra, M.K. ; Karthikeyan, K., “A Fast-Acting DC-Link VoltageController for Three-Phase DSTATCOM to Compensate AC andDC Loads”, IEEE Tran. Power Delivery, vol.24, no. 4, pp.2291-2299, Oct.2009.

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[8] Bhim Singh, Jitendra Solanki, “A Comparison of Control Algorithms forDSTATCOM”, IEEE Tran. Ind. Elec., vol. 56, no. 7, July 2009

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[14] Srinivas Bhaskar Karanki, Nagesh Geddada, Mahesh K. Mishra, BKalyan Kumar,”A DSTATCOM Topology With Reduced DC-Link VoltageRating for Load Compensation With Nonstiff Source”, IEEE Tran. PowerElec., vol. 27, no. 3, March 2012

[15] Bhim Singh, P. Jayaprakash, Sunil Kumar, D. P. Kothari“Implementation of Neural-Network-Controlled

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[16] Vincent George, Mahesh K. Mishra, “Design and Analysis of UserDefined Constant Switching Frequency Current-Control-Based Four-LegDSTATCOM”, IEEE Tran. Power Elec., vol. 24, no. 9, Sep. 2009

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