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C3PU: A 16-BIT SOFT-CORE PROCESSOR
(1) Lycée Toulouse-Lautrec, Toulouse, France (2) XV. gimnazija, Zagreb, Croatia (3) III. gimnazija, Osijek, Croatia (4) Ruđer Bošković Institute/Centre for Informatics and Computing, Zagreb, Croatia
Introduction
A processor is a small chip that can be found in electronic
devices whose job is to receive input and provide theappropriate output. The main goal of this project was to
design and implement a 16-bit soft-core CPU using FPGA
board and VHDL language. We designed all the
components of our CPU, and checked if they work
separately. We also defined our assembly language and
implemented two assemblers that translate our assembly
code to the CPUs machine code.
Simon Cossart(1), Filip Keri(2), Luka Kovač(3) and Ivan Sović(4)
FPGA board
Spartan 3-AN model
Chip
Power
Connection withthe computer
Example ofan output
Example ofan input
FPGAs are logic devices that contain configurable logic
blocks( CLBs ) and connections between them. CLBs can
perform any logic operation we want – we have to define
which one( unlike hard-core CPU, which isn’t so
reconfigurable ). Since we have many empty CLBs, we are
able to make a complex logic design such as CPU.
C3PU – how it works?
Memory( program+data )
RESETFETCH
DECODE
EXECUTE
Puts the zero valuein all the registers
Retrieves commands fromRAM on the address
from PC registerChecks the opcode
of retrieved commandPerforms the instruction
CPU’s finite state machine (pipeline)
ALU operations opcode
AND c = a and b 01001
OR c = a or b 01010
NOT c = not a 01100
XOR c = a xor b 01011
ADD c = a + b 01101
SUB c = a – b 01110
INC c = a + 1 00111
DEC c = a – 1 01100
ZERO c = 0 01111
Shifter operations opcode
SHL Shi ft1 b it to
the left
10000
SHR Shi ft1 b it to
the right
10001
ROTR Rotate 1 bit
to the right
10010
ROTL Rotate 1 bit
to the left
10011
Control
operations
NOP 00000
LOAD 0 00 01
MOV 00011
L OA DI 0 01 00
JMPI 00101
J MP CI 0 01 10
END 10110
Sample command: 00011_00000_001_010
Results
We made a code for our processor to make a Fibonacci
sequence. It was ran through the assembly, and then weput the machine code inthe memory of our C3PU.
assembly
Our simulation results showed us the expected sequence,
so we can say that our processor works.
Conclusion
We reached our goal in designing a soft-core CPU. The
simulation results proved that our processor works. In the
future we want to include I/O components to our design,
so our C3PU is more practical.
Acknowledgements
Authors would like to thank the Society for Out-of-Frame
Education, as well as the organizers and participants of
the Summer School of Science 2013 in Požega for
endorsing and supporting this project.
