Giao trinh vi xu ly 8051

7/30/2019 Giao trinh vi xu ly 8051

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KHOA CNG NGH IN TB MN IN T CNG NGHIP

GGIIOO TTRRNNHH

BBIINN SSOONN:: PPHHMM QQUUAANNGG TTRR

TP. H CH MINH6 - 2006


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GGIIOO TTRRNNHH VVII XXLL


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Chng 1: Gii thiu chung v b vi x l. Trng H Cng nghip Tp.HCM.

Giao trnh Vi x ly. 1 Bien soan: Pham Quang Tr

CHNG 1GII THIU CHUNG V B VI X L

I. S PHT TRIN CA CC B VI X L:

1. Th h 1 (1971 - 1973):c im chung ca cc vi x l th h ny: Bus d liu: 4 bit. Bus a ch: 12 bit. Cng ngh ch to: PMOS. Tc thc hin lnh: 10 60 s/lnh vi fCLOCK= 0,1 0,8 MHz.Mt s b vi x l c trng cho th h ny: 4040 (Intel), PPS-4 (Rockwell International),

2. Th h 2 (1974 - 1977):

c im chung ca cc vi x l th h ny:

Bus d liu: 8 bit. Bus a ch: 16 bit. Cng ngh ch to: NMOS hoc CMOS. Tc thc hin lnh: 1 8 s/lnh vi fCLOCK= 1 5 MHz.Mt s b vi x l c trng cho th h ny: 6502 (Mos Technology), 6800/6809 (Motorola),

8080/8085 (Intel), Z80 (Zilog),

3. Th h 3 (1978 - 1982):

c im chung ca cc vi x l th h ny: Bus d liu: 16 bit. Bus a ch: 20 - 24 bit. Cng ngh ch to: HMOS. Tc thc hin lnh: 0,1 1 s/lnh vi fCLOCK= 5 10 MHz.Mt s b vi x l c trng cho th h ny: 68000 / 68010 (Motorola), 8086 / 80186 / 80286

(Intel),

4. Th h 4 (1983 - nay):

c im chung ca cc vi x l th h ny: Bus d liu: 32 - 64 bit. Bus a ch: 32 bit. Cng ngh ch to: HCMOS. Tc thc hin lnh: 0,01 0,1 s vi fCLOCK= 20 100 MHz.Mt s b vi x l c trng cho th h ny: 68020 / 68030 / 68040 / 68060 (Motorola), 80386 /

80486 / Pentium (Intel),

II. S KHI CA MT H VI X L:

nh ngha h vi x l: Kh nng c lp trnh thao tc trn cc d liu m khng cn s can thip ca con

ngi.


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Kh nng lu tr v phc hi d liu.Tng qut, h vi x l gm: Phn cng (Hardware): cc thit b ngoi vi giao tip vi con ngi. Phn mm (Software): chng trnh x l d liu.

CPU (Central Processing Unit): n v x l trung tm.RAM (Random Access Memory): b nh truy xut ngu nhin.ROM (Read Only Memory): b nh ch c.Interface Circuitry: mch in giao tip.Peripheral Devices (Input): cc thit b ngoi vi (thit b nhp).Peripheral Devices (Output): cc thit b ngoi vi (thit b xut).Address bus: bus a ch.Data bus: bus d liu.Control bus: bus iu khin.

III. N V X L TRUNG TM:CPU ng vai tr ch o trong h vi x l, n qun l tt c cc hot ng ca h v thc hin

tt c cc thao tc trn d liu.

CPU l mt vi mch in t c tch hp cao. Khi hot ng, CPU c m lnh c ghi didng cc bit 0 v bit 1 t b nh, sau n s thc hin gii m cc lnh ny thnh dy cc xung iukhin tng ng vi cc thao tc trong lnh iu khin cc khi khc thc hin tng bc cc thaotc v t to ra cc xung iu khin cho ton h.


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IR (Instruction Register): thanh ghi lnh.PC (Program Counter / Instruction Pointer): b m chng trnh / con tr lnh.Instruction decode and control unit: n v gii m lnh v iu khin.ALU (Arithmetic and Logic Unit): n v s hc v logic.Registers: cc thanh ghi.

Tm li, khi hot ng CPU s thc hin lin tc 2 thao tc: tm np lnh v gii m thc

hin lnh. Thao tc tm np lnh:

- Ni dung ca thanh ghi PC c CPU a ln bus a ch (1).- Tn hiu iu khin c (Read) chuyn sang trng thi tch cc (2).- M lnh (Opcode) t b nh c a ln bus d liu (3).- M lnh c chuyn vo trong thanh ghi IR trong CPU (4).- Ni dung ca thanh ghi PC tng ln mt n v chun b tm np lnh k tip t b nh.

Thao tcgii m thc hin lnh:- M lnh t thanh ghi IR c a vo n v gii m lnh v iu khin.- n v gii m lnh v iu khin s thc hin gii m opcode v to ra cc tn hiu

iu khin vic xut nhp d liu gia ALU v cc thanh ghi (Registers).- Cn c trn cc tn hiu iu khin ny, ALU thc hin cc thao tc c xc nh.

Mt chui cc lnh (Opcode) kt hp li vi nhau thc hin mt cng vic c ngha c

gi l chng trnh (Program) hay phn mm (Software).IV. B NH BN DN:

B nh bn dn l mt b phn khc rt quan trng ca h vi x l, cc chng trnh v d liuu c lu gi trong b nh.

B nh bn dn trong h vi x l gm: ROM: b nh chng trnh lu gi chng trnh iu khin hot ng ca ton h thng. RAM: b nh d liu lu gi d liu, mt phn chng trnh iu khin h thng, cc

ng dng v kt qu tnh ton.


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S lc v cu trc v phn loi ROM RAM: ROM (Read Only Memory): b nh ch c, thng tin trong ROM s khng b mt i ngay

c khi ngun in cung cp cho ROM khng cn.- Cu trc ROM:

- Phn loi mt s loi ROM:o MROM (Mask ROM): ROM mt n.o PROM (Programmable ROM): ROM lp trnh c.o EPROM (Eraseable PROM): ROM lp trnh v xa c.

UV-EPROM (Ultra Violet EPROM): ROM xa bng tia cc tm. EEPROM (Electric EPROM): ROM lp trnh v xa bng tn hiu in. Flash ROM: ROM lp trnh v xa bng tn hiu in.

RAM (Random Access Memory): b nh truy xut ngu nhin (b nh ghi c), thng tintrong RAM s b mt i khi ngun in cung cp cho RAM khng cn..

- Cu trc RAM:

- Phn loi mt s loi RAM:o DRAM (Dynamic RAM): RAM ngo SRAM (Static RAM): RAM tnh

Cch xc nh dung lng b nh bn dn 8 bit s dng cho chip vi iu khin 8051 nh sau: Da vo s lng chn a ch:

Dung lng = 2N , vi N l s ng a ch ca b nh.

V d: B nh bn dn 8 bit c 10 ng a ch. Cho bit dung lng ca b nh l bao nhiu?N = 10 Dung lng = 210 = 1024 = 1 KB


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Da vo m s ca b nh:M s: XX YYYY XX: loi b nh

27: UV-EPROM 28: EEPROM61,62: SRAM 40,41: DRAM

YYYY: dung lng b nhDung lng = YYYY (Kbit) hoc Dung lng = YYYY / 8 (KB)

V d: B nh c m s 27256, dung lng ca b nh l bao nhiu ?27 B nhUV-EPROM256 Dung lng = 256 (Kbit) = 32 (KB)

V. CC THIT B NGOI VI (CC THIT B XUT NHP):

Mch in giao tip (Interface Circuitry) v cc thit b xut nhp hay thit b ngoi vi(Peripheral Devices) to ra kh nng giao tip gia h vi x l vi th gii bn ngoi. B phn giaotip gia bus h thng ca h vi x l vi cc th gii bn ngoi thng c gi l cng (Port). Nhvy ty theo tng loi thit b giao tip m ta c cc cng nhp (Input) ly thng tin t ngoi vo hv cc cng xut (Output) a thng tin t trong h ra ngoi.

Tng qut, ta c 3 loi thit b xut nhp sau: Thit b lu tr ln: bng t, a t, a quang, Thit b giao tip vi con ngi: mn hnh, bn phm, my in, Thit b iu khin / kim tra: cc b kch thch, cc b cm bin,

VI. H THNG BUS:

Bus l tp hp cc ng dy mang thng tin c cng chc nng. Vic truy xut thng tin timt mch in xung quanh CPU th n s dng 3 loi bus: bus a ch, bus d liu v bus iu khin.CPU s dng h thng bus ny thc hin cc thao tc c (READ) v ghi (WRITE) thng tin giaCPU vi b nh hoc cc thit b ngoi vi.

Bus a ch (Address bus):- chuyn ti thng tin ca cc bit a ch.- L loi bus 1 chiu (CPUMEM hay I/O).- xc nh b nh hoc thit b ngoi vi m CPU cn trao i thng tin.- xc nh dung lng b nh hoc ngoi vi m CPU c kh nng truy xut.

Bus d liu (Data bus):- chuyn ti thng tin ca cc bit d liu.- L loi bus 2 chiu (CPUMEM hay I/O).- xc nh s bit d liu m CPU c kh nng x l cng mt lc.

Bus iu khin (Control bus):-

chuyn ti thng tin ca cc bit iu khin (mi ng dy l mt tn hiu iu khinkhc nhau).- L loi bus 1 chiu (CPUMEM-I/O hoc MEM-I/O CPU).- iu khin cc khi khc trong h v nhn tn hiu iu khin t cc khi phi

hp hot ng.


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VII. VI X L VI IU KHIN:

phn bit b vi x l v b vi iu khin ta c th da trn cc yu t nh sau:

Yu t phn loiVi x l

(Microprocessor)Vi iu khin

(Microcontroller)CPU X X

ROM XRAM XMch giao tip ni

tipX

Mch giao tip songsong

X

Mch iu khin ngt X

Cu trc phn cng(Hardware

architecture)

Cc mch iu khinkhc

X

ng dng ln, tnhton phc tp

XCc ngdng

(Applications) ng dng nh, tnhton n gin

X

Cc kiu nh a ch Nhiu tCc c trng catp lnh

(Instruction setfeature)

di t d liu xl

Byte, Word, Double word,

Bit, Byte

VIII. MINH HA KIN TRC CA MT H VI IU KHIN:

WDT (Watch-Dog Timer): B nh thi Watch-Dog.OSC., OSC/N (Oscillator): B dao ng (N: h s chia tn).Timer: B nh thi.A/D (Analog/Digital): B bin i tn hiu tng t/s.SFRRegisters (Special Function Register): Cc thanh ghi chc nng c bit.RAMMemory: B nh d liu.


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ProgramMemory: B nh chng trnh.EEPROM: B nh EEPROM.I/OPorts: Cc port xut/nhp.InstructionDecoder: B gii m lnh.ALU: n v logic v s hc.Accumulator: Thanh ghi tch ly.ControlLogic: iu khin logic.ProgramCounter: B m chng trnh.Instructions/Addresses: Cc lnh / a ch.

IX. LA CHN B VI IU KHIN KHI THIT K:

C bn h vi iu khin thng dng trn th trng hin nay l: 68xxx ca Motorola, 80xxx caIntel, Z8xx ca Zilog v PIC16xxx ca Microchip Technology. Mi loi vi iu khin trn u c mttp lnh v thanh ghi ring nn chng khng tng thch ln nhau. Vy khi ta tin hnh thit k mt hthng s dng vi iu khin th ta cn da trn nhng tiu chun no? C ba tiu chn chnh:

Tiu chun th nht l: p ng yu cu tnh ton mt cch hiu qu v kinh t. Do vy,trc tin ta cn phi xem xt b vi iu khin 8 bit, 16 bit hay 32 bit l thch hp nht. Mt s tham s

k thut cn c cn nhc khi chn la l:o Tc : tc ln nht m vi iu khin h tr l bao nhiu.o Kiu IC: l kiu 40 chn DIP, QFP hay l kiu ng v khc (DIP: v dng hai hng

chn, QFP: v vung dt). Kiu ng v rt quan trng khi c yu cu v khng gian, kiu lp rp vto mu th cho sn phm cui cng.

o Cng sut tiu th: l mt tiu chun cn c bit lu nu sn phm dng pin hocin p li.

o Dung lng b nh ROM v RAM tch hp sn trn chip.o S chn vo/ra v b nh thi trn chip.o Kh nng d dng nng cao hiu sut hoc gim cng sut tiu th.o Gi thnh trn mt n v khi mua s lng ln. V y l vn c nh hng n gi

thnh cui cng ca sn phm. Tiu chun th hai l: C sn cc cng c pht trin phn mm, chng hn nh cc chng

trnh m phng, trnh bin dch, trnh hp dch v g ri. Tiu chun th ba l: Kh nng p ng v s lng hin ti cng nh tng lai. i

vi mt s nh thit k th tiu chun ny thm ch cn quan trng hn c hai tiu chun trn.


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Chng 2: Phn cng chip vi iu khin 8051. Trng H Cng nghip Tp.HCM.

Gio trnh Vi x l. 8 Bin son: Phm Quang Tr

CHNG 2PHN CNG CHIP VI IU KHIN 8051

I. TNG QUT:

1. Gii thiu chung:MCS-51 l h vi iu khin ca hng Intel. Vi mch tng qut ca h MCS-51 l chip 8051.

Chip 8051 c mt s c trng c bn sau:- B nh chng trnh bn trong: 4 KB (ROM).- B nh d liu bn trong: 128 byte (RAM).- B nh chng trnh bn ngoi: 64 KB (ROM).- B nh d liu bn ngoi: 64 KB (RAM).- 4 port xut nhp (I/O port) 8 bit.- 2 b nh thi 16 bit.- Mch giao tip ni tip.-

B x l bit (thao tc trn cc bit ring l).- 210 v tr nh c nh a ch, mi v tr 1 bit.- Nhn / Chia trong 4 s.

Ngoi ra, trong h MCS-51 cn c mt s chip vi iu khin khc c cu trc tng ng nh:

Chip ROM trong RAM trong B nh thi8031 0 KB 128 byte 28032 0 KB 256 byte 38051 4 KB PROM 128 byte 28052 8 KB PROM 256 byte 38751 4 KB UV-EPROM 128 byte 28752 8 KB UV-EPROM 256 byte 38951 4 KB FLASH ROM 128 byte 28952 8 KB FLASH ROM 256 byte 3

2. Cc phin bn ca chip vi iu khin 8051:2.1 B vi iu khin 8031:

8031 l mt phin bn khc ca h 8051. Chip ny thng c coi l 8051 khng c ROM trnchip. c th dng c chip ny cn phi b sung thm ROM ngoi cha chng trnh cn thit cho8031. 8051 c chng trnh c cha ROM trn chip b gii hn n 4KB, cn ROM ngoi ca8031 th c th ln n 64KB. Tuy nhin, c th truy cp ht b nh ROM ngoi th cn dng thmhai cng (Port 0 v Port 2) , do vy ch cn li c hai cng (Port 1 v Port 3) s dng. Nhm khc

phc vn ny, chng ta c th b sung thm cng vo/ra cho 8031.2.2 B vi iu khin 8052:

8052 l mt phin bn ca h 8051. 8052 c tt c cc thng s k thut ca 8051, ngoi ra cnc thm 128 byte RAM, 4KB ROM v mt b nh thi na. Nh vy, 8052 c tng cng 256 byteRAM, 8KB ROM v ba b nh thi.


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c tnh k thut 8031 8051 8052

ROM trn chip (KB) 0 4 8

RAM trn chip (byte) 128 128 256

B nh thi 2 2 3

Chn vo/ra 32 32 32

Cng ni tip 1 1 1

Ngun ngt 5 5 6

Nh bng thng s trn ta thy 8051 l mt trng hp ring ca 8052. Mi chng trnh vitcho 8051 u c th chy c trn 8052 nhng iu ngc li c th l khng ng.

2.3 B vi iu khin 8751:Chip 8751 ch c 4KB b nh UV-EPROM trn chip. s dng chip ny cn phi c thit b

lp trnh PROM v thit b xo UV-EPROM. Do ROM trn chip ca 8751 l UV-EPROM, nn cnphi mt khong 20 pht xo 8751 trc khi c lp trnh. V y l qu trnh mt nhiu thi giannn nhiu nh sn xut cho ra phin bn Flash ROM v UV-RAM.

2.4 B vi iu khin AT8951 ca Atmel Corporation:AT8951 l phin bn 8051 c ROM trn chip l b nh Flash. Phin bn ny rt thch hp cho

cc ng dng nhanh v b nh Flash c th c xa trong vi giy. D nhin l dng AT8951 cnphi c thit b lp trnh PROM h tr b nh Flash nhng khng cn n thit b xa ROM v b nhFlash c xa bng thit b lp trnh PROM. tin s dng, hin nay hng Atmel ang nghin cu

mt phin bn ca AT8951 c th c lp trnh qua cng COM ca my tnh PC v nh vy s khngcn n thit b lp trnh PROM.

K hiu ROM RAM I/O Timer Ngt Vcc S chn IC

AT89C51 4KB 128 32 2 5 5V 40

AT89LV51 4KB 128 32 2 5 3V 40

AT89C1051 1KB 64 15 1 3 3V 20

AT89C2051 2KB 128 15 2 5 3V 20

AT89C52 8KB 256 32 3 6 5V 40

AT89LV52 8KB 256 32 3 6 3V 40

2.5 B vi iu khin DS5000 ca Dallas Semiconductor:Mt phin bn ph bin khc na ca 8051 l DS5000 ca hng Dallas Semiconductor. B nh

ROM trn chip ca DS5000 l NV-RAM. DS5000 c kh nng np chng trnh vo ROM trn chiptrong khi n vn trong h thng m khng cn phi ly ra. Cch thc hin l dng qua cng COM


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ca my tnh PC. y l mt im mnh rt c a chung. Ngoi ra, NV-RAM cn c u vit l chophp thay i ni dung RAM theo tng byte m khng cn phi xa ht trc khi lp trnh nh b nhEPROM.

K hiu ROM RAM I/O Timer Ngt Vcc S chn IC

DS5000-8 8KB 128 32 2 6 5V 40

DS5000-32 32KB 128 32 2 6 5V 40

DS5000T-8 8KB 128 32 2 6 5V 40

DS5000T-32 32KB 128 32 2 6 5V 40

im c bit l cc chip c ch T theo sau k hiu 5000 c ngha l chip c thit kthm mt ng h thi gian thc (RTC: Real Time Clock) bn trong. Lu ng h thi gian thc RTChon ton khc vi b nh thi Timer. RTC to v lu gi thi gian ca ngy (gi/pht/giy) v ngythng (ngy/thng/nm) trn thc t ngay c khi khng c ngun cung cp.

2.6 B vi iu khin P89V51xx ca Philips Corporation:y l mt phin bn ci tin s dng CPU l b vi iu khin 80C51 vi nhiu tnh nng vt

tri: dung lng ROM/RAM trn chip rt ln, 3 Timer 16 bit + 1 Watch-dog Timer, 2 thanh ghi DPTR,8 ngun ngt, PWM (Pulse Width Modulator), SPI (Serial Peripheral Interface) v c bit l b nhchng trnh trn chip c tnh nng ISP (In-System Programming) v IAP (In-ApplicationProgramming),

II. CC CHN CA CHIP 8051:

1. S khi v chc nng cc khi ca chip 8051:


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- CPU (CentralProcessingUnit): n v x l trung tm tnh ton v iu khin qutrnh hot ng ca h thng.

- OSC (Oscillator): Mch dao ng to tn hiu xung clock cung cp cho cc khi trongchip hot ng.

- Interrupt control: iu khin ngt nhn tn hiu ngt t bn ngoi (INT0\, INT1\), tb nh thi (Timer 0, Timer 1) v t cng ni tip (Serial port), ln lt a cc tn hiu ngt ny n

CPU x l.- Other registers: Cc thanh ghi khc lu tr d liu ca cc port xut/nhp, trng thilm vic ca cc khi trong chip trong sut qu trnh hot ng ca h thng.

- RAM (RandomAccessMemory): B nh d liu trong chip lu tr cc d liu.- ROM (Read OnlyMemory): B nh chng trnh trong chip lu tr chng trnh

hot ng ca chip.- I/O ports (In/Out ports): Cc port xut/nhp iu khin vic xut nhp d liu di

dng song song gia trong v ngoi chip thng qua cc port P0, P1, P2, P3.- Serial port: Port ni tip iu khin vic xut nhp d liu di dng ni tip gia

trong v ngoi chip thng qua cc chn TxD, RxD.- Timer 0, Timer 1: B nh thi 0, 1 dng nh thi gian hoc m s kin (m

xung) thng qua cc chn T0, T1.- Bus control: iu khin bus iu khin hot ng ca h thng bus v vic di chuyn

thng tin trn h thng bus.- Bus system: H thng bus lin kt cc khi trong chip li vi nhau.

2. S chn v chc nng cc chn ca chip 8051:


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2.1. Port 0:- Port 0 (P0.0 P0.7) c s chn t 32 39.- Port 0 c hai chc nng:

Port xut nhp d liu (P0.0 - P0.7) khng s dng b nh ngoi. Bus a ch byte thp v bus d liu a hp (AD0 AD7) c s dng b nh

ngoi.

Lu :Khi Port 0 ng vai tr l port xut nhp d liu th phi s dng cc in tr ko lnbn ngoi.- ch mc nh (khi reset) th cc chn Port 0 (P0.0 - P0.7) c cu hnh lport xut

d liu. Mun cc chn Port 0 lmport nhp d liu th cn phi lp trnh li, bng cch ghi mc logiccao (mc 1) n tt c cc bit ca port trc khi bt u nhp d liu t port (vn ny c trnhby phn k tip).

- Khi lp trnh cho ROM trong chip th Port 0 ng vai tr l ng vo ca d liu (D0 D7)(xem sch H vi iu khin 8051 trang 333-352).

2.2. Port 1:- Port 1 (P1.0 P1.7) c s chn t 1 8.- Port 1 c mt chc nng:

Port xut nhp d liu (P1.0 P1.7) s dng hoc khng s dng b nhngoi.

- ch mc nh (khi reset) th cc chn Port 1 (P1.0 P1.7) c cu hnh lport xutd liu. Mun cc chn Port 1 lmport nhp d liu th cn phi lp trnh li, bng cch ghi mc logiccao (mc 1) n tt c cc bit ca port trc khi bt u nhp d liu t port (vn ny c trnhby phn k tip).

- Khi lp trnh cho ROM trong chip th Port 1 ng vai tr l ng vo ca a ch byte thp(A0 A7) (xem sch H vi iu khin 8051 trang 333-352) .


Port xut nhp d liu (P2.0 P2.7) khng s dng b nh ngoi. Bus a ch byte cao (A8 A15) c s dng b nh ngoi.

- ch mc nh (khi reset) th cc chn Port 2 (P2.0 P2.7) c cu hnh lport xutd liu. Mun cc chn Port 2 lmport nhp d liu th cn phi lp trnh li, bng cch ghi mc logiccao (mc 1) n tt c cc bit ca port trc khi bt u nhp d liu t port (vn ny c trnhby phn k tip).

- Khi lp trnh cho ROM trong chip th Port 2 ng vai tr l ng vo ca a ch byte cao (A8 A11) v cc tn hiu iu khin (xem sch H vi iu khin 8051 trang 333-352).


Port xut nhp d liu (P3.0 P3.7) khng s dng b nh ngoi hoc ccchc nng c bit.

Cc tn hiu iu khin c s dng b nh ngoi hoc cc chc nng c bit.- ch mc nh (khi reset) th cc chn Port 3 (P3.0 P3.7) c cu hnh lport xut

d liu. Mun cc chn Port 3 lmport nhp d liu th cn phi lp trnh li, bng cch ghi mc logiccao (mc 1) n tt c cc bit ca port trc khi bt u nhp d liu t port (vn ny c trnhby phn k tip).


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- Khi lp trnh cho ROM trong chip th Port 3 ng vai tr l ng vo ca cc tn hiu iukhin (xem sch H vi iu khin 8051 trang 333-352) .

- Chc nng ca cc chn Port 3:Bit Tn a ch bit Chc nng

P3.0 RxD B0H Chn nhn d liu ca port ni tip.

P3.1 TxD B1H Chn pht d liu ca port ni tip.P3.2 INT0\ B2H Ng vo ngt ngoi 0.

P3.3 INT1\ B3H Ng vo ngt ngoi 1.

P3.4 T0 B4H Ng vo ca b nh thi/m 0.

P3.5 T1 B5H Ng vo ca b nh thi/m 1.

P3.6 WR\ B6H iu khin ghi vo RAM ngoi.

P3.7 RD\ B7H iu khin c t RAM ngoi.

2.5. Chn PSEN\:- PSEN (ProgramStoreEnable): cho php b nh chng trnh, chn s 29.- Chc nng:

L tn hiu cho php truy xut (c) b nh chng trnh (ROM) ngoi. L tn hiu xut, tch cc mc thp.

PSEN\ = 0 trong thi gian CPU tm - np lnh t ROM ngoi.PSEN\ = 1 CPU s dng ROM trong (khng s dng ROM ngoi).

- Khi s dng b nh chng trnh bn ngoi, chn PSEN\ thng c ni vi chn OE\ caROM ngoi cho php CPU c m lnh t ROM ngoi.

2.6. Chn ALE:-

ALE (AddressLatchEnable): cho php cht a ch, chn s 30.- Chc nng: L tn hiu cho php cht a ch thc hin vic gii a hp cho bus a ch

byte thp v bus d liu a hp (AD0 AD7). L tn hiu xut, tch cc mc cao.

ALE = 0 trong thi gian bus AD0 - AD7 ng vai tr l bus D0 - D7.ALE = 1 trong thi gian bus AD0 - AD7 ng vai tr l bus A0 - A7.

- Khi lp trnh cho ROM trong chip th chn ALE ng vai tr l ng vo ca xung lp trnh(PGM\) (xem sch H vi iu khin 8051 trang 333-352).

Lu :6OSC

ALE

ff = c th dng lm xung clock cho cc mch khc.

fALE (MHz): tn s xung ti chn ALE.fOSC (MHz): tn s dao ng trn chip (tn s thch anh).

- Khi lnh ly d liu t RAM ngoi (MOVX) c thc hin th mt xung ALE b b qua(xem gin trang 38-39 sch H vi iu khin 8051).

2.7. Chn EA\:- EA (ExternalAccess): truy xut ngoi, chn s 31.- Chc nng:

L tn hiu cho php truy xut (s dng) b nh chng trnh (ROM) ngoi.


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L tn hiu nhp, tch cc mc thp.EA\ = 0 Chip 8051 s dng chng trnh ca ROM ngoi.EA\ = 1 Chip 8051 s dng chng trnh ca ROM trong.

- Khi lp trnh cho ROM trong chip th chn EA ng vai tr l ng vo ca in p lp trnh(Vpp = 12V 12,5V cho h 89xx; 21V cho h 80xx, 87xx) (xem sch H vi iu khin 8051 trang333-352).

Lu : Chn EA\ phi c ni ln Vcc (nu s dng chng trnh ca ROM trong) hoc nixung GND (nu s dng chng trnh ca ROM ngoi), khng bao gi c php b trng chn ny.2.8. Chn XTAL1, XTAL2:

- XTAL (Crystal): tinh th thch anh, chn s 18-19.- Chc nng:

Dng ni vi thch anh hoc mch dao ng to xung clock bn ngoi, cungcp tn hiu xung clock cho chip hot ng.

XTAL1 ng vo mch to xung clock trong chip. XTAL2 ng ra mch to xung clock trong chip.

Lu : MHz12fTYP ==== fTYP (MHz): tn s danh nh.

2.9. Chn RST:- RST (Reset): thit lp li, chn s 9.- Chc nng:

L tn hiu cho php thit lp (t) li trng thi ban u cho h thng. L tn hiu nhp, tch cc mc cao.

RST = 0 Chip 8051 hot ng bnh thng.RST = 1 Chip 8051 c thit lp li trng thi ban u.

Lu :Machineset Tt 2Re

OSC

Machine fT

12=

tRESET(s): thi gian reset. fOSC (MHz): tn s thch anh.TMACHINE(s): chu k my.


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V d: Xc nh chu k my v thi gian reset tng ng cho tng trng hp fOSC = 11,0592MHz,fOSC = 12MHz v fOSC = 16MHz.

Gii fOSC = 11,0592MHz TMACHINE = 1,085s v tRESET 2,17s. fOSC = 12MHz TMACHINE = 1s v tRESET 2s. fOSC = 16MHz TMACHINE = 0,75s v tRESET 1,5s

2.10. Chn Vcc, GND:- Vcc, GND: ngun cp in, chn s 40 v 20.- Chc nng:

Cung cp ngun in cho chip 8051 hot ng. Vcc = +5V 10% v GND = 0V.

III. CU TRC CC PORT XUT NHP CHIP 8051:

Kh nng fanout (s lng ti u ra) ca cc tng chn port chip 8051 l: Port 0: 8 ti TTL. Port 1: 4 ti TTL. Port 2: 4 ti TTL. Port 3: 4 ti TTL.

Lu : KhiPort 0 ng vai tr l port xut nhp th s khng c in tr ko ln bn trong do

ngi s dng cn thm vo in tr ko ln bn ngoi(xem Hnh III.1).

ch mc nh (khi reset) th tt c cc chn ca cc port (P0 P3) c cu hnh lport xutd liu.

Mun cc chn port ca chip 8015 lmport nhp d liu th ta cn phi c lp trnh li,bng cch ghi mc logic cao (mc 1) n tt c cc bit (cc chn) ca port trc khi bt u nhp dliu t port (vn ny c trnh by phn k tip).


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Cc chn trong cng mt port khng nht thit phi c cng kiu cu hnh (port xut hocport nhp). Ngha l trong cng mt port c th c chn dng nhp d liu, c th c chn dng xut d liu. iu ny l ty thuc vo nhu cu v mc ch ca ngi lp trnh.

Qu trnh ghi chn port (xut d liu ra chn port).

Qu trnh c chn port (nhp d liu t chn port).

Qu trnh c b cht (kim tra d liu ti chn port).


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Lu :Vic c d liu ca bt k mt port no c th cho ta hai gi tr khc nhau ty thucvo lnh m ta s dng c d liu t port (xem thm trong phn tp lnh). Xy ra hin tngkhng mong mun ny l do qu trnh c d liu ca chip 8051 gm hai qu trnh khc nhau: qutrnh c chn portv qu trnh c b cht.

o Qu trnh c chn port: Khi ta s dng cc lnh MOV, ADD, D liu nhnc sau khi thc hin qu trnh c l d liu hin ti cc chn port.

o Qu trnh c b cht: Khi ta s dng cc lnh ANL, ORL, XRL, CPL, INC,DEC, DJNZ, JBC, CLR bit, SETB bit, MOV bit. D liu nhn c sau khi thc hin qu trnh c ld liu hin ti cc b cht (l cc d liu c ghi ra port ti thi im trc bi qu trnhghi chn port), ch khng phi l d liu hin ti cc chn port. Cho nn, nu ti thi im thc hinqu trnh c m d liu ti cc chn port c b thay i i chng na th d liu c v cng khngc cp nht.

IV. T CHC B NH CA CHIP 8051:

- B vi x l c khng gian b nh chung cho d liu v chng trnh.

chng trnh v d liu nm chung trn RAM trc khi a vo CPU thc thi.

- B vi iu khin c khng gian b nh ring cho d liu v chng trnh.

chng trnh v d liu nm ring trn ROM v RAM trc khi a vo CPU thc thi.

- T chc b nh ca chip 8051:


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1. B nh trong:


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1.1. B nh chng trnh (ROM):- Dng lu tr chng trnh iu khin cho chip 8051 hot ng.- Chip 8051 c 4 KB ROM trong, a ch truy xut: 000H FFFH.

1.2. B nh d liu (RAM):- Dng lu tr cc d liu v tham s.- Chip 8051 c 128 byte RAM trong, a ch truy xut: 00H 7FH.- RAM trong ca chip 8051 c chia ra:

RAM a chc nng:

RAM nh a ch bit: cho php x l tng bit d liu ring l m khng nh hng n cc bit khc trong c byte.

Lu : Nu trong chng trnh khng s dng cc bit trong vng RAM nh a ch bit ny, tac th s dng vng nh 20H 2FH cho cc mc ch khc ca ta. Ngc li, ta phi vit chng trnhcn thn khi s dng vng nh 20H 2FH v nu s sut ta c th ghi d liu ln cc bit c s

dng.V d: Vit lnh lm cho 8 bit trong nh c a ch 20H thuc RAM ni c gi tr l 1 (xttrng hp a ch byte v a ch bit).


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Cc dy thanh ghi: cho php truy xut d liu nhanh, lnh truy xut n gin v ngn gn.

Bng s liu di y minh ha a ch ca cc nh trong mt dy v cc k hiu thanh ghiR0 R7 c gn cho tng nh trong dy tch cc.

Lu :o ch mc nh th dy thanh ghi tch cc (ang c s dng) l dy 0 v cc thanh

ghi trong dy ln lt c tn l R0 - R7. C th thay i dy tch cc bng cch thay i cc bit chndy thanh ghi RS1 v RS0 trong thanh ghi PSW (xem phn thanh ghi PSW).

o Nu chng trnh ca ta ch s dng dy thanh ghi u tin (dy 0) th ta c th s dngvng nh 08H 1FH cho cc mc ch khc ca ta. Nhng nu trong chng trnh c s dng cc dythanh ghi (dy 1, 2 hoc 3) th phi rt cn thn khi s dng vng nh t 1FH tr xung v nu s sutta c th ghi d liu ln cc thanh ghi R0 R7 ca ta.

V d 1: Quan h gia k hiu thanh ghi R4 vi cc nh c a ch tng ng trong dy thanhghi tch cc?

o Nu dy 0 tch cc: Thanh ghi R4 nh04H RAM ni.o Nu dy 1 tch cc: Thanh ghi R4 nh0CH RAM ni.o Nu dy 2 tch cc: Thanh ghi R4 nh14H RAM ni.o Nu dy 3 tch cc: Thanh ghi R4 nh1CH RAM ni.

V d 2: Khi chip 8051 thc hin lnh MOV R4, #1AH th gi tr 1AH s c np vo trong nh c a ch l bao nhiu thuc RAM ni. Xt tng ng cho tng trng hp dy thanh ghi tchcc lDy 0 vDy 3?


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1.3. Thanh ghi chc nng c bit (SFR):

Lu :o Khng c php c hay ghi d liu vo cc a ch SFR m n cha c ng k

(ngha l cc a ch SFR cha c t tn). V vic c hay ghi d liu vo cc ni ny c th lmpht sinh nhng hot ng khng mong mun v c th l nguyn nhn lm cho chng trnh ca takhng tng thch vi cc phin bn sau ca chip MCS-51 (c th cc phin bn cc a ch SFRny c s dng cho mt vi mc ch khc ).

o Ch c truy xut cc SFR bng kiu nh a ch trc tip (tuyt i khng sdng kiu nh a ch gin tip trong trng hp ny).

V d: Cho bit trc (R0)=90H. Vit lnh dng xut (ghi) gi tr 5AH ra Port1 nh sau (xemgii thch lnh trong Chng 3: Tp lnh ca 8051.):

S dng kiu nh a ch trc tip:MOV P1, #5AH hoc MOV 90H, #5AH

S dng kiu nh a ch gin tip:MOV @R0, #5AH SAI

iu ny khng hp l i vi chip 8051 v phng php nh a ch gin tip nh trnch s dng cho vng nh RAM ni. Trong khi RAM ni ca chip 8051 ch c 128 byte (00H 7FH), cho nn khi thc hin lnh ny n s tr v kt qu khng xc nh. (Lu : nu ta dng phinbn chip 8052 th s trnh c iu ny).

1.3.1. Thanh ghi A:

Thanh ghiA

Accumulator: thanh ghi tch luy

a ch byte: E0H

a ch bit: E0H - E7HCong dung: cha d lieu cua cac phep toan

ma vi ieu khien x ly

E7 E6 E5 E4 E3 E2 E1 E0E0H A

1.3.2. Thanh ghi B:

- Php nhn 2 s 8 bit khng du kt qu l s 16 bit. Byte cao cha vo thanh ghi B. Byte thp cha vo thanh ghi A.

- Php chia 2 s 8 bit thng s v s d l s 8 bit.


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Thng s cha vo thanh ghi A. S d cha vo thanh ghi B.

V d: Thc hin php tnh 12H x 2AH. Hi (A)=?, (B)=?

0

H21HA2x

4B

42F2 4 H

(A)(B)

(A) = F4H

(B) = 02H

V d: Thc hin php tnh A6H : 21H. Hi (A)=?, (B)=?

V d: Thc hin php tnh FDH : 0CH. Hi (A)=?, (B)=?

1.3.3. Thanh ghi t PSW:

- C CY (Carry Flag): c nh bo c nh/mn ti bit 7. CY = 0: nu khng c nh t bit 7 hoc khng c mn cho bit 7. CY = 1: nu c nh t bit 7 hoc c mn cho bit 7.

- C AC (Auxiliary Carry): c nh ph bo c nh/mn ti bit 3. AC = 0: nu khng c nh t bit 3 hoc khng c mn cho bit 3. AC = 1: nu c nh t bit 3 hoc c mn cho bit 3.

- C F0 (Flag 0): c zero c nhiu mc ch dnh cho cc ng dng khc nhau cangi lp trnh (d tr cho cc phin bn chip trong tng lai).


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- Bit RS0, RS1 (Register Select): bit chn dy thanh ghi cho php xc nh dy thanhghi tch cc (hay dy thanh ghi m cc thanh ghi c tn l R0-R7).

RS1 RS0 Dy thanh ghi R0 R70 0 Dy 0 00H 07H0 1 Dy 1 08H 0FH

1 0 Dy 2 10H 17H1 1 Dy 3 18H 1FH

- C OV (Overflow): c trn bo kt qu tnh ton ca php ton s hc (php ton cdu) c nm trong khong t -128 n +127 hay khng.

OV = 0: nu -128 kt qu +127. OV = 1: nu kt qu < -128 hoc kt qu > +127. Ni cch khc l: i vi php

cngth OV=1 nu c nh t bit 7 nhng khng c nh t bit 6 hoc nu c nh t bit 6 nhng khngc nh t bit 7. i vi php tr th OV=1 nu c mn cho bit 7 nhng khng c mn cho bit 6hoc nu c mn bit 6 nhng khng c mn bit 7.

- C P (Parity): c chn l bo s ch s 1 trong thanh ghi A l s chn hay s l ( trongchip 8051 s dng ch parity chn).

P = 0: nu s ch s 1 trong thanh ghi A l s chn (parity chn). P = 1: nu s ch s 1 trong thanh ghi A l s l (parity chn).

V d: Minh ha cch 8051 biu din s -5.Gii

Cc bc thc hin:B1: 0000 0101 Biu din s 5 dng nh phn 8 bit.B2: 1111 1010 Ly b 1.B3: 1111 1011 Ly b 2.

Vy s FBH l biu din s c du dng b 2 ca s -5.

V d: Minh ha cch 8051 biu din s -34H.Cc bc thc hin:

B1: 0011 0100 Biu din s 34H dng nh phn 8 bit.B2: 1100 1011 Ly b 1.B3: 1100 1100 Ly b 2.

Vy s CCH l biu din s c du dng b 2 ca s -34H.


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V d: Minh ha cch 8051 biu din s -128.Cc bc thc hin:

B1: 1000 0000 Biu din s -128 dng nh phn 8 bit.B2: 0111 1111 Ly b 1.B3: 1000 0000 Ly b 2.

Vy s 80H l biu din s c du dng b 2 ca s -128.

V d: Minh ha trng thi hot ng ca cc c CY, AC, OV v P khi thc hin php cng/trs hc hai gi tr vi nhau.

C nh (CY):Minh ha hot ng ca c CY trong trng hp CY = 1:

Xt c CY trong hai trng hp 7AH+28H v 9AH-5DH:

Xt c CY trong hai trng hp 95H+86H v 00H-A6H:

C nh ph (AC):Minh ha hot ng ca c AC trong trng hp AC = 1

7 B6 5 4 3 2 1 0

7 B6 5 4 3 2 1 0+

?

Kieu BINAC=1

H

H

H

H

L

L+

Kieu HEXAC=1

AC=17 B6 5 4 3 2 1 0

7 B6 5 4 3 2 1 0-

?Kieu BIN

AC=1H

H

H

H

L

L-

Kieu HEX


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Xt c AC trong hai trng hp 92H+28H v 4AH-E3H:

Xt c AC trong hai trng hp 7AH+59H v 97H-5DH:

C trn (OV):Minh ha hot ng ca c OV trong trng hp OV = 1

Xt c OV trong cc trng hp B3H+25H, BBH+C9H, BBH-96H v 4BH-F3H:

Xt c OV trong cc trng hp 53H+45H, 82H+BAH, 9AH-3EH v 66H-DAH:

C Parity (P):Xt c P trong cc trng hp (A)=45H, (A)=E7H, (A)=00H:


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V d: Xc nh ni dung cc nh thuc RAM ni ca on chng trnh sau:

V d: Xc nh ni dung cc nh thuc RAM ni ca on chng trnh sau:

1.3.4. Thanh ghi SP:

- Ngn xp l vng nh dng lu tr tm thi cc d liu.- i vi chip 8051 th vng nh c dng lm ngn xp c gi trong RAM ni.- s dng ngn xp th ta phi khi ng thanh ghi SP (ngha l np gi tr cho thanh

ghi SP)

vng nh ca ngn xp c a ch bt u: (SP)+1 v a ch kt thc:7FH.- Nu khng khi ng SP vng nh ca ngn xp c a ch bt u: 08Hv a chkt thc:7FH (ch mc nh).

Lu : Trong trng hp khng khi ng SP (ch mc nh) th dy thanh ghi 1 (v c thl dy 2 v dy 3) s khng cn hp l v khi vng nh ny c s dng lm ngn xp. iuny c ngha l nu ta s dng cc dy thanh ghi ny v lu tr d liu vo th c kh nng s bmt do tc ng ct d liu vo ngn xp ca cc lnh (PUSH, ACALL, LCALL, ).


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V d: Hy cho bit tm a ch ca vng nh ngn xp trong hai trng hp sau: (SP)=5FH v(SP)=49H.

Theo qui nh th vng nh ca ngn xp c a ch bt u: (SP)+1 v a ch kt thc:7FH.

Trng hp (SP)=5FH: tm a ch ca vng nh ngn xp l 60H - 7FH. Trng hp (SP)=49H: tm a ch ca vng nh ngn xp l 4AH - 7FH.

V d: Hy cho bit gi tr cn phi np cho thanh ghi SP vng nh ngn xp c tm a chtrong hai trng hp sau: 62H 7FH v 50H 7FH.

Theo qui nh th vng nh ca ngn xp c a ch bt u: (SP)+1 v a ch kt thc:7FH.

Trng hp 62H 7FH: gi tr cn np cho thanh ghi SP l 61H. Trng hp 50H 7FH: gi tr cn np cho thanh ghi SP l 4FH.

V d: Minh ha vng nh ngn xp trong trng hp khng khi ng SP (ch mc nh) vc khi ng SP (vi (SP) = 3FH).

Nu ngi s dng khng khi ng thanh ghi SP (ch mc nh) th: (xem hnh bndi, pha tri)

Stack

memory

Stackmemory

Nu ngi s dng mun vng nh ngn xp (ch ty nh) c tm a ch l 40H7FHth: (xem hnh bn trn, pha phi)

1.3.5. Thanh ghi DPTR:

Thanh ghiDPTR

Data Pointer Register: thanh ghi con tro d lieu

a ch byte: 83H va 82H

a ch bit: khong nh a ch bit

Cong dung: la thanh ghi 16 bit (DPH+DPL), cha a ch cua onh can truy xuat thuoc ROM (trong/ngoai) va RAM ngoai.

83H DPH

82H DPL


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V d: Khi ta mun truy xut (ghi/c) d liu t mt nh thuc RAM ngoi c a ch l0123H th ta phi lm sao np c gi tr 0123H vo thanh ghi DPTR v sau thc hin lnh truyxut MOVX (xem gii thch lnh trong Chng 3: Tp lnh ca 8051.).

(DPTR) = 0123H (DPH) = 01H v (DPL) = 23H

V d: Khi ta mun truy xut (c) byte m t mt nh thuc ROM trong c a ch l0ABCH th ta phi lm sao np c gi tr 0ABCH vo thanh ghi DPTR v sau thc hin lnh truyxut MOVC (xem gii thch lnh trong Chng 3: Tp lnh ca 8051.).

(DPTR) = 0ABCH (DPH) = 0AH v (DPL) = BCH

1.3.6. Thanh ghi port xut nhp:

Lu : Trong trng hp phn cng c s dng ROM hoc RAM bn ngoi th ta khng th s

dng Port 0 v Port 2 xut nhp d liu. V khi chip 8051 s s dng hai port ny xc nh ach v d liu cho b nh ngoi. Khi , ta ch c th s dng Port 1 v Port 3 xut nhp d liu.

ch mc nh (khi reset) th tt c cc chn ca cc port (P0 P3) c cu hnh lport xutd liu. Mun cc chn port ca chip 8015 lm port nhp d liu th ta cn phi c lptrnh li, bng cch ghi mc logic cao (mc 1) n tt c cc bit (cc chn) ca port trc khi bt unhp d liu t port.

V d 1: Hot ng xut (ghi) v nhp (c) d liu ti cc chn port (Port 0) ca chip 8051(xem hnh minh ha bn di).

Hnh pha tri: Minh ha trng thi hot ng ca port khi thc hin lnh xut(ghi) d liu ra Port 0 ca chip 8051.

Hnh pha phi: Minh ha trng thi hot ng ca port khi thc hin lnh nhp(c) d liu t Port 0 ca chip 8051.

10

10

00

11

P0.0P0.1P0.2P0.3P0.4P0.5P0.6P0.7

330

+VCC

WRITECAH

CPU - 8051

(P0)=CAH

Xuat gia tr CAH(11001010B) t chip

8051 ra Port 0.

10K

+VCC

39

38

37

36

35

34

33

32

LED sang LED tat

PORT 0

10

00

01

10

P0.0P0.1P0.2P0.3P0.4P0.5P0.6P0.7

READ92H

CPU - 8051

(P0)=92H

Nhap gia tr t Port 0vao chip 8051

10K

+VCC

39

38

37

36

35

34

33

32

Nhan SW Nha SW

PORT 0


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V d 2: on chng trnh di y s cu hnh cho Port 0 lm port nhp (c) d liu. Sau lin tc c d liu t port ny v gi d liu n Port 1 (xem gii thch lnh trong Chng 3:Tp lnh ca 8051.):

MOV P0, #0FFH ;Cu hnh P0 lm port nhp bng;cch ghi 1 vo tt c cc bit.

BACK:

MOV A, P0 ;c d liu t P0.MOV P1, A ;Gi d liu ra P1.SJMP BACK ;Lp li.

V d 3: on chng trnh di y s thc hin cc thao tc sau (xem gii thch lnh trongChng 3: Tp lnh ca 8051.):

Lin tc kim tra bit P1.2 cho n khi bit ny bng 1. Khi P1.2 =1, hy xut (ghi) gi tr 45H ra P0. Gi mt xung mc cao ti P1.3.

SETB P1.2 ;Cu hnh P1.2 lm ng vo.JNB P1.2, $ ;Kim tra lin tc nu P1.2 = 0.

MOV P0, #45H ; Xut gi tr 45H ra P0.SETB P1.3 ;a P1.3 ln cao ri a P1.3CLR P1.3 ;xung thp to xung.

1.3.7. Thanh ghi port ni tip:

(xem thm trongChng 5: Hot ng ca port ni tip.)


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1.3.8. Thanh ghi nh thi:

(xem thm trongChng 4: Hot ng ca b nh thi.)


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1.3.9. Thanh ghi ngt:

(xem thm trongChng 6: Hot ng ngt.)

1.3.10.Thanh ghi iu khin ngun:

(xem thm trongChng 5: Hot ng ca port ni tip.)

- Bit SMOD (Serial Mode) cho php tng gp i tc truyn d liu ni tip (tc baud) khi SMOD = 1.

- Bit GF1, GF0 (General Function) cho php ngi lp trnh dng vi mc ch ring(d tr cho cc phin bn chip trong tng lai).

- Bit PD (Power Down) dng qui nh ch ngun gim.- Bit IDL (Idle) dng qui nh ch ngh.


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Lu : H thng phi phc hi Vcc = 5V trc khi thot khi ch ngun gim.

2. B nh ngoi:- Chip 8051 cho ta kh nng m rng:

Khng gian b nh chng trnh ln n 64 KB. Khng gian b nh d liu ln n 64 KB.

- Khi s dng b nh ngoi: Port 0 bus a ch byte thp v bus d liu a hp (AD0-AD7). Port 2 bus a ch byte cao (A8-A15). Port 3 cc tn hiu iu khin (WR\, RD\).

- S khc nhau gia a hp v khng a hp bus a ch v bus d liu:

nhm lm gim s lng chn a ra ngoi chip gim kch thc ca chip.


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2.1. Kt ni v truy xut b nh chng trnh ngoi:


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2.2. Kt ni v truy xut b nh d liu ngoi:

S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6

Mot chu ky may Mot chu ky may

ALE

PSEN\

RD\

PORT 2

PORT 0 Data

PCH

Lenh DPL

DPH

PCL


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2.3. Gii m a ch:Nu ta trng hp ROM v RAM c kt hp t nhiu b nh c dung lng nh hoc c hai

giao tip vi chip 8051 th ta cn phi gii m a ch. Vic gii m a ch ny cng cn cho hu htcc b vi x l (xem thm trong Chng ph lc 1: Gii m a ch.).

V d nu cc ROM v RAM c dung lng 8KB c s dng th tm a ch m chip 8051qun l (0000H FFFFH) cn phi c gii m thnh tng on 8 KB chip c th chn tng ICnh trn cc gii hn 8KB tng ng: IC1: 0000H 1FFFH, IC2: 2000H 3FFFH,

IC chuyn dng cho vic to tn hiu gii m l 74HC138, cc ng ra ca IC ny ln lt cni vi cc ng vo chn chip CS\ tng ng ca cc IC nh cho php cc IC nh hot ng ( timt thi im ch c mt IC nh c php hot ng). Cn lu l do cc ng cho php IC nhhot ng ring l cho tng loi (PSEN\ cho b nh chng trnh, RD\ v WR\ cho b nh d liu) nn8051 c th qun l khng gian nh ln n 64KB cho ROM v 64KB cho RAM.


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2.4. Cc khng gian nh chng trnh v d liu gi nhau:


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V. HOT NG RESET:

Chn RST = 0 Chip 8051 hot ng bnh thng.Chn RST = 1 Chip 8051 c reset.

Lu :o hon tt qu trnh reset th chn RST phi mc cao ti thiu l 2 chu k my v sau

chuyn xung mc thp.o Ni dung ca RAM trong chip khng b nh hng bi hot ng reset.o Sau khi reset, vic thc thi chng trnh lun lun bt u vi tr u tin trong b nh

chng trnh:a ch 0000H.o Trng thi ca cc thanh ghi sau khi reset h thng:

B m chng trnh (PC) 0000H Thanh ghi A 00H Thanh ghi B 00H Thanh ghi PSW 00H Thanh ghi SP 07H Thanh ghi DPTR 0000H Port 0 Port 3 FFH Thanh ghi IP xxx00000B Thanh ghi IE 0xx00000B Cc thanh ghi nh thi 00H Thanh ghi SCON 00H Thanh ghi SBUF 00H Thanh ghi PCON (HMOS) 0xxxxxxxB Thanh ghi PCON (CMOS) 0xxx0000B

VI. PHN BI TP:

Bi 1: S dng mt vi mch 74138 v cc cng cn thit thit k mch gii m a ch to racc tn hiu chn chip tng ng cc vng a ch sau:

Tn hiu chnchip

Vng a ch c tnh truy xut

0CS 0000H - 3FFFH PSEN

1CS 4000H - 7FFFH PSEN

2CS 6000H - 7FFFH WR,RD

3CS 8000H - 87FFH RD

4CS 8800H - 8FFFH WR


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Bi 2: S dng mt vi mch 74138 v cc cng cn thit thit k mch gii m a ch to racc tn hiu chn chip tng ng cc vng a ch sau:

Tn hiu chnchip

Vng a ch c tnh truy xut

0CS 9800H - 9BFFH PSEN

1CS 9800H - 9BFFH WR,RD

2CS 9C00H - 9DFFH WR,RD

3CS 9E00H - 9EFFH WR,RD

Bi 3: Ch dng mt vi mch 74138 (khng dng thm cng), thit k mch gii m a ch tora mt tn hiu chn chip /CS tng ng tm a ch F000H-F3FFH.


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Chng 3: Tp lnh ca 8051. Trng H Cng nghip Tp.HCM.


CHNG 3TP LNH CA 8051

I. M U:

Khung dng tng qut ca mt dng lnh:

[LABEL:] MNEMONIC [OPERAND][,OPERAND] [;COMMENT]

o Nhn (Label): biu th a ch ca dng lnh (hoc d liu) theo sau, c dng trong trng tonhng ca lnh nhy, lnh r nhnh (SJMPAAA; ACALL BBB; CJNE A, #35H,LOOP; JNB P3.1, TEST_1).

Lu v nhn: Do ngi lp trnh t t (khng c trng vi t kho, m gi nh, ch dn, ton t

hoc k hiu tin nh ngha). Bt u bng k t ch, du chm hi (?), du gch di (_). Di ti a 31 k t. Kt thc bng du hai chm (:).

o M gi nh (Mnemonic): biu din cc m ca lnh hoc cc ch dn ca chng trnh dch hpng (M gi nh:ADD,SUBB,INC, ; Ch dn: ORG,EQU,DB, ).

o Ton hng (Operand): cha a ch hoc d liu m lnh s s dng. S lng ton hng trong mtdng lnh ph thuc vo tng dng lnh (RET khng ton hng,INC A mtton hng,ADD A, R0 hai ton hng, CJNE A, #12H, ABC ba ton hng).

Lu v ton hng: trong cc lnh c 2 ton hng th ton hng u tin cn c gi lton hng ch (Destination), ton hng th hai cn c gi l ton hng ngun (Source).

o Ch thch (Comment): lm cho r ngha cho chng trnh. Cc ch thch phi nm trn cng mtdng v bt u bng du chm phy (;). Cc ch thch nu nm trn nhiu dngth mi dng cng phi bt u bng du chm phy (;).

Lu : Chi tit v phn ny xem thm ti Chng 7: Lp trnh hp ng trong sch Hvi iu khin Tng Vn On.


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II. CC KIU NH A CH (ADDRESSING MODE):

1. nh a ch thanh ghi (Register Addressing):

c dng truy xut d liu trong cc thanh ghi t R0 n R7. S byte ca lnh: 1 byte. Cu trc lnh: V d:ADD A, R5 Lnh cng ni dung thanh ghi A vi ni dung thanh ghi R5. (Gi s:

(A)=05H, (R5)=9AH).

M lnh:

M t lnh:

Ngoi ra, mt s trng hp c bit kiu nh a ch ny cng dng truy xut d liu trongcc thanh ghi nh: thanh ghi cha A, thanh ghi con tr d liu DPTR, thanh ghi b m chngtrnh PC, c nhC v cp thanh ghi AB.

V d: INC A Lnh tng ni dung thanh ghi A.INC DPTR Lnh tng ni dung thanh ghi DPTR.

2. nh a ch trc tip (Direct Addressing):

c dng truy xut d liu trong cc nh (00H - FFH) hay trong cc thanh ghi (A, B,P0P3, DPH, DPL,) ca b nh bn trong chip.

S byte ca lnh: 2 byte. Cu trc lnh:


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V d: ADD A, P1ADD A, 90H Lnh cng ni dung thanh ghi A vi ni dung thanh ghiport 1 hay nh 90H. (Gi s: (A) = 05H, (P1) = (90H) = 9AH).

M lnh:

M t lnh:

3. nh a ch gin tip (Indirect Addressing):

c dng truy xut d liu trong cc nh gin tip ca b nh bn trong chip. Ccthanh ghi R0 v R1 c dng cha a ch ca cc nh gin tip (00H - FFH) trong chip.Lu rng, trc cc thanh ghi R0, R1 cn phi c du @.

S byte ca lnh: 1 byte. Cu trc lnh: V d:ADD A, @R0 Lnh cng ni dung thanh ghi A vi ni dung nh c a ch cha

trong thanh ghi R0. (Gi s: (A) = 05H, (R0) = 3BH, (3BH) = 9AH).

M lnh:

M t lnh:4. nh a ch tc thi (Immediate Addressing):

c dng truy xut mt hng s (gi tr bit trc) thay v l mt bin (gi tr khng bittrc) nh cc kiu nh a ch trn. Lu rng, trc d liu tc thi cn phi c du #.Ch nh a ch tc thi c th dng np d liu vo mi nh v thanh ghi bt k (ivi thanh ghi 8 bit: #00H - #0FFH, i vi thanh ghi 16 bit: #0000H - #0FFFFH).

S byte ca lnh: 2 byte. Cu trc lnh: V d: ADD A, #9AH Lnh cng ni dung thanh ghi A vi gi tr 9AH. (Gi s: (A) = 05H).

M lnh:

M t lnh:


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5. nh a ch tng i (Relative Addressing):

c s dng cho cc lnh nhy. a ch tng i (hay offset) l mt gi tr 8 bit c du. Tm nhy gii hn l: -128 byte 127 byte t v tr ca lnh tip theo sau lnh nhy. S byte ca lnh: 2 byte. Cu trc lnh: V d 1:SJMP AAA Lnh nhy n nhn AAA (Gi s: nhn AAA t trc lnh a ch

0107H, lnh SJMP nm trong b nh ti a ch 0100H v 0101H).

M lnh:

M t lnh:xem hnh 3.5.2.1.

V d 2:SJMP AAA

Lnh nhy n nhn AAA (Gi s: nhn AAA t trc lnh a ch203BH, lnh SJMP nm trong b nh ti a ch 2040H v 2041H).

M lnh:

M t lnh:xem hnh 3.2.5.2.

6. nh a ch tuyt i (Absolute Addressing):

c s dng cho cc lnh ACALL v AJMP. a ch tuyt i l mt gi tr 11 bit. Tm nhy gii hn l: trong cng trang 2K hin hnh (trang 2K cha lnh nhy). S byte ca lnh: 2 byte. Cu trc lnh:


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V d:AJMP AAA Lnh nhy n nhn AAA (Gi s: nhn AAA t trc lnh a ch0F46H, lnh AJMP nm trong b nh ti a ch 0900H v 0901H).

M lnh:

M t lnh:

0FFFH2K trang 31FFFFH

F800H

2K trang 2

2K trang 1

2K trang 0

F800H

1800H17FFH

1000H0FFFH

0800H07FFH

0000H

32 x 2K(64K)

Ban o nh 64K c chia thanh32 trang 2K

0F46H

46H0901HE1H0900H

0800H

AJMP AAA

AAA

2K trang 1

A15 A11A10 A0

5 bit xac nh

trang 2K

11 bit xac nh a ch trong

1 trang 2K

Cachthanh lap

a ch cuanhan senhay ti

T 5 bit (A15...A11)trong thanh ghi PC

T 11 bit (A10...A0) tronglenh nhay

7. nh a ch di (Long Addressing):

c s dng cho cc lnh LCALL v LJMP. a ch di l mt gi tr 16 bit. Tm nhy gii hn l: ton b khng gian nh 64K. S byte ca lnh: 3 byte. Cu trc lnh:


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V d:LJMP AAA Lnh nhy n nhn AAA (Gi s: nhn AAA t trc lnh a chA209H, lnh LJMP nm trong b nh ti a ch 0100H, 0101H v 0102H).

M lnh:

M t lnh:

FFFFH

A209H

09H0102HA2H0101H

0000H

LJMP AAA

AAA

64K

12H0100H

8. nh a ch ch s (Indexed Addressing):

c dng trong cc ng dng cn to cc bng nhy hay cc bng tm kim. Kiu nh a chny dng mt thanh ghi nn (PChay DPTR) kt hp vi mt offset(A) to thnh dng a

ch hiu dng cho lnh. S byte ca lnh: 1 byte. Cu trc lnh:

V d:JMP @A+DPTR Lnh nhy gin tip.


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III. TP LNH CA 8051 (8051 INSTRUCTION SET):

Mt s k hiu dng trong lnh:Rn a ch thanh ghi s dng (R0 R7).direct a ch trc tip ca mt byte trong RAM ni (00H-FFH)@Ri a ch gin tip s dng (R0 hoc R1).source Ton hng ngun (Rn, direct hoc @Ri).dest Ton hng ch (Rn, direct hoc @Ri).#data Hng s 8 bit (#00H - #0FFH).#data16 Hng s 16 bit (#0000H - #0FFFFH).bit a ch trc tip ca mt bit (a ch bit).rel Offset8 bit c du.addr11 a ch 11 bit.addr16 a ch 16 bit. c thay th bi ( ) Ni dung ca (( )) Ni dung c cha bi rrr Thanh ghi ca dy thanh ghi (000 = R0, 001 = R1, , 111 = R7).i a ch gin tip s dng R0 (i = 0) hoc R1 (i = 1).dddddddd Cc bit d liu.aaaaaaaa Cc bit a ch.

eeeeeeee a ch tng i.Mt s lu khi lp trnh b vi iu khin 8051:

thng bo l mt gi tr tc thi th cn phi t thm k hiu # vo trc gi tr .Nu khng c k hiu # th gi tr c hiu l a ch ca nh.

MOV A, #12H ;Np gi tr 12H vo thanh ghi A.MOV A, 12H ;Sao chp ni dung ca nh c a

;ch 12H vo thanh ghi A.

y ta cng nn lu rng nu thiu k hiu # th lnh trn cng khng gy ra li trong qutrnh bin dch. V trnh dch hp ng cho l mt lnh hp l. Tuy nhin, kt qu lp trnh s khngng nh mun ca ngi lp trnh.

Cc gi tr tc thi nu c thnh phn ch (A, B, C, , F) ng u th cn phi thm s 0 votrc thnh phn ch v sau k hiu #. Vic ny bo rng thnh phn ch l mt s HEX chkhng phi l mt k t.

MOV A, #BH ;Thiu s 0 gy li khi bin dch.MOV A, #0BH ;Thm s 0 ng.MOV A, #F9H ;Thiu s 0 gy li khi bin dch.MOV A, #0F9H ;Thm s 0 ng.


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y ta cng nn lu rng vic thiu s 0 thm vo ny s gy li trong qu trnh bin dchi vi cc chng trnh bin dch c. Ngy nay, mt s phn mm bin dch h tr vic ny. iuny c ngha l ta c th thm hay khng thm s 0 vo th u khng nh hng g n qu trnh bindch (khng gy ra li khi bin dch).

Trong lnh, cc gi tr tc thi hay a ch ca nh c th c biu din di bt k dng noBIN (nh phn), DEC (thp phn) hay HEX (thp lc phn).

o a ch nh: cc cu lnh sau y l tng ng nhau:MOV A, 64H ;Sao chp ni dung ca nh c a;ch 64H vo thanh ghi A.

MOV A, 100 ;Sao chp ni dung ca nh c a;ch 64H vo thanh ghi A.

MOV A, 01100100B ;Sao chp ni dung ca nh c a;ch 64H vo thanh ghi A.

o Gi tr tc thi: cc cu lnh sau y l tng ng nhau:MOV A, #0C9H ;Np gi tr C9H vo thanh ghi A.MOV A, #201 ;Np gi tr C9H vo thanh ghi A.MOV A, #11001001B ;Np gi tr C9H vo thanh ghi A.

Lu cc hu t i km tng ng cho tng dng: B dng BIN (nh phn), H dng HEX(thp lc phn), D hoc khng c hu t dng DEC (thp phn).

Chuyn mt gi tr tc thi hay a ch ca nh ln hn kh nng cha ca mt thanh ghi ths gy ra li (00H-FFH: cho thanh ghi hoc nh 8 bit; 0000H-FFFFH: cho thanh ghi 16 bit -DPTR).

MOV A, #123H ;Khng hp l v 123H > FFH.MOV A, #214 ;Hp l v 214 (D6H) < FFH (255).MOV A, #0F2H ;Hp l v F2H < FFH.MOV A, 123H ;Khng hp l v 123H > FFH.MOV A, 200 ;Hp l v 200 (C8H) < FFH (255).

MOV DPTR, #123H ;Hp l v 123H < FFFFH (16 bit).1. Nhm lnh s hc:

1.1. Lnh ADD A, :

Chc nng: Cng (Add). M t: ADD cng ni dung ca thanh ghi A (A) vi ni dung ca mt byte c a ch

c ch ra trong lnh (src- byte) v t kt qu vo thanh ghi A. Cc c b nhhng.

o CCY = 1 nu c s nh t bit 7. Ngc li CY = 0.o CAC = 1 nu c s nh t bit 3. Ngc li AC = 0.o COV = 1 nu c s nh t bit 6 nhng khng c s nh t bit 7 hoc

nu c s nh t bit 7 nhng khng c s nh t bit 6. Ngc li OV = 0.o Khi cng hai s nguyn khng du v c du:

S khng du: CY = 1 Php ton c nh. S c du: CY = 1 S dng = S m + S m.

S m = S dng + S dng.


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Cc dng lnh:ADD A, Rn

S byte 1S chu k 1M i tng 00101rrrHot ng (A) (A) + (Rn)

ADD A, directS byte 2S chu k 1M i tng 00100101 aaaaaaaaHot ng (A) (A) + (direct)

ADD A, @RiS byte 1S chu k 1M i tng 0010011i

Hot ng (A)

(A) + ((Ri))ADD A, #dataS byte 2S chu k 1M i tng 00100100 ddddddddHot ng (A) (A) + #data

V d: Cho bit trc (A)=C3H, (R0)=47H, (P1)=(90H)=AAH, (47H)=D2H.Sau khi thc thi lnh ADD A, R0 th:

(A)=0AH, CY=1, AC=0, OV=0

Sau khi thc thi lnh ADD A, 90H hay ADD A, P1 th:(A)=6DH, CY=1, AC=0, OV=1

Sau khi thc thi lnh ADD A, @R0 th:(A)=95H, CY=1, AC=0, OV=0

C3HA

47HR0C3H + D2H = 95H

ADD A, @R0

D2H47H95HA


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Sau khi thc thi lnh ADD A, #4EH th:(A)=11H, CY=1, AC=1, OV=0

1.2. ADDC A,

Chc nng: Cng c c nh (Add with Carry). M t: ADDC cng ng thi ni dung ca thanh ghi A (A) vi ni dung ca byte c a

ch c ch ra trong lnh (src-byte) v c nh (CY), t kt qu vo thanh ghi A.Cc c b nh hng.

o CCY = 1 nu c s nh t bit 7. Ngc li CY = 0.o CAC = 1 nu c s nh t bit 3. Ngc li AC = 0.o COV = 1 nu c s nh t bit 6 nhng khng c s nh t bit 7 hoc

nu c s nh t bit 7 nhng khng c s nh t bit 6. Ngc li OV = 0.

o Khi cng hai s nguyn khng du v c du: S khng du: CY = 1 Php ton c nh. S c du: CY = 1 S dng = S m + S m.

S m = S dng + S dng.

Cc dng lnh:ADDC A, Rn

S byte 1S chu k 1M i tng 00110rrrHot ng (A) (A) + (C) + (Rn)

ADDC A, directS byte 2S chu k 1M i tng 00110101 aaaaaaaaHot ng (A) (A) + (C) + (direct)

ADDC A,@RiS byte 1S chu k 1M i tng 0011011iHot ng (A) (A) + (C) + ((Ri))

ADDC A, #dataS byte 2S chu k 1M i tng 00110100 ddddddddHot ng (A) (A) + (C) + # data


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V d: Cho bit trc (A)=C3H, (R0)=47H, (P1)=(90H)=AAH, (47H)=D2H v c CY=1.Sau khi thc thi lnh ADDC A, R0 th:

(A)=0BH, CY=1, AC=0, OV=0

C3HA

47HR0C3H + 47H + 1H = 0BH

ADDC A, R0

0BHA

CY

Sau khi thc thi lnh ADDC A, 90H hay ADDC A, P1 th:

(A)=6DH, CY=1, AC=0, OV=1

Sau khi thc thi lnh ADDC A, @R0 th:(A)=96H, CY=1, AC=0, OV=0

Sau khi thc thi lnh ADDC A, #4EH th:(A)=11H, CY=1, AC=1, OV=0

C3HA

4EHC3H + 4EH + 1H = 12H

ADDC A, #4EH

12HA

1.3. SUBB A,

Chc nng: Tr c s mn (Subtract with Borrow). M t: SUBB tr ni dung ca thanh ghi A (A) vi ni dung ca byte c a ch c ch

ra trong lnh (src-byte) cng vi c nh v ct kt qu vo thanh ghi A. Cc c bnh hng.

o CCY = 1 nu c s mn cho bit 7. Ngc li CY = 0.o CAC = 1 nu c s mn cho bit 3. Ngc li AC = 0.o COV = 1 nu c s mn cho bit 6 nhng khng c s mn cho bit 7

hoc nu c s mn cho bit 7 nhng khng c s mn cho bit 6. Ngc

li OV = 0.o Khi cng hai s nguyn khng du v c du:

S khng du: CY = 1 Php ton c mn. S c du: CY = 1 S dng = S m - S dng.

S m = S dng - S m.


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Cc dng lnh:SUBB A, Rn

S byte 1S chu k 1

M i tng 10011rrrHot ng (A) (A) (C) (Rn)

SUBB A, directS byte 2S chu k 1

M i tng 10010101 aaaaaaaaHot ng (A) (A) (C) (direct)

SUBB A, @RiS byte 1S chu k 1

M i tng 1001011i

Hot ng (A)

(A) (C) ((Ri))SUBB A, #dataS byte 1S chu k 1

M i tng 100110100 ddddddddHot ng (A) (A) (C) #data

V d: Cho bit trc (A)=83H, (R0)=78H, (P1)=(90H)=AAH, (78H)=C5H v c CY=1.Sau khi thc thi lnh SUBB A, R0 th:

(A)=0AH, CY=0, AC=1, OV=1

Sau khi thc thi lnh SUBB A, 90H hay SUBB A, P1 th:(A)=D8H, CY=1, AC=1, OV=0

Sau khi thc thi lnh SUBB A, @R0 th:(A)=BDH, CY=1, AC=1, OV=0


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Sau khi thc thi lnh SUBB A, #D6H th:(A)=ACH, CY=1, AC=1, OV=0

1.4. INC byte Chc nng: Tng thm 1 (Increment). M t: Tng ni dung ca byte c a ch c ch ra trong lnh (byte) thm 1. Cc c

khng b nh hng.

Lu : Khi lnh ny c dng thay i gi tr ca mt port xut th gi tr c dnglm d liu ban u ca port c ly t b cht d liu xut, khng phi c lyt cc chn nhp.

Cc dng lnh:INC AS byte 1

S chu k 1M i tng 00000100Hot ng (A) (A) + 1

INC RnS byte 1S chu k 1

M i tng 00001rrrHot ng (Rn) (Rn) + 1

INC directS byte 2S chu k 1

M i tng 00000101 aaaaaaaaHot ng (direct) (direct) + 1

INC @RiS byte 1S chu k 1M i tng 0000011iHot ng ((Ri)) ((Ri)) + 1

V d: Cho bit trc (A)=C3H, (R0)=69H, (P1)=(90H)=AAH, (69H)=7FH.Sau khi thc thi lnh INC A th: (A)=C4H

Sau khi thc thi lnh INC 90H hay INC P1 th: (P1)=(90H)=ABH


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Sau khi thc thi lnh INC @R0 th: (@R0)=(69H)=80H

Sau khi thc thi lnh INC R0 th: R0=6AH

1.5. INC DPTR

Chc nng: Tng con tr d liu (Increment Data Pointer). M t: Tng ni dung ca thanh ghi con tr d liu 16-bit thm 1. Cc c khng b nh

hng.

S byte 1S chu k 2M i tng 10100011Hot ng (DPTR) (DPTR) + 1

V d 1: Cho bit trc (DPTR)=1234H.Sau khi thc thi lnh INC DPTRth:

(DPTR)=1235H vi (DPH)=12H v (DPL)=35H

V d 2: Cho bit trc (DPH)=12H v (DPL)=FFH.Sau khi thc thi lnh INC DPTRth:

(DPTR)=1300H vi (DPH)=13H v (DPL)=00H

Lu : Khng c lnh gim ni dung ca DPTR (DECDPTR). Nu mun gim ni dungca DPTR ta phi vit mt on chng trnh con thc hin iu ny. Chngtrnh con c minh ha nh sau:

DEC_DPTR: ;Chng trnh con gim DPTR.PUSH ACC ;Ct tm gi tr ACC.DEC DPL ;Gim byte thp ca DPTR.

MOV A, DPL ;So snh byte thp ca DPTRCJNE A,#0FFH, SKIP ;vi FFH.DEC DPH ;Gim byte cao ca DPTR.

SKIP:POP ACC ;Phc hi gi tr ACC.RET


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1.6. DEC byte

Chc nng: Gim bt 1 (Decrement). M t: Gim ni dung ca byte c a ch c ch ra trong lnh ( byte) bt 1. Cc c

khng b nh hng.

Lu : Khi lnh ny c dng thay i gi tr ca mt port xut th gi tr c dnglm d liu ban u ca port c ly t b cht d liu xut, khng phi cly t cc chn nhp.

Cc dng lnh:DEC A

S byte 1S chu k 1

M i tng 00010100Hot ng (A) (A) 1

DEC Rn

S byte 1S chu k 1M i tng 00011rrrHot ng (Rn) (Rn) 1

DEC directS byte 2S chu k 1

M i tng 00010101 aaaaaaaaHot ng (direct) (direct) 1

DEC @Ri

S byte 1S chu k 1M i tng 0001011iHot ng ((Ri)) ((Ri)) 1

V d: Cho bit trc (A)=C3H, (R0)=60H, (P1)=(90H)=AAH, (60H)=7AH.Sau khi thc thi lnh DEC A th: (A)=C2H

Sau khi thc thi lnh DEC 90H hay DEC P1 th: (P1)=(90H)=A9H

Sau khi thc thi lnh DEC @R0 th: (@R0)=(60H)=79H


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Sau khi thc thi lnh DEC R0 th: R0=5FH

1.7. MUL AB

Chc nng: Nhn (Multiply). M t: MUL AB nhn cc s nguyn khng du 8-bit cha trong thanh ghi A v thanh ghi

B. Tch s l mt gi tr 16 bit, byte thp (8 bit thp) c ct trong thanh ghi Acn byte cao (8 bit cao) c ct trong thanh ghi B.Nu tch s ln hn 255 (0FFH) th c trn OV=1. C nh CY lun lun b xa.

S byte 1S chu k 4M i tng 10100100Hot ng (B) HIGH BYTE OF (A) (B)

(A) LOW BYTE OF (A) (B)

V d 1: Cho bit trc (A)=02H, (B)=7CH.Sau khi thc thi lnh MUL AB th: (B)= 00H, (A)= F8H, CY=0, OV=0.

V d 2: Cho bit trc (A)=C3H, (B)=AAH.Sau khi thc thi lnh MUL AB th: (B)= 81H, (A)= 7EH, CY=0, OV=1.

1.8. DIV AB

Chc nng: Chia (Divide). M t: DIV AB chia s nguyn khng du 8-bit cha trong thanh ghi A cho s nguyn

khng du 8-bit cha trong thanh ghi B. Thng s c ct trong thanh ghi Acn s dc ct trong thanh ghi B. C CY v c OV b xo.Nu ban u B cha 00H, gi tr tr v trong thanh ghi A v thanh ghi B khngc xc nh v c OV=1. C CY c xa trong mi trng hp.

S byte 1S chu k 4M i tng 10000100Hot ng (A) QUOTIENT OF (A) / (B)

(B) REMAINDER OF (A) / (B)


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V d 1:Cho bit trc (A)=C3H, (B)=0AH.Sau khi thc thi lnh DIV AB th: (B)= 05H, (A)= 13H, CY=0, OV=0.

V d 2:Cho bit trc (A)=00H, (B)=0AH.Sau khi thc thi lnh DIV AB th: (B)= 00H, (A)= 00H, CY=0, OV=0.

V d 3:Cho bit trc (A)=C3H, (B)=00H.Sau khi thc thi lnh DIV AB th: (B)= yyH, (A)= xxH, CY=0, OV=1.

C3HA

00HBC3H / 00H = xxH d yyH

DIV AByyHB

xxHA

1.9. DA A

Chc nng: Hiu chnh thp phn ni dung ca thanh ghi A i vi php cng (Decimal-adjustAccumulator for Addition)

M t: DA A hiu chnh gi tr 8-bit trong thanh ghi A (gi tr ny l kt qu php cnghai ton hng c dng BCD - gi trc ) to ra hai digit 4 bit. Php cngc thc hin bi lnh ADD hoc ADDC, lnh DA A khng p dng cho

php tr SUBB).Nu c AC = 1 hoc nu 4 bit thp ca thanh ghi A c gi tr > 9 (xxxx1010 xxxx1111), th 6c cng vi ni dung ca thanh ghi A to ra s BCD 4bit thp. Sau khi cng, c CY = 1 nu c s nh t 4 bit thp chuyn n tt c 4bit cao.Nu c CY = 1 hoc nu 4 bit cao ca thanh ghi A c gi tr > 9 (1010xxxx 1111xxxx), th 6c cng vi 4 bit cao to ra s BCD 4 bit cao. Sau khicng c CY = 1 nu c s nh t 4 bit cao nhng c CY khng b xa. Vy th cCY ch ra rng tng ca 2 ton hng BCD ban u ln hn 99. C OV khng bnh hng.Tt c s kin trn ch xy ra trong mt chu k my. Lnh ny thc hin php bini thp phn bng cch cng 00H, 06H, 60H hay 66H vi ni dung ca thanhghi A ty thuc vo ni dung ban u ca thanh ghi A v cc iu kin ca ttrng thi chng trnh PSW.

Lu : DA A khng th n gin bin i s hex trong thanh ghi A thnh s dng BCD,DA A cng khng p dng cho php tr thp phn.

S byte 1S chu k 1M i tng 11010100


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Hot ng Gi s ni dung ca thanh ghi A l BCDIF [[(A3 A0) > 9] OR [(AC) = 1]]

THEN (A3 A0) (A3 A0) + 6AND

IF [[(A7 A4) > 9] OR [(C) = 1]]THEN (A7 A4) (A7 A4) + 6

V d 1: Cho bit trc (A)=56H biu din BCD ca s 56(R3)=67H biu din BCD ca s 67

Sau khi thc thi chui lnh: ADD A, R3DA A

th: c CY=1 v (A)=23 biu din BCD ca s 123 (56+67)








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V d 4: Cho bit trc (A)=56H biu din BCD ca s 56(R3)=67H biu din BCD ca s 67c CY=1

Sau khi thc thi chui lnh: ADDC A, R3DA A

th: c CY=1 v (A)=24 biu din BCD ca s 124 (56+67+1)

Lu : Cc gi tr BCD c th c tng thm 1 n v hoc gim i 1 n v bng cchcng vi 01H (khi tng) hoc cng vi 99H (khi gim).

oV d 1: Gi s cho (A)=39H

biu din BCD ca s 39.Sau khi thc thi chui lnh: ADD A, #01H

DA Ath: c CY=0 v (A)=40H biu din BCD ca s 40.

o V d 2: Gi s cho (A)=30H biu din BCD ca s 30.Sau khi thc thi chui lnh: ADD A, #99H

DA Ath: c CY=1 v (A)=29H biu din BCD ca s 29.

2. Nhm lnh logic:

Bng trng thi ca cc php ton logicAND OR XOR CPL

A B A AND B A OR B A XOR B CPL A

0

0

1

1

0

1

0

1

0

0

0

1

0

1

1

1

0

1

1

0

1

1

0

0

2.1. ANL ,

Chc nng: AND hai ton hng (Logical-AND). M t: ANL thc hin php ton AND tng bit gia hai ton hng c ch ra trong lnh

v lu kt qu vo ton hng ch (dest-byte). Cc c khng b nh hng.

Lu : Khi lnh ny c dng sa i mt port xut, gi tr c dng lm d liuban u ca port c c t b cht d liu xut, khng phi t cc chn port.


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Cc dng lnh:ANL A, Rn

S byte 1S chu k 1

M i tng 01011rrrHot ng (A) (A) AND (Rn)

ANL A, directS byte 2S chu k 1

M i tng 01010101 aaaaaaaaHot ng (A) (A) AND (direct)

ANL A, @RiS byte 1S chu k 1

M i tng 0101011i

Hot ng (A)

(A) AND ((Ri))ANL A, #dataS byte 2S chu k 1M i tng 01010100 ddddddddHot ng (A) (A) AND #data

ANL direct, AS byte 2S chu k 1M i tng 01010010 aaaaaaaa

Hot ng (direct)

(direct) AND (A)ANL direct, #data

S byte 3S chu k 2M i tng 01010011 aaaaaaaa ddddddddHot ng (direct) (direct) AND #data

V d: Cho bit trc (A)=C3H, (R0)=2AH, (P3)=(B0H)=75H, (2AH)=55H.Sau khi thc thi lnh ANL A, R0 th: (A)=02H

C3HA

2AHR0 C3H AND 2AH = 02H

ANL A, R0

02HA11000011B

00101010B

00000010B

AND


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Sau khi thc thi lnh ANL A, B0H hay ANL A, P3 th: (A)=41H

Sau khi thc thi lnh ANL A, @R0 th: (A)=41H

Sau khi thc thi lnh ANL A, #2AH th: (A)=02H

Sau khi thc thi lnh ANL B0H, A hay ANL P3, A th: (P3)=41H

Sau khi thc thi lnh ANL 2AH, #B0H th: (2AH)=10H


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2.2. ORL ,

Chc nng: OR logic hai ton hng (Logical-OR). M t: ORL thc hin php ton OR tng bit gia hai ton hng c ch ra trong lnh v

lu kt qu vo ton hng ch (dest-byte). Cc c khng b nh hng.


Cc dng lnh:ORL A, Rn

S byte 1S chu k 1

M i tng 01001rrrHot ng (A) (A) OR (Rn)

ORL A, directS byte 2S chu k 1

M i tng 01000101 aaaaaaaaHot ng (A) (A) OR (direct)

ORL A, @RiS byte 1S chu k 1

M i tng 0100011iHot ng (A) (A) OR ((Ri))

ORL A, #dataS byte 2S chu k 1M i tng 01000100 ddddddddHot ng (A) (A) OR #data

ORL direct, AS byte 2S chu k 1M i tng 01000010 aaaaaaaaHot ng (direct) (direct) OR (A)

ORL direct, #dataS byte 3

S chu k 2M i tng 01000011 aaaaaaaa ddddddddHot ng (direct) (direct) OR #data


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V d: Cho bit trc (A)=C3H, (R0)=2AH, (P3)=(B0)=75H, (2AH)=55H.Sau khi thc thi lnh ORL A, R0 th: (A)=EBH

Sau khi thc thi lnh ORL A, B0H hay ORL A, P3 th: (A)=F7H

Sau khi thc thi lnh ORL A, @R0 th: (A)=D7H

Sau khi thc thi lnh ORL A, #2AH th: (A)=EBH

C3HA

2AHC3H OR 2AH = EBH

ORL A, #2AH

EBHA

11000011B

00101010B

11101011B

OR

Sau khi thc thi lnh ORL B0H, A hay ORL P3, A th: (P3)=F7H


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Sau khi thc thi lnh ORL 2AH, #B0H th: (2AH)=F5H

55H2AH

B0H55H OR B0H = F5H

ORL 2AH, #B0H

F5H2AH

01010101B

10110000B

11110101B

OR

2.3. XRL ,

Chc nng: XOR logic hai ton hng (Logical Exclusive-OR). M t: XRL thc hin php ton XOR tng bit gia hai ton hng c ch ra trong lnh

v lu kt qu vo ton hng ch (dest-byte). Cc c khng b nh hng.


Cc dng lnh:XRL A, RnS byte 1

S chu k 1M i tng 01101rrrHot ng (A) (A) (Rn)

XRL A, directS byte 2S chu k 1

M i tng 01100101 aaaaaaaaHot ng (A) (A) (direct)

XRL A, @RiS byte 1S chu k 1

M i tng 0110011iHot ng (A) (A) ((Ri))

XRL A, #dataS byte 2S chu k 1M i tng 01100100 ddddddddHot ng (A) (A) #data

XRL direct, AS byte 2S chu k 1M i tng 01100010 aaaaaaaaHot ng (direct) (direct) (A)


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XRL direct, #dataS byte 3S chu k 2

M i tng 01100011 aaaaaaaa ddddddddHot ng (direct) (direct) #data

V d: Cho bit trc (A)=C3H, (R0)=2AH, (P3)=(B0)=75H, (2AH)=55H.Sau khi thc thi lnh XRL A, R0 th: (A)=E9H

Sau khi thc thi lnh XRL A, B0H hay XRL A, P3 th: (A)=B6H

Sau khi thc thi lnh XRL A, @R0 th: (A)=96H

Sau khi thc thi lnh XRL A, #2AH th: (A)=E9H

Sau khi thc thi lnh XRL B0H, A hay XRL P3, A th: (P3)=B6H


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Sau khi thc thi lnh XRL 2AH, #B0H th: (2AH)=E5H

55H2AH

B0H55H XOR B0H = E5H

XRL 2AH, #B0H

E5H2AH

01010101B

10110000B

11100101B

XOR

2.4. CLR A

Chc nng: Xa thanh ghi A (Clear Acc). M t: Thanh ghi A b xa (tt c cc bit u bng 0). Cc c khng b nh hng. Cc dng lnh:

S byte 1S chu k 1

M i tng 11100100Hot ng (A) 0

V d: Cho bit trc (A)=5CH.Sau khi thc thi lnh CLR A th: (A)=00H

2.5. CPL A

Chc nng: Ly b ni dung thanh ghi A (Complement Acc). M t: Mi mt bit ca thanh ghi A c ly b logic (b 1: cc bit 1 c th i thnh

bit 0 v cc bit 0 c th i thnh bit 1 ). Cc c khng b nh hng.

S byte 1S chu k 1

M i tng 11110100Hot ng (A) NOT(A)

V d: Cho bit trc (A)=5CH.Sau khi thc thi lnh CPL A th: (A)=A3H

5CHACPL A

A3HA

01011100B

10100011B


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2.6. RL A

Chc nng: Quay tri thanh ghi A (Rotate Acc Left). M t: 8 bit trong thanh ghi A c quay tri 1 bit. Bit 7 c quay n v tr ca bit 0.

Cc c khng b nh hng.

S byte 1

S chu k 1M i tng 00100011Hot ng (An+1) (An), n = 0 6

(A0) A7

V d: Cho bit trc (A)=C5H.Sau khi thc thi lnh RL A th: (A)=8BH

2.7. RLC A

Chc nng: Quay tri thanh ghi A cng vi c nh. M t: 8 bit trong thanh ghi A v c nh cng c quay tri 1 bit. Bit 7 c di chuyn

n c CY v trng thi ban u ca c CY c a n v tr ca bit 0. Cc ckhc khng b nh hng.

S byte 1

S chu k 1M i tng 00110011Hot ng (An+1) (An), n = 0 6

(A0) (C), (C) A7

V d: Cho bit trc (A)=C5H v c CY=0.Sau khi thc thi lnh RLC A th: (A)=8AH v c CY=1


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2.8. RR A

Chc nng: Quay phi thanh ghi A (Rotate Acc Right). M t: 8 bit trong thanh ghi A c quay phi 1 bit. Bit 0 c quay n v tr ca bit 7.

Cc c khng b nh hng.

S byte 1

S chu k 1M i tng 00000011Hot ng (An) (An+1), n = 0 6

(A7) A0 V d: Cho bit trc (A)=C5H.

Sau khi thc thi lnh RR A th: (A)=E2H

2.9. RRC A Chc nng: Quay phi thanh ghi A cng vi c nh. M t: 8 bit trong thanh ghi A v c nh cng c quay phi 1 bit. Bit 0 c di chuyn

n c nh v trng thi ban u ca c nh c a n v tr ca bit 7. Cc ckhc khng b nh hng.

S byte 1S chu k 1

M i tng 00010011Hot ng (An) (An+1), n = 0 6

(A7) (C)(B) A0

V d: Cho bit trc (A)=C5H v c CY=0.Sau khi thc thi lnh RRC A th: (A)=62H v c CY=1


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2.10. SWAP A

Chc nng: Tro i ni dung hai na thp v cao ca thanh ghi A (Swap nibble). M t: SWAP A tro i ni dung hai na thp v cao ca thanh ghi A ( cc bit t 3 n 0

cc bit t 7 n 4). Thao tc ny cn c th c hiu nh l quay thanh ghi Ai 4 bit. Cc c khng b nh hng.

S byte 1S chu k 1M i tng 11000100Hot ng (A3 A0) (A7 A4)

V d: Cho bit trc (A)=C5H.Sau khi thc thi lnh SWAP A th: (A)=5CH

Lu : Lnh ny c th c dng chuyn i gi tr nh phn trong thanh ghi A (gitr ny nh hn 100) thnh s BCD nh sau:

MOV B, #10 ;Chia gi tr cho 10 tch raDIV AB ;(A)=digit chc (B)=digit n v.SWAP A ;a digit chc ln na cao ca ACC.ADD A, B ;Thm digit n v vo na thp.

3. Nhm lnh di chuyn d liu:

3.1. MOV ,

Chc nng: Di chuyn ni dung ca ton hng ngun (src-byte) n ton hng ch (dest-byte).

M t: Ni dung ca byte c ch ra bi ton hng th hai c sao chp vo v tr cxc nh bi ton hng th nht. Byte ngun khng b nh hng. Cc thanh ghikhc v cc c khng b nh hng.

Cc dng lnh:MOV A, Rn

S byte 1S chu k 1M i tng 11101rrrHot ng (A) (Rn)

MOV A, directS byte 2S chu k 1M i tng 11100101 aaaaaaaaHot ng (A) (direct)

Lu : MOV A, ACC l lnh khng hp l.


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MOV A, @RiS byte 1S chu k 1M i tng 1110011iHot ng (A) ((Ri))

MOV A, #data

S byte 2S chu k 1M i tng 01110100 ddddddddHot ng (A) #data

MOV Rn, AS byte 1S chu k 1M i tng 11111rrrHot ng (Rn) (A)

MOV Rn, direct

S byte 2S chu k 2M i tng 10101rrr aaaaaaaaHot ng (Rn) (direct)

MOV Rn, #dataS byte 2S chu k 1M i tng 01111rrr ddddddddHot ng (Rn) #data

MOV direct, A

S byte 2S chu k 1M i tng 11110101 aaaaaaaaHot ng (direct) (A)

MOV direct, RnS byte 2S chu k 2M i tng 10001rrr aaaaaaaaHot ng (direct) (Rn)

MOV direct, direct

S byte 3S chu k 2M i tng 10000101 aaaaaaaa aaaaaaaaHot ng (direct) (direct)

Lu : byte 2 cha a ch ngun, byte 3 cha a ch ch.


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MOV direct, @RiS byte 2S chu k 2M i tng 1000011i aaaaaaaaHot ng (direct) ((Ri))

MOV direct, #dataS byte 3S chu k 2M i tng 01110101 aaaaaaaa ddddddddHot ng (direct) #data

MOV @Ri, AS byte 1S chu k 1M i tng 1111011iHot ng ((Ri)) (A)

MOV @Ri, directS byte 2S chu k 2M i tng 1010011i aaaaaaaaHot ng ((Ri)) (direct)

MOV @Ri, #dataS byte 2S chu k 1M i tng 0111011i ddddddddHot ng ((Ri)) #data

V d: Cho bit trc (A)=5FH, (R0)=30H, (30H)=40H, (P1)=CAH.

Sau khi thc thi lnh MOV A, R0 th: (A)=30H, (R0)=30H

Sau khi thc thi lnh MOV A, 30H th: (A)=40H, (30H)=40H

Sau khi thc thi lnh MOV A, @R0 th: (A)=40H, (R0)=30H, (30H)=40H


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Sau khi thc thi lnh MOV A, #30H th: (A)=30H

Sau khi thc thi lnh MOV R0, A th: (A)=5FH, (R0)=5FH

Sau khi thc thi lnh MOV R0, P1 th: (R0)=CAH, (P1)=CAH

Sau khi thc thi lnh MOV R0, #90H th: (R0)=90H

Sau khi thc thi lnh MOV P1, A th: (A)=5FH, (P1)=5FH

Sau khi thc thi lnh MOV P1, R0 th: (R0)=30H, (P1)=30H

Sau khi thc thi lnh MOV P1, 30H th: (30H)=40H, (P1)=40H

Sau khi thc thi lnh MOV P1, @R0 th: (R0)=30H, (30H)=40H, (P1)=40H


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Sau khi thc thi lnh MOV 30H, #30H th: (30H)=30H

Sau khi thc thi lnh MOV @R0, A th: (A)=5FH, (30H)=5FH, (R0)=30H

Sau khi thc thi lnh MOV @R0, P1: (30H)=CAH, (P1)=CAH, (R0)=30H

Sau khi thc thi lnh MOV @R0, #90H th: (30H)=90H, (R0)=30H

3.2. MOVC A, @A+

Chc nng: Di chuyn byte m hoc byte hng s. M t: MOVC np cho thanh ghi A byte m hoc byte hng s t b nh chng trnh.

a ch ca byte c tm np l tng ca gi tr 8 bit khng du ban u chatrong thanh ghi A vi ni dung ca thanh ghi nn 16 bit (thanh ghi nn c th l

con tr d liu hoc PC). Trong trng hp sau, thanh ghi PC c tng chn a ch ca lnh tip theo trc khi c cng vi ni dung ca thanh ghi A,cc thanh ghi nn khng b thay i. Php cng bit th 16 do s nh t 8 bit thpc th truyn qua cc bit cao. Cc c khng b nh hng.

Cc dng lnh:MOVC A, @A+DPTR

S byte 1S chu k 2M i tng 10010011Hot ng (A) ((A)+(DPTR))

MOVC A, @A+PCS byte 1S chu k 2M i tng 10000011Hot ng (A) ((A)+(PC))


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V d 1: Cho bit trc (A)=7BH, (PC)=345H, (DPTR)=1234H. nh ROM ni(3C0H)=AAH. nh ROM ngoi (12AFH)=BBH.

Sau khi thc thi lnh MOVC A, @A+PC th: (A)=AAH

Sau khi thc thi lnh MOVC A, @A+DPTRth: (A)=BBH

V d 2: Cho chui lnh sau:MOVC A, @A+PC ;(@A+PC)=([A]+[PC])SJMP $ ; di lnh l 2 byte.

DULIEU:DB 66H,77H,88HDB 99H,0AAHDB 0BBH

Sau khi thc thi chui lnh th: (A) = 66H nu trc khi thc thi lnh ta c (A) = 02H. (A) = 77H nu trc khi thc thi lnh ta c (A) = 03H. (A) = 88H nu trc khi thc thi lnh ta c (A) = 04H. (A) = 99H nu trc khi thc thi lnh ta c (A) = 05H. (A) = AAH nu trc khi thc thi lnh ta c (A) = 06H. (A) = BBH nu trc khi thc thi lnh ta c (A) = 07H.

V d 3: Cho chui lnh sau:MOV DPTR, #CODEDISPMOVC A, @A+DPTR ;(@A+DPTR)=([A]+[DPTR])SJMP $ ; di lnh l 2 byte.

CODEDISP:DB 48H,5AH,6BH,0A9H,0F5H,90H

Sau khi thc thi chui lnh th: (A) = 48H nu trc khi thc thi lnh ta c (A) = 00H. (A) = 5AH nu trc khi thc thi lnh ta c (A) = 01H. (A) = 6BH nu trc khi thc thi lnh ta c (A) = 02H. (A) = A9H nu trc khi thc thi lnh ta c (A) = 03H. (A) = F5H nu trc khi thc thi lnh ta c (A) = 04H. (A) = 90H nu trc khi thc thi lnh ta c (A) = 05H.


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3.3. MOVX ,

Chc nng: Di chuyn b nh ngoi (Move External). M t: MOVX chuyn d liu gia thanh ghi A vi ni dung ca mt byte trong b nh

d liu ngoi (ta dng k hiu X ni tip vi MOV). Cc lnh ny c chia lm 2loi, hai loi ny khc nhau ch chng cung cp a ch gin tip 8 bit hay 16

bit cho b nh dliu ngoi c dung lng 256 byte hay 64 KB.Vi loi th nht, s dng thanh ghi R0 hoc R1 lu gi a ch ca d liucn truy xut thuc RAM ngoi. Loi ny dng trong trng hp b nh RAM cdung lng nh (ti a l 256 byte). Port 1 & Port 2 l port xut/nhp d liu. Vi loi th hai, s dng thanh ghi DPTR lu gi a ch ca d liu cn truyxut thuc RAM ngoi. Loi ny dng trong trng hp b nh RAM c dunglng ln (ti a l 64 KB). Port 1 l port xut/nhp d liu.Trong nhiu tnh hung ta c th trn hai loi trn ca lnh MOVX. Mt dyRAM ln vi cc ng a ch cao c iu khin bi P2 c th c nh ach thng qua con tr d liu hoc vi m xut ra cc bit a ch cao n P2

c tip theo bi mt lnh MOVX s dng R0 hoc R1. Cc dng lnh:

MOVX A, @RiS byte 1S chu k 2M i tng 11100011iHot ng (A) ((Ri))

MOVX A, @DPTRS byte 1S chu k 2

M i tng 11100000Hot ng (A) ((DPTR))

MOVX @Ri, AS byte 1S chu k 2M i tng 11110011Hot ng ((Ri)) (A)

MOVX @DPTR, AS byte 1S chu k 2

M i tng 11110000Hot ng ((DPTR)) (A)


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V d: Cho bit trc (A)=AAH, (DPTR)=1234H, (R0)=34H. nh RAM ngoi 256 byte:(34H)=12H & 64 KB: (1234H)=7FH

Sau khi thc thi lnh MOVX A, @R0 th: (A)=12H

Sau khi thc thi lnh MOVX @R0, A th: nh RAM ngoi (34H)=AAH

Sau khi thc thi lnh MOVX A, @DPTRth: (A)=7FH

Sau khi thc thi lnh MOVX @DPTR, A th: (1234H)=AAH


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3.4 MOV DPTR, #data16

Chc nng: Np hng s 16-bit cho con tr d liu DPTR. M t: Con tr d liu c np bi hng s 16-bit ch ra trong lnh. Hng s 16-bit c

t byte 2 v byte 3 ca lnh. Byte 2 l byte cao c np cho DPH cn byte 3l byte thp c np cho DPL. Cc c khng b nh hng.

S byte 3S chu k 2M i tng 10010000 dddddddd ddddddddHot ng (DPTR) #data16

V d:Sau khi thc thi lnh MOV DPTR, #1234H th:

3.5. PUSH direct

Chc nng: Ct vo ngn xp (stack). M t: Con trstackc tng bi 1. Ni dung ca ton hng c ch ra trong lnh sau

c sao chp vo RAM ni ti a ch c tr n bi con tr stack. Cc ckhng b nh hng.

S byte 2S chu k 2M i tng 11000000 aaaaaaaaHot ng (SP) (SP) + 1

((SP)) (direct)

V d: Ct tm thi ni dung ca thanh ghi A, B v R0 vo ngn xp. Cho bit trc (A)=AAH,(B)=BBH, (R0)=CCH, (SP)=5FH.

Sau khi thc thi chui lnh: PUSH APUSH BPUSH 00H

Th: (SP)=62H, (60H)=AAH, (61H)=BBH, (62H)=CCH


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3.6. POP direct

Chc nng: Ly ra t ngn xp (stack).

M t: Ni dung ca vng RAM ni c nh a ch bi con tr stack SP c c vni dung con tr stack c gim bi 1. Gi tr c c sau c chuyn nbyte c nh a ch trc tip ch ra trong lnh. Cc c khng b nh hng.

S byte 2S chu k 2M i tng 11010000 aaaaaaaaHot ng (direct) ((SP))

(SP) (SP) 1

V d: Ly li ni dung ca thanh ghi A, B v R0 ct vo ngn xp lc u (v d trn). Sau khi thc thi chui lnh: POP 00H

POP BPOP A

Th: (SP)=5FH, (R0)=CCH, (B)=BBH, (A)=AAH


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3.7. XCH A,

Chc nng: Tro i ni dung ca thanh ghi A vi ni dung ca mt byte M t: XCH np cho thanh ghi A ni dung ca byte ch ra trong lnh, ng thi ghi ni

dung ban u ca thanh ghi A cho byte va nu trn. Ton hng ngun ng thil ton hng ch v ngc li.

Cc dng lnh:XCH A, Rn

S byte 1S chu k 1M i tng 11001rrrHot ng (A) (Rn)

XCH A, directSbyte 2S chu k 1M i tng 11000101 aaaaaaaa

Hot ng (A) (direct)XCH A, @Ri

S byte 1S chu k 1M i tng 1100011iHot ng (A) ((Ri))

V d: Cho bit trc (A)=3FH, (R0)=20H, (20H)=75H.Sau khi thc thi lnh XCH A, R0 th: (A)=20H, (R0)=3FH

Sau khi thc thi lnh XCH A, 20H th: (A)=75H, (20H)=3FH

Sau khi thc thi lnh XCH A, @R0 th: (A)=75H, (20H)=3FH, (R0)=20H


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3.8. XCHD A, @Ri

Chc nng: Tro i digit (Exchange Digit). M t: XCHD tro i ni dung na thp ca thanh ghi A (biu din mt digit s hex

hoc BCD) vi ni dung na thp ca mt byte trong RAM ni, byte ny cnh a ch gin tip bi thanh ghi ch ra trong lnh. Na cao ca cc thanh ghiva nu trn khng b nh hng v cc c cng khng b nh hng.

S byte 1S chu k 1M i tng 110101iHot ng (A3 A0) (Ri3 Ri0)

V d: Cho bit trc (A)=36H, (R0)=20H, (20H)=75H.Sau khi thc thi lnh XCHD A, @R0 th: (A)=35H, (20H)=76H

4. Nhm lnh x l bit:

4.1. CLR bit

Chc nng: Xa bit. M t: Bit c ch ra trong lnh c xa. Cc c khng b nh hng. CLR c th thao

tc trn c nh v trn mt bit bt k c nh a ch bit.

Cc dng lnh:CLR C

S byte 1S chu k 1M i tng 11000011Hot ng (C) 0

CLR bitS byte 2S chu k 1M i tng 11000010 bbbbbbbbHot ng (bit) 0

V d: Cho bit trc c CY=1, (P1)=FFH.Sau khi thc thi lnh CLR C th: c CY=0


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Sau khi thc thi lnh CLR P1.3 th: P1.3=0 tc lm (P1)=F7H

4.2. CPL bit

Chc nng: Ly b bit (Complex). M t: Bit c ch ra trong lnh c ly b. Mt bit c gi tr 1 c i thnh 0 v

ngc li. Cc c khng b nh hng. CPL c th thao tc trn c nh v trnmt bit bt k c nh a ch bit.

Lu : Khi lnh ny c dng lm thay i gi tr ca mt chn xut ( bt k chnno ca mt port) th gi tr c dng lm d liu ban u ca chn c ly tb cht d liu xut, khng phi c ly t chn nhp.

Cc dng lnh:CPL CS byte 1

S chu k 1M i tng 10110011Hot ng (C) NOT(C)

CPL bitS byte 2S chu k 1M i tng 10110010 bbbbbbbbHot ng (bit) NOT(bit)

V d: Cho bit trc c CY=1, (P1)=FFH.

Sau khi thc thi lnh CPL C th: c CY=0

Sau khi thc thi lnh CPL P1.3 th: P1.3=0 tc lm (P1)=F7H


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4.3. SETB

Chc nng: Setbit bng 1 (Set Bit). M t: SETBsetbit c ch ra trong lnh bng 1. SETB c th thao tc trn c nh hoc

cc bit bt k c nh a ch bit. Cc c khng b nh hng.

Cc dng lnh:SETB C

S byte 1S chu k 1M i tng 11010011Hot ng (C) 1

SETB bitS byte 2S chu k 1M i tng 11010010 bbbbbbbbHot ng (bit) 1

V d: Cho bit trc c CY=0, (P1)=00H.Sau khi thc thi lnh SETB C th: c CY=1

Sau khi thc thi lnh SETB P1.3 th: P1.3=1 tc lm (P1)=08H

4.4. ANL C,

Chc nng: AND logic hai bit. M t: Nu gi tr ca bit ngun l 0 th lnh ny s xa CY v ngc li nu gi tr ca

bit ngun l 1 th lnh ny gi nguyn gi tr hin hnh ca c CY. Du gch cho(/) t trc ton hng trong chng trnh hp ng ch ra rng bit ngun c lyb trc khi AND vi CY nhng gi tr ca bit ngun khng b thay i bithao tc ly b ny. Cc c khng b nh hng.

Cc dng lnh:ANL C, bit

S byte 2S chu k 2M i tng 10000010 bbbbbbbbHot ng (C) (C) AND (bit)

ANL C, /bitS byte 2S chu k 2M i tng 10110000 bbbbbbbb


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