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8/19/2019 Jammerdan.asm
http://slidepdf.com/reader/full/jammerdanasm 1/4
;27NOV07;DEVICE = 16F628A;Jammerdan - aka Silencer. Control a LMX2306 PLL and VCO to jam FM broadcasts. Tunes to 107.9 MHz then steps down to 87.2 MHz.;TODO: Detector to lock onto offending portable and a lightshow.
LIST P=16F628a, F=INHX8M#include <p16f628a.inc>
__CONFIG 0x2001 ; XT OSC, RA5-MCLR
; Equates
RESET_V EQU 0x00 ; Address of RESET VectorOSC_FREQ EQU D'4000000' ; Oscillator Frequency is 4 MHz
; RegistersPLLHI EQU 0x20 ; MSB of PLL N-Divider WordPLLLO EQU 0x21 ; LSB (Swallow Counter) of PLL N-Divider Word. Max value 0x07. Must be left-shifted before outputting.GPCTR EQU 0x22 ; General Purpose CounterDATABYTE EQU 0x23 ; Databyte to be output on the dataline(gets destroyed)#define PLL_DATA PORTB,5#define PLL_CLK PORTB,6
#define PLL_LE PORTB,4
;**************************************************************; Begin Program;**************************************************************
ORG RESET_V ; RESET vector locationRESET GOTO START
ORG 4 ; INT vector
;**************************************************************; Initialization Routine;**************************************************************
START ; POWER_ON Reset (Beginning of program)CLRF STATUS ; Do initialization, Select bank 0CLRF INTCON ; Clear int-flags, Disable interruptsCLRF PCLATH ; Keep in lower 2KByte
BSF STATUS, RP0 ; Select bank 1MOVLW 0xFFMOVWF TRISA ; RA7-0 Inputs (Except RA6-CLKOUT)CLRF TRISB ; RB7-0 OutputsBCF STATUS, RP0 ; Select bank 0
CLRF PORTB ; Make all PORT B outputs low
CLRF PORTAGOTO MAIN
;**************************************************************; Subroutines;**************************************************************
PLL_INIT ; Initialization Word: 00000000001001010
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0011BSF PLL_LEBCF PLL_LE ; Latch Data. This may be unnecessaryMOVLW 0x0A ; Output Ten Zeroes F19:F10MOVWF GPCTRCALL OUT_ZEROESMOVLW 0x94 ; Output 10010100MOVWF DATABYTECALL OUT_BYTE ; F9:F2CALL OUT_ZERO ; F1CALL OUT_ONE ; C2CALL OUT_ONE ; C1BSF PLL_LE ; Latch DataBCF PLL_LEMOVLW 0x0D ; Output 13 Zeroes, Reference Divider Wo
rd: 000000000000010100000MOVWF GPCTR ; yields divide by 40 giving a PLL frequ
ency of 100 kHzCALL OUT_ZEROESMOVLW 0xA0 ; Output 10100000MOVWF DATABYTECALL OUT_BYTE ; C2 & C1 are both zeroBSF PLL_LE ; Latch DataBCF PLL_LE
RETURN
PLL_LOADCALL OUT_ZERO ; Clear GO bitMOVLW 0x05 ; Output Five Zeroes N18:N14MOVWF GPCTRCALL OUT_ZEROESMOVFW PLLHI ; Get the N-Counter N13:N6 bitsMOVWF DATABYTE ; Load into DATABYTECALL OUT_BYTECALL OUT_ZERO ; N5CALL OUT_ZERO ; N4MOVFW PLLLO ; Get the swallow counter: N3:1 (Note: o
ffset by 1!) MOVWF DATABYTE ; Load into DATABYTECALL OUT_PLLLOCALL OUT_ZERO ; C2CALL OUT_ONE ; C1BSF PLL_LE ; Latch DataBCF PLL_LERETURN
OUT_ZEROBCF PLL_DATABSF PLL_CLKBCF PLL_CLK
RETURN
OUT_ZEROES ; Output string of zeroes, load GPCTR with the number
CALL OUT_ZERODECFSZ GPCTR,1 ; Test if all zeroes have been outputGOTO OUT_ZEROES ; No, still one or more to goRETURN ; Yes, done
OUT_ONE
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BSF PLL_DATABSF PLL_CLKBCF PLL_CLKRETURN
OUT_BYTE ; Output a byte, which sits in DATABYTEMOVLW 0x08MOVWF GPCTR
OUT_BYTE1RLF DATABYTE,1 ; Leftrotate into CarryBTFSC STATUS,C ; Test CarryCALL OUT_ONE ; Carry was set, output a 1BTFSS STATUS,C ; Test Carry AgainCALL OUT_ZERO ; Carry was cleared, output a 0DECFSZ GPCTR,1 ; Test if eight bits have been outputGOTO OUT_BYTE1RETURN
OUT_PLLLO ; Only used to output the three bits for the swallow counter
DECF DATABYTE,1 ; Compensate for zero test in MAIN (ugly)
SWAPF DATABYTE,1 ; Prepare DATABYTE for outputRLF DATABYTE,1 ; Shift five bits to the left
MOVLW 0x03MOVWF GPCTRGOTO OUT_BYTE1RETURN ; Bad programming. Redundant RETURN just
in case
;**************************************************************; Main Routine;**************************************************************
MAINCALL PLL_INIT
FREQSTART
MOVLW 0x86MOVWF PLLHIMOVLW 0x08 ; Divider set to 1079MOVWF PLLLO
FREQSETCALL PLL_LOADMOVLW 0xFFMOVWF GPCTR
LOOP ; Settle PLLNOPMOVWF DATABYTE ; Unauthorized use of DATABYTE as a coun
ter...LOOP1
NOPNOPDECFSZ DATABYTE,1GOTO LOOP1NOPNOPDECFSZ GPCTR,1GOTO LOOPDECFSZ PLLLO,1GOTO FREQSET ; Not yet zero, continue scanning down
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MOVLW 0x08MOVWF PLLLO ; Reset swallow counter to 7+1DECF PLLHI,1MOVLW 0x6D ; Divider set to 872SUBWF PLLHI,0 ; Test value of PLLHI, result goes to WR
EGBTFSC STATUS,Z ; Test for Zero bit in STATUSGOTO FREQSTART ; Start new scanGOTO FREQSET ; Continue scanning down
END