Power Integrity Analysis for High-Speed Circuit Package Using

國立中山大學電機工程學系

碩士論文

以傳輸線模型分析高速數位電路構裝之電源完整性

Power Integrity Analysis for High-Speed Circuit Package Using

Transmission Line Method

研究生鍾明峰撰

指導教授郭志文吳宗霖博士

中華民國九十五年六月

誌謝

承蒙指導教授郭志文博士及吳宗霖博士這兩年來的細心指導使學生我在課

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轉眼間在中山已經渡過了六年的時光感謝陪我一起生活與努力的同學和

朋友在研究所的這兩年對我是一重要的時期首先是感謝陳肇學長對我研究上

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輝學長郭俊志學長歐宏俊學長陳信廷學長王建中學長以及挺光學長奕

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200606 於中山大學西灣

學年度94 學期2 校院國立中山大學系所電機工程學系

論文名稱(中)以傳輸線模型分析高速數位電路構裝之電源完整性論文名稱(英)Power Integrity Analysis for High-Speed Circuit Package Using

Transmission Line Method 學位類別碩士語文別Chi 學號M933010025

提要開放使用是頁數75

研究生(中)姓鍾研究生(中)名明峰研究生(英)姓Jhong 研究生(英)名Ming-Fong

指導教授(中)姓名郭志文指導教授(英)姓名Kuo Chih-Wen

關鍵字(中)傳輸線模型關鍵字(中)接地彈跳雜訊關鍵字(中)去耦合電容關鍵字(中)電磁能隙結構關鍵字(英)Transmission Line Model 關鍵字(英)Ground Bounce Noise 關鍵字(英)Decoupling Capacitor 關鍵字(英)Electromagnetic Bandgap Structure

中文提要

在現今高速數位電路中因其信號上升時間和下降時間為兆分之ㄧ秒電路

中的電源平面可以被考慮為一動態電磁場因數位邏輯的切換而產生的瞬間電流

變化會在電源平面間產生同步切換雜訊或接地彈跳雜訊而造成電路設計中信

號完整性和電源完整性的問題為了實現系統級的電源完整性模擬我們用集總

元件模型去電源平面的共振效應並結合電路模擬器例如 SPICE

因此我們使用二維傳輸線方法去建立電源平面的集總元件模型且應用此模

型可以有效地分析高速電源系統中的接地彈跳雜訊此系統為一 BGA 封裝結構

設置在 PCB 上我們發現此系統的雜訊現象和單純考慮封裝結構時有很大的不

同接下來我們並結合電源平面模型和去耦合電容快速模擬對抑制接地雜訊的影

響由實驗的量測結果我們也驗證了此方法的準確性

在電源與接地面間加去耦合電容以抑制 GBN 為一般常見的作法但一般來

講由於引腳的電感性使電容在 GHz 以上便失去抑制效果最近有一個新方法被

提出是應用電磁能隙結構所造成的 high impedance surface 去抑制高頻接地彈跳

雜訊最後我們使用二維傳輸線方法去分析電磁能隙結構並結合去耦合電容研

究其對抑制接地彈跳雜訊的影響

Abstract

In recent high-speed digital circuits with pico-second risingfalling edges it is

reasonable to consider the powerground planes as a dynamic electromagnetic system

The simultaneous switching noise (SSN) or ground bounce noise (GBN) resulting

from the transient currents which flow between powerground planes during the state

transitions of the logic gates has become a critical factor to degrade the signal

integrity (SI) and power integrity (PI) in PCB or package design In order to

accurately perform overall system-level power integrity simulation extracting the

SPICE-compatible models with the resonant effect being considered in the

powerground planes and incorporating the model into the conventional circuit

simulator such as SPICE is essential

In this thesis a two-dimensional transmission line (2D-TL) model is proposed

for constructing the SPICE-compatible model of the powerground planes Based on

this model the ground bounce noise for the BGA package mounted on a PCB can be

efficiently evaluated It is found that the behavior of GBN between the only package

and package mounted on a PCB (hybrid structure) is obvious different Then we

combine the SPICE-compatible model of the powerground planes with decoupling

capacitors to fast evaluate the behavior of GBN It also has a good agreement between

our model and the measured result

Adding decoupling capacitors between the power and ground planes is a typical

way to suppress the GBN However they are not effective at the frequency higher

than GHz due to their inherent lead inductance In recent a new method for

eliminating the GBN at higher frequency is proposed by electromagnetic bandgap

(EBG) structure with high impedance surface (HIS) Finally we utilize 2D-TL model

to fast analyze the behavior of the EBG and combine decoupling capacitors with EBG

structure to research the suppression of the GBN

目錄

目錄圖表索引第一章序 --------------------------------------------------------------------------------- 1

11 研究目的與方法 --------------------------------------------------------------- 1 12 論文大綱 ------------------------------------------------------------------------ 3

第二章接地彈跳雜訊 ------------------------------------------------------------------ 4 21 接地彈跳雜訊成因 ------------------------------------------------------------ 4 22 接地彈跳雜訊現象與影響 --------------------------------------------------- 6 23 印刷電路板的共振頻率點 --------------------------------------------------- 7 24 印刷電路板的設計 ------------------------------------------------------------ 9

241 印刷電路板上的輻射源------------------------------------------------- 9 242 多層印刷電路板---------------------------------------------------------11 243 接地面的完整性-------------------------------------------------------- 12

25 常見抑制接地彈跳雜訊的對策 ------------------------------------------- 14 251 切割電源平面對接地彈跳雜訊的抑制效果----------------------- 14 252 High impedance surface(HIS)對接地彈跳雜訊的抑制效果 ----- 18 253 去耦合電容對接地彈跳雜訊的抑制效果-------------------------- 19

第三章數值模擬方法 ---------------------------------------------------------------- 21 31 簡介 ---------------------------------------------------------------------------- 21 32 二维傳輸線模型 ------------------------------------------------------------- 22

321 基本單元與等效電路-------------------------------------------------- 22 322 PowerGround Plane 等效模型 --------------------------------------- 23

33 模擬結果 ---------------------------------------------------------------------- 24 331 電源裸版測試----------------------------------------------------------- 24 332 接地彈跳雜訊共振效應----------------------------------------------- 26 333 切換雜訊的時域模擬-------------------------------------------------- 30

第四章封裝與 PCB 系統 ------------------------------------------------------------ 33 41 電源系統架構之描述 ------------------------------------------------------- 33 42 封裝與 PCB 系統量測與結果--------------------------------------------- 35 43 封裝與 PCB 系統之二维傳輸線模擬 ------------------------------------ 38

431 封裝與 PCB 系統 ------------------------------------------------------ 38 432 封裝與 PCB 系統加去耦合電容---------------------------------- 40

第五章去耦合電容對電源雜訊影響 ---------------------------------------------- 45 51 電容在封裝與 PCB 系統之理想位置 ------------------------------------ 45 52 去耦合電容寄生元件的影響 ---------------------------------------------- 47

521 去耦合電容等效串聯電阻(ESR) ------------------------------------ 47 522 去耦合電容等效串聯電感(ESL) ----------------------------------- 48

53 電容數量和容值的影響 ---------------------------------------------------- 50 531 電容數量的影響-------------------------------------------------------- 50 532 電容容值的選擇-------------------------------------------------------- 51

54 板層厚度的影響 ------------------------------------------------------------- 55 55 總結 ---------------------------------------------------------------------------- 59

第六章以電磁能隙(EBG)結構抑制接地彈跳雜訊 ----------------------------- 60 61 電磁能隙簡介 ---------------------------------------------------------------- 60 62 以二維傳輸線模擬電磁能隙 ---------------------------------------------- 61 63 結合去耦合電容與電磁能隙抑制電源雜訊 ---------------------------- 67

第七章結論 ---------------------------------------------------------------------------- 71 參考文獻 ---------------------------------------------------------------------------------- 72

圖表索引

圖11 晶片級供電平面與主機板供電平面之簡化模型 -------------------------------- 2 圖21 CMOS 邏輯閘輸出端電路的等效電路圖----------------------------------------- 4 圖22 dI dtcut 在邏輯轉態時最大 ---------------------------------------------------------- 5 圖23 高頻電路板佈局圖-------------------------------------------------------------------- 6 圖24 地彈雜訊對信號影響圖 -------------------------------------------------------------- 7 圖25 所有電路輻射圖和只有時脈電路輻射圖比較 --------------------------------- 10 圖26 PCB 上的兩種電磁輻射原理 ----------------------------------------------------- 10 圖27 四層板結構--------------------------------------------------------------------------- 11 圖28 接地面上的長狹縫結構 ------------------------------------------------------------ 12 圖29 接地面上的長狹縫的危害 --------------------------------------------------------- 13 圖210 數位電路和類比電路之間的連線 ------------------------------------------------ 13 圖211 大規模晶片解耦合電容的安裝 --------------------------------------------------- 14 圖212 測試的平行板結構圖 --------------------------------------------------------------- 15 圖213 切割狹縫測試板佈局圖 ------------------------------------------------------------ 15 圖214 狹縫板模擬量測 21S 比較圖-------------------------------------------------------- 16 圖215 切割狹縫加通道測試板佈局圖 --------------------------------------------------- 17 圖216 模擬量測圖形比較------------------------------------------------------------------ 17 圖217 High impedance surface 結構圖 -------------------------------------------------- 18 圖218 high impedance surface 等效電路 ------------------------------------------------ 18 圖219 high impedance surface 串聯結構 ------------------------------------------------ 19 圖31 電源系統的集總元件模型 --------------------------------------------------------- 21 圖32 (a)PowerGround Plances結構與其網格切割示意圖 (b)單元網格與其等效

的 T Π型電路-------------------------------------------------------------------- 22 圖33 四個單元網格(T and Π model) 組成的等效電路 ----------------------------- 24 圖34 雙面印刷電路板模擬電源供應平面之測試結構圖 --------------------------- 25 圖35 雙面印刷電路模擬與量測比較圖 ------------------------------------------------ 25 圖36 雙面印刷電路加入損耗模擬與量測比較圖 ------------------------------------ 26 圖37 (a)delta_I noise (b)delta_I 的頻率響應 ------------------------------------------- 27 圖38 激發點的電壓波動------------------------------------------------------------------ 28 圖39 觀測點的電壓波動------------------------------------------------------------------ 28 圖310 時域雜訊轉為 Z 阻抗頻率圖----------------------------------------------------- 29 圖311 (a)模擬架構圖 (b)IC 輸入與輸出圖 (c)IC 切換造成電源雜訊 ------------ 30 圖312 IC 切換時電源平面上的電流圖 -------------------------------------------------- 31 圖313 輸出從 Low 到 High 時流過 PMOS 的電流------------------------------------ 32 圖41 電源輸送系統示意圖 --------------------------------------------------------------- 34

圖42 電源系統簡易集總元件圖 --------------------------------------------------------- 34 圖43 BGA 封裝設置在 PCB 上之結構------------------------------------------------- 35 圖44 BGA 封裝設置在 PCB 上結構之截面圖---------------------------------------- 36 圖45 BGA 封裝設置在 PCB 上結構之量測設置圖---------------------------------- 36 圖46 BGA 封裝設置在 PCB 上結構之量測結果------------------------------------- 37 圖47 BGA 封裝設置在 PCB 上結構之模擬示意圖---------------------------------- 38 圖48 BGA 封裝設置在 PCB 實作圖---------------------------------------------------- 39 圖49 BGA 封裝設置在 PCB 結構之模擬與量測圖---------------------------------- 39 圖410 封裝和 PCB 連結 via 和錫球電感值影響--------------------------------------- 40 圖411 電容等效電路(a)理想電容(b)具等效串聯電感電阻之實際電容 -- 41 圖412 01μF 非理想電容與不同等效串聯電感之阻抗曲線 ------------------------- 41 圖413 去耦合電容在封裝上和 PCB 上(a)封裝上(b)PCB 上------------------------- 42 圖414 PCB 加上去耦合電容之模擬與量測圖 ----------------------------------------- 43 圖415 封裝加上去耦合電容之模擬與量測圖 ------------------------------------------ 43 圖51 在封裝與 PCB 結構加去耦合電容----------------------------------------------- 45 圖52 加去耦合電容於不同位置的 21S 比較圖---------------------------------------- 46 圖53 ESR 對單顆電容 21S 的影響 ------------------------------------------------------ 47 圖54 去耦合電容的 ESR 對 21S 的影響------------------------------------------------ 48 圖55 ESL 對單顆電容 21S 的影響------------------------------------------------------- 49 圖56 去耦合電容的 ESL 對 21S 的影響------------------------------------------------ 49 圖57 在封裝上電容放置的位置 --------------------------------------------------------- 50 圖58 電容數量對 21S 的影響------------------------------------------------------------- 51 圖59 相異容值電容的並聯對 21S 的影響---------------------------------------------- 52 圖510 電容值大小對 21S 的影響---------------------------------------------------------- 53 圖511 加上一顆 100n 電容模擬結果 ---------------------------------------------------- 53 圖512 混合不同容值電容模擬結果 ------------------------------------------------------ 54 圖513 不同的封裝電源層厚度對 21S 的影響------------------------------------------- 55 圖514 不同的 PCB 電源層厚度對 21S 影響 -------------------------------------------- 56 圖515 電容與測試點的距離 --------------------------------------------------------------- 57 圖516 電容距離對 21S 的影響(a)case1 的模擬結果(b)case2 的模擬結果 -------- 58 圖61 UC-EBG 電源平面 ------------------------------------------------------------------ 60 圖62 UC-EBG (a)實際結構示意簡圖(b)正方形基本單元的四個參數 ----------- 61 圖63 二維傳輸線模型(a) Merged plane model (b) Distributed plane model ------ 62 圖64 狹縫耦合等效模型------------------------------------------------------------------ 62 圖65 UC-PBG 實作圖 --------------------------------------------------------------------- 63 圖66 UC-EBG 與相同尺寸的裸板量測與 2D-TL 模擬結果 ----------------------- 63 圖67 UC-EBG 等效模型 ------------------------------------------------------------------ 64 圖68 等效電容 C 與等效電感 L 並聯示意圖 ----------------------------------------- 64

圖69 具 UC-PBG 結構封裝設置在 PCB 上示意圖 ---------------------------------- 65 圖610 封裝設置在 PCB 上完整電源平面和具 UC-EBG 封裝比較圖 ------------- 66 圖611 單純封裝基板和封裝基板設置在 PCB 上之 21S 比較圖 --------------------- 66 圖612 電容擺放位置(a)均勻擺放(b)在通道上(c)在雜訊源附近 -------------------- 67 圖613 100n 電容結合 EBG 結構對 21S 的影響 ---------------------------------------- 68 圖614 100p 電容結合 EBG 結構對 21S 的影響 ---------------------------------------- 68 圖615 電容擺放位置(a)均勻擺放(b)在通道上(c)8 顆在雜訊源附近--------------- 69 圖616 增加 100n 電容結合 EBG 結構對 21S 的影響---------------------------------- 69 圖617 增加 100p 電容結合 EBG 結構對 21S 的影響---------------------------------- 70 圖618 裸版和 EBG 結構加入電容後的比較 ------------------------------------------- 70

1

第一章第一章第一章第一章序序序序

11 研究目的與方法研究目的與方法研究目的與方法研究目的與方法

隨著電子業短小輕薄快的發展趨勢主機板上的處理速度愈來愈快

電路元件密度也愈來愈高因此在主機板平面間產生許多高頻的干擾現象如瞬

時切換雜訊(SSNSimultaneous Switching Noise)及串音(cross-talk)等使主機板

上訊號完整性設計的挑戰愈來愈困難[1-4]對於電源供應系統(power delivery

system)當 IC工作狀態快速切換由於層與層間寄生元件而使動力面間產生

暫態壓降即為所謂接地彈跳雜訊(GBN)或暫態切換雜訊(SSN)[5-8]影響系統

對邏輯運作的正確性在印刷電路板中動力面可視為平行板波導結構動力面

間的接地彈跳雜訊使得動力面共振因而造成電磁輻射為了防制這樣的效應

許多解耦合(decoupling)的方法已被廣泛研究如在引起彈跳之激發源附近加入

解耦合電容稱局部解耦合電容(local decoupling capacitor)或在整個主機板平

面上均勻擺放多顆解耦合電容稱總體解耦合電容(global decoupling capacitor)

或在切割接地面分為多個區域使不互相干擾稱為電源島(power island)[59-13]

及利用週期性電磁能隙結構(electromagnetic band-gap structure EBG)來抑制接地

彈跳雜訊等

圖 11 為現今四層印刷電路板結構之簡化模型此四層板由兩塊二層板構

成大小分別為小板為晶片封裝中之電源供應平面及大板模擬主機板之電源

供應平面均填充 FR4介質兩板間相隔為空氣層而層間以 via分別連接彼此

之 powerground 平面此結構同時可探討主機板上具晶片級封裝結構之情形

模擬封裝結構與主機板間的互連經由如此簡化之模型我們即可利用數值模擬

方式探討封裝與主機板間接地彈跳的相互影響情形

不同於利用萃取集總元件組成整個電源平面的模擬方式現有許多全波

(full-wave modeling)模擬方法可完整描述待測結構之電磁場分佈情形如混合電

2

位積分方程法 (Mixed-Potential Integral Equation MPIE)有限元素法 (Finite

圖 11 晶片級供電平面與主機板供電平面之簡化模型

Element Method FEM)或時域有限差分法 (Finite Difference Time Domain

Method FDTD)等[591415]分別可由時域或頻域觀點切入利用求解電磁方程

式的方式得到電磁場解目前市場上已有許多套裝軟體如 HFSSSPEED2000

等係利用上述不同之數值方法構成可方便工程人員進行研究分析

本文為解耦合電容對防制接地彈跳效應之效果加以研究利用圖 11之簡化

的多層電路板模型以雙面印刷電路板進行實際量測同時選擇二維傳輸線之數

值模擬方法利用模擬與量測互相搭配作驗證期望找出可抑制接地彈跳於限定

範圍之下之有效率的電容擺放方式以往已有許多論文發表利用 FEM 和 3D

FDTD探討解耦合電容效應之類似研究[6916]但以三度空間描述待測結構其

優點為對結構描述簡單且詳細並且可對實際結構得到良好的預測結果但其缺

點需耗費較長之模擬時間及大量記憶體資源由於簡化之主機板模型具兩平行

板結構之特性可符合以二維傳輸線之方式來描述此方法不但結合了以三维電

磁場模擬方法的準確性和等效電路的方便性和快速同時可以模擬電磁波在平板

間的傳波和非線性元件電路

架構出此快速模型後可利用此模型找出有效接地彈跳防制之解耦合電容配

置方式由於電容在主機板上的擺放方式主要分為總體解耦合電容(global

Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3

decoupling capacitor)及局部解耦合電容(local decoupling capacitor)總體電容指

距離激發源較遠的電容這樣放置的電容一般會以散佈(distributed)在主機板上

各處的方式擺放對板子整體提供一個大的電容值因此可提供降低板間轉移阻

抗的效果而局部電容指鄰近激發源的電容可馬上提供雜訊源所需電流使

主機板上電壓波動穩定而達到降低接地彈跳的功用在接地彈跳防制上對於

解耦合電容的位置數量及容值的選擇一般只靠工程師依經驗判斷而在我

們使用建立的二維快速模型下可以快速計算出符合限制條件下之適當電容位

置提供多層印刷電路板上擺放解耦合電容的一個依據

在最後我們將結合二維傳輸線的模型和槽孔的耦合傳輸線模型對電路板

中的槽孔和週期性電磁能隙結構用來抑制接地彈跳雜訊的方法做快速的分析

且結合電磁能隙結構和去耦合電容來達到寬頻的抑制效果

12121212 論文大綱論文大綱論文大綱論文大綱

本論文第一章為序論包括研究目的研究結構與方法的陳述第二章介

紹接地彈跳雜訊產生的原因影響和解決的方法做個概論性的描述第三章為

二維傳輸線演算法探討其模型與架構並做頻域與時域的分析對此方法的準

確性做驗證第四章為多層板結構探討討論晶片封裝與主機板結構之間模態互

相的耦合對於電源平面品質的影響第五章為去耦合電容對電源雜訊影響討

論去耦合電容的位置數量使用的容值和板層厚度對抑制接地彈跳雜訊對如

何使用去耦合電容提供一個依據第六章為槽孔與電磁能隙(EBG)結構之模擬

探討 EBG結構結合去耦合電容對接地彈跳雜訊的抑制效果第七章將針對本論

文中的研究成果作一結論

4

第二章第二章第二章第二章接地彈跳接地彈跳接地彈跳接地彈跳雜訊雜訊雜訊雜訊

22221111 接地彈跳接地彈跳接地彈跳接地彈跳雜訊雜訊雜訊雜訊成成成成因因因因

接地彈跳雜訊(Ground Bounce Noise)簡稱 GBN的主因是源自於在高速數位

電路中訊號線與電源平面相接其間存在著寄生的電感電容電阻效應當

IC快速切換時導致暫態電壓ΔV產生於電源平面間我們稱此雜訊為接地彈跳

雜訊(Ground Bounce Noise)電路路徑設計或 IC封裝所造成的雜散電感當系

統的速度愈來愈快亦或是同時轉換邏輯狀態的 IC 接腳個數愈多時就愈容易造

成接地彈跳雜訊現象是數位系統的幾個主要雜訊來源之一我們將電源平面視

為一平行導波結構此接地彈跳雜訊將造成電源平面層共振可發現在共振頻率

點附近接地彈跳雜訊對訊號品質(SI)與電磁干擾(EMI)的影響顯著接地彈跳所

造成的雜訊常見的現象是會造成系統的邏輯運作產生誤動作[2317]圖 11為典

型的邏輯閘輸出端的電路圖其中CL 和 RL分別代表下一級邏輯閘的的輸入電容

和輸入電阻對於邏輯閘 1Q 而言CL 和 RL 是 1Q 的負載當 1Q 的輸出暫態由「邏

輯 1」轉變成「邏輯 0」時這時候輸出電晶體Q1會由rdquoONrdquo變成rdquoOFFrdquo而Q2會

由rdquoOFFrdquo變成rdquoONrdquo原先在邏輯 1 時VCC經由電晶體Q1充電到CL的電流會

經由電晶體Q2放電到地端電流 Icut在流經邏輯閘 1Q 接腳與印刷電路板的雜散電

感時會在雜散電感上產生一個反電動勢VGB這就是接地彈跳雜訊

Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut

圖 21 CMOS邏輯閘輸出端電路的等效電路圖

5

圖 22 dI dtcut 在邏輯轉態時最大

因為

1 0outcut L

dVI C

dt

minus=

(21)

其中 1 0outdV dtminus 正比於邏輯 1到邏輯 0的電壓變化率(和上升時間成反比)

cutGB

dIV L

dt= (22)

其中 L為邏輯閘接腳和印刷電路板的雜散電感dI dtcut 代表電流 Icut的變動率根

據圖 22在邏輯轉態時dI dtcut 最大我們可以將(71)代入(72)發現VGB 變成

2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t

minus minus∆= asymp

(23)其中 tr為邏輯信號轉態的上升時間如果有 N 個 IO 接腳發生轉態的動作

時則(21)可以改寫成

1 0

2

outGB L

r

VV NLC

t

minus∆= (24)

從(24)中我們可以歸納出底下幾點

1 雜散電感和接地反彈是正比的關係

2 負載電容和接地反彈也是成正比的關係

3 ∆V我們稱之為電壓變動量(voltage swing)這是指邏輯狀態 1 和邏輯狀

態 0之間的電壓位準差TTL的電壓變動量為 33 伏特CMOS為 5 伏

Icut

∆ minus I noiseb g

1 0outout L

dVI C

dt

minus=

6

特而 ECL 只有 014 伏特

4 上升時間 tr 則與接地反彈成反比的關係

5 同時切換邏輯狀態的 IO接腳個數 N也和接地反彈成正比

22222 2 2 2 接地彈跳雜訊現象與影響接地彈跳雜訊現象與影響接地彈跳雜訊現象與影響接地彈跳雜訊現象與影響

如圖 23所示在高頻數位電路中訊號線與電源平面 Vcc或 GND連接

在電源平面存在著寄生被動元件由於 IC 訊號快速切換導致暫態電壓 V∆ 產

生於動力面間我們稱此雜訊為接地彈跳雜訊當我們將電源平面視為平行板波

導結構在這平行板波導中將會有一至多的模態(mode)就激發出來其能量會被

限制在 PCB介質中而輻射很少它的共振頻率是由 PCB的結構參數所決定在

這些頻率點上PCB 就好像一個非常高 Q 值的共振腔並且其產生的電壓波會

馬上由這些點傳播出來而改變了板子上的VCC影響系統對邏輯運作的正確性

圖 23 高頻電路板佈局圖

接地彈跳雜訊的影響我們可以分別出三種效應[5]

1 邏輯切換會對切換 IC 本身造成一電壓降這個變化可能造成 IC的誤動作

如圖 23所示

2 傳遞的電壓波會造成離激發源一段距離的其他 IC 故障尤其當這顆 IC 是很

敏感的如時脈 IC等

3 故接地彈跳雜訊將造成共振在共振頻率點附近導致 PCB產生電磁輻射

(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

圖 24 地彈雜訊對信號影響圖

23232323 印刷電路板的共振頻率點印刷電路板的共振頻率點印刷電路板的共振頻率點印刷電路板的共振頻率點

目前數位序號的操作頻率雖然只有數百個MHz但是由於它的上升與下降

時間很短(數百 ps)因此它的頻寬範圍往往到達數個 GHz也就是說一個完

整的數位訊號除了本身的頻率外它的高次諧波分量也必須考量這是一個寬

頻帶的系統同時是一個高頻系統而一個印刷電路板(PCB)不論是封裝或是

主機板它的幾何結構的共振頻率也差不多落在這一個範圍因此掌握 PCB的

共振頻率對接地彈跳雜訊的抑制相當重要因為 PCB的高度遠小於 PCB的長

寬當電磁波在 PCB的內部不斷來回反射並形成駐波只有一小部分的能量向

外輻射因此我們可以用共振腔模式理論來分析 PCB的共振特性此時在幅

射金屬片及接地平面間介質基底內之電場場量可以僅考慮 zE 之分量同時 zE 不

為 z的函數而 x yE E 之分量可以忽略之亦即此時只存在 TM模態同時整

個 power與 ground之間可視為一共振腔模式結構來分析上下底為電牆

(Electronic Wall)而四周為磁牆(Magnetic Wall)不過應注意的是此共振腔模

式為一有損耗的空腔(Lossy Cavity)能量的損耗代表天線之電波能量幅射若考

慮以上說明之共振腔模式結構吾人可得到下列之波動方程式

2 22

2 20

zk E

x y

part part+ + =

part part

8

考慮電牆與磁牆的 BC特徵值與特徵函數可寫為

cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)

天線之電波能量幅射則考慮在磁牆上的等效磁流由等效原理知

M n E= minus times

(221)

其中 n為垂直磁牆單位向外分量E為磁牆上的電場強度

以 01TM 為例其等效磁流分佈

`

y

x

4

2

31


y

x

4

2

1 3

edge 13non-radiating edges

edge 24 radiating edges

9

根據上述原理將平板視為由上下兩個 PEC(VCC 和 ground平面)和邊緣為 PMC

所組成微帶天線(patch antenna)的系統由模擬結果我們可以看到共振頻率的出

現在這些頻率點 PCB 就好像一個相當完美的共振腔電壓波幾乎都被限在電

力平面之間我們由共振腔的截止頻率公式

2 2

2r

c m nf

a bγε

= +

(222)

其中 ab為Vcc 和接地平面的邊長c為光速mn為模數

22224444 印刷電路板的設計印刷電路板的設計印刷電路板的設計印刷電路板的設計

241241241241 印刷電路板上的輻射源印刷電路板上的輻射源印刷電路板上的輻射源印刷電路板上的輻射源

一個常見的錯誤是對 PCB的電磁輻射的關注往往侷限在某個電路晶片

上於是當 PCB 出現較強輻射時變設法對一些積體電路晶片進行屏蔽但

結果往往很令人失望因此有必要弄清楚究竟什麼是主要的輻射源然後才能對

症下藥抑制 PCB的輻射

首先從信號特性的角度考慮輻射最強的是週期信號電路根據頻譜分析

的理論週期信號的頻譜為離散譜線隨機信號的頻譜為連續譜這意味著週

期信號的能量集中在有限的幾個頻率上而隨機信號的能量分佈在無限多個頻率

上因此週期信號的能量更集中更容易產生干擾

從對電路輻射的實際測量結果可知輻射頻譜上最高的振幅通常是單根譜

線這對應週期信號及其諧波將一塊線路板的所有電路加電與僅給時脈電路加

電觀察他們的輻射情況會發現雖然所有電路加電時 PCB上產生的輻射頻

譜會更豐富但是輻射的最大強度與只給時脈電路時的輻射強度基本相同如圖

25所示

因此PCB上的週期信號是產生輻射最強的信號週期信號包括電路中的

振盪器時脈電路位址匯流排的低位元資料線和產生週期波形的功率電路等

這些強輻射電路設計實要特別注意的

10

圖 25 所有電路輻射圖和只有時脈電路輻射圖比較

從圖 25還可以獲得一個對工程有指導意義的結論即不用等到系統的軟

硬體全部完成後再進行電磁相容測試只要硬體電路完成後就可以進行電磁

相容測試早期發現問題解決問題可縮短開發週期因為系統軟體狀態對輻

射影響不是很大只要保證時脈或週期信號部分電路正常工作電磁輻射狀態也

就基本是實際上的最大輻射狀態了

其次從電磁輻射的原理考慮PCB的電磁輻射有兩種如圖 26所示一

種是由電路的工作電流迴路產生的輻射由於電路的工作電流是差模的因此這

種輻射稱為差模輻射另一種是由 PCB上的外接電纜產生的輻射稱為共模輻

射這是由於電纜端頭處有共模電壓在這各共模電壓的驅動下電纜上產生了

共模電流共模電流迴路產生輻射

圖 26 PCB上的兩種電磁輻射原理

差模輻射共模輻射

11

242242242242 多層印刷電路板多層印刷電路板多層印刷電路板多層印刷電路板

多層印刷電路板是解決 PCB上電磁相容問題的一個有效方法他不僅具有

降低地彈跳雜訊和降低輻射等作用還能使電路的傳輸阻抗穩定減小高速信號

的失真但是要充分發揮多層 PCB的優點再使用時需要注意一些細節問題

如圖 27所示為一四層板是最簡單也是最常用的一種多層板與雙層板

相比他能對 PCB的電磁相容性起到本質性的改善在四層板中用中間的兩

層專門做電源層和接地層這樣做的第一個好處是使電源線和接地線的性能大大

改善原因有兩個一是使電源線和接地線的電感大大減小從而大大降低了電

源線和接地線上的雜訊電壓另一個是電源層與接地層之間的夾層電容位電源提

供了非常好的高頻解耦合作用從而減小了電源線上的雜訊電壓目前有些 PCB

製造商製造一種專門的 PCB這種 PCB 特意增加了電源層與接地層之間的絕緣

介質常數在電源層與接地層之間形成了較大的電容

圖 27 四層板結構

四層板改善印刷電路板電磁相容性的另外一個原因是減小了所有高頻信號

電流的迴路面積高頻電流總是選擇回路面積最小的路徑流動而在四層板上

實際的高頻電流總是在信號線正下方的地線面或電源面上流動自然就形成了最

小的信號迴路面積

四層板的常規使用方法是中間兩層分別為接地層和電源層為了進一步降低

PCB的輻射有時用最外層坐電源層和接地層希望獲得額外的屏蔽效果但

是測試顯示這種方法獲得的好處並不顯著卻帶來了下列一些反面效果

(1)兩層信號層上的走線必須垂直否則由於距離很近會發生嚴重的串音

12

(2)在接地層上要打很多灌孔這些灌孔本來如果使用表面黏著元件是可以避免

的這對接地層的破壞作用不容忽視

(3)信號線的特性阻抗變低增加了驅動電路的負載

(4)看不到信號走線不利於分析電路問題

在元件密度很高的電路板中以及軍用設備和高科技產品中需要使用層數更多

的 PCB在定義多層板的每一層時須遵循以下原則

(1) 電源層和接地層相鄰利用兩層金屬之間的雜散電容可獲得良好的高頻電源

解耦合效果如果能在電源層和接地層之間使用介電常數高的絕緣介質增

加兩層之間的電容可獲得更滿意的效果

(2) 每層信號線都應該與一層接地層或電源層相鄰這樣可以使所有信號迴圈的

面積最小高速時脈信號線要與接地層相鄰

242424243 3 3 3 接接接接地面地面地面地面的完整性的完整性的完整性的完整性

當 PCB上佈滿了元件和走線時由於眾多的層間灌孔穿過地線面地線面

實際已經成了一個篩子網狀其阻抗比完整的接地面增加很多然而更嚴重的

事一些孔重疊起來形成了長狹縫如圖 28所示

圖 28 接地面上的長狹縫結構

長狹縫的危害是當信號回流從縫隙上方通過時他的返回電流不能從信號

13

線的正下方流回而要繞著縫隙走這樣就形成了較大的信號迴路可導致輻射

和信號完整性的問題如圖 29所示因此在佈線時要儘量避免在接地層上

行程長的狹縫一但接地面上出現了不可避免的長縫隙且走線為高頻信號時

此走線最好使用差動線(Differential Line)方式使信號受長狹縫的影響減小[18]

圖 29 接地面上的長狹縫的危害

一塊 PCB中可能同時有類比信號和數位電路時需要將數位電路與類比電

路在佈局上分開不能混雜從而避免兩者之間的耦合另一方面數位地和類

比地只能通過一點連接起來這時自然就形成了接地面上的長狹縫切忌此時數

位電路與類比電路之間的任何連線都不要跨過接地面縫隙而要從兩者的連接點

上通過如圖 210所示

圖 210 數位電路和類比電路之間的連線

接地面上的灌孔即時沒有重疊起來行成長狹縫也會影響接地面的阻抗這

14

一點在頻率較高電流較大的場合是一個不能忽視的問題例如大規模可程式

閘陣列在工作時需要電源線上的儲能電容提供很大的瞬間電流而這種閘陣列

電路的引腳排列的很密在接地面上形成了很多相距很近的小孔增加了接地面

的阻抗如圖 211(a)所示這時最好在晶片四周安裝儲能電容如圖 211(b)所

示

圖 211 大規模晶片解耦合電容的安裝

22225555 常見抑制接地彈跳雜訊的對策常見抑制接地彈跳雜訊的對策常見抑制接地彈跳雜訊的對策常見抑制接地彈跳雜訊的對策

222251515151 切割電源平面對接地彈跳雜訊的切割電源平面對接地彈跳雜訊的切割電源平面對接地彈跳雜訊的切割電源平面對接地彈跳雜訊的抑制效果抑制效果抑制效果抑制效果

為了減低接地彈跳雜訊對敏感 IC的影響一般業界使用的方法之ㄧ為切割

電源平面[19]在這些易受干擾晶片模組與系統電源平面間刻一矩形狹縫以形

成隔離的效果以切割狹縫的方式將雜訊源束縛於狹縫內部以避免內部雜訊

干擾到外部其他元件的正常工作另外切割狹縫使得平行板面積減小造成電磁

輻射共振點往高頻遷移如此可達到在工作頻率點內有良好的雜訊抑制效果且具

較低的電磁輻射場

其缺點是電源平面層若是完全的隔絕方式來抑制接地彈跳效應不但造成了

15

狹縫內外直流電位不同當內部訊號線與外部元件相連接時勢必要跨越狹縫而

造成更嚴重的訊號品質(SI)與電磁輻射問題為了解決上述的問題勢必要在內

部與外部區域間連結一通道使內外部電壓相等但若加入的通道過寬則狹縫

對接地彈跳的抑制效應即失去作用所以連結電源平面內外部通道的寬度有其重

要性

在印刷電路板中第一層和第四層為訊號層第二層和第三層為電源平面

由於本章著重於切割電源平面的效應為了了解接地彈跳雜訊對於印刷電路板的

影響我們將多層板簡化為電源平面結構作探討且使用 Ansoft HFSS模擬圖

212 為參考測試板的結構圖上下兩層為金屬結構面積大小為 10cmx10cm

分別代表 Vcc 和 GND電源平面板子厚度為 16mm介質係數 rε 等於 43

圖 212 測試的平行板結構圖

為了隔絕接地彈跳雜訊一個通用的方法為利用切割狹縫於動力面雜訊源周

圍圖 213為狹縫切割板結構在激發源周圍處切割狹縫狹縫尺寸大小為

4cmx4cm狹縫寬度為 1mm

圖 213 切割狹縫測試板佈局圖

16

圖 214 為切割狹縫於電源平面的模擬量測比較結果模擬與量測結果相當

吻合與參考測試板比較切割狹縫測試板的 21S 低於參考板 10~20dB尤其在

共振頻率附近由此可知狹縫可以有效阻隔切換雜訊值得注意的是在切割

狹縫板有一新共振頻率接近 177GHz此共振頻率為狹縫內 4cmx4cm 結構的

10TM 模態激發所造成的

圖 214 狹縫板模擬量測 21S 比較圖

由於切割狹縫阻斷了狹縫內外的直流電位準位所以在狹縫板右邊用通道作

連接使狹縫內外直流電位相同狹縫通道也可以提供訊號線迴路電流路徑避

免迴路訊號經過不連續狹縫造成訊號品質(SI)問題

圖 215為狹縫切割加連結通道的測試板結構測試板結構與狹縫切割板類

似不同處為於測試板右邊狹縫中間留一 6mm的通道以提供訊號迴路電流路徑

圖 2-13為狹縫切割板加連結通道模擬量測結果比較觀察頻段從 02GHz 至

2GHz實線為模擬結果虛線為量測結果

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)

measurementsimulation

excitation position (5cm 4cm) receiving position (4cm 8cm)

isolated board

reference board

17

圖 215 切割狹縫加通道測試板佈局圖

圖 216 模擬量測圖形比較

與參考測試板做比較可知在某些頻段範圍如 02GHz~05GHz以及

09GHz~13GHz 21S 值反而高於測試參考板表示雜訊無法被阻隔於狹縫內

由此可知切割狹縫可以有效阻隔雜訊傳播但加連結通道於狹縫上不但不能

改善接地彈跳雜訊問題反而產生ㄧ新共振頻率接近 420MHz造成訊號品質於

低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18

222252525252 High impedance surface(HIS)對接地彈跳雜訊的抑制效果對接地彈跳雜訊的抑制效果對接地彈跳雜訊的抑制效果對接地彈跳雜訊的抑制效果

High impedance surface[20-22]結構圖為三層電路板組成其中兩層為接地

層而接地層之一面利用數個週期性的 patch與 via EBG 結構與另一接地層相

接如圖 217所示

圖 217 High impedance surface 結構圖

此結構會有抑制地彈雜訊的原因可以由其等效電路(如圖 218)得知此結構

中的任兩個 patch間有一等效電容且 patch到 patch間電流的流經路徑有一等效

電感此等效之電容及電感形成一並聯之帶拒濾波器達到抑制地彈雜訊的目的

圖 218 high impedance surface 等效電路

L

+ -C

L

C

19

此結構的提出者為了可以更寬頻的抑制地彈雜訊利用串接的觀念把多個不同

大小及周期的 high impedance surface 結構串聯在一起(如圖 219)來達到增加頻

寬的效果

圖 219 high impedance surface 串聯結構

此結構雖然可以寬頻的抑制接地彈跳訊但有一些缺點

1 此設計必須有三層所以在成本上比較高

2 若要達成寬頻效果必需要串接多個不同週期及大小的 patch所以空間上比較

浪費

3對地彈雜訊有寬頻抑制效果的位置必須再此結構的最左邊或右邊

222255553333 去耦合電容對接地彈跳雜訊的抑制效果去耦合電容對接地彈跳雜訊的抑制效果去耦合電容對接地彈跳雜訊的抑制效果去耦合電容對接地彈跳雜訊的抑制效果

去耦合電容是一個最常見降低 SSN雜訊的方法以時域的角度來看當數

位訊號狀態改變時電路必須從電源曾吸收能量或由地線層釋放能量去耦合電

容可提供類似水壩的功能暫時提供或吸收一部分能量以減小電源擾動的現

象以頻域角度來看電路的切換可以視為一個高頻的雜訊去耦合電容提供了

一個低阻抗路徑使得雜訊可經由去耦合電容留至地線層而宣洩雜訊進而降低對

電源的擾動

一般去耦合電容有幾種使用方式主要分為總體解耦合電容(global

20





主機板上電壓波動穩定而達到降低接地彈跳的功用還有一種是使用所謂電容

牆的方式加去耦合電容於雜訊源四周以提供雜訊接地路徑當電壓波在平面

間傳播時電容將試圖抵消其波動因此波應該會被一rdquo電容牆rdquo所反射不同

的電容值擺放位置和電容放置數目皆有不同的雜訊防治效果藉由在易受干

擾的 IC四周擺放數個電容電容將可以對此 IC接地彈跳產生保護本文第五

章將對去耦合電容使用有詳細的說明與對各種條件的比對提供使用去耦合

電容的規則與依據

21

第三章第三章第三章第三章數值模擬方法數值模擬方法數值模擬方法數值模擬方法

31 31 31 31 簡介簡介簡介簡介

目前主要有三種方法來模擬電源系統平行板及封裝結構第一種方法是使用

集總元件模型電路板和封裝結構的電源平面被一個或少數量電感結合寄生電容

與電阻來表示所形成的模型並不複雜即時是模擬一個複雜的多層電源系統

如圖 31所示然而這簡單的集總元件模型並不能反應出高頻電磁波在板間的

傳播和電流在電路板和封裝之間的流動這些效應只能被分散式元件準確的模

擬出來

第二種方法就是用傳統三维電磁場及全波模擬去分析整個系統以三度空

間描述待測結構其優點為對結構描述簡單且詳細並且可對實際結構得到良好

的預測結果但其缺點需耗費較長之模擬時間及大量記憶體資源

第三種方法即是本論文所使用的 hybrid method以二维傳輸線模型來模

擬把電路板當做一個共振腔電磁波傳播在兩個平面之間而波在邊緣的反射

在穩態時會形成共振而此現象可以用電路板的阻抗對頻率的變化來做描述這

對抑制接地彈跳雜訊是個重要的依據所以數位元件走線和連通柱的模型都

可以簡單的與二维傳輸線電路板模型結合在一起並使用像 Hspice 等非線性電

路模擬器做快速的分析以這種 hybird method方法模擬不但結合了以三维電


間的傳撥和非線性元件電路

圖 31 電源系統的集總元件模型

22

32 32 32 32 二维傳輸線二维傳輸線二维傳輸線二维傳輸線模型模型模型模型

311311311311 基本單元與等效模型基本單元與等效模型基本單元與等效模型基本單元與等效模型

PowerGround Planes可以使用二維等效模型作為等效電路本文將採用

Keunmyung Lee與 Alan Barber於 1995年所提出的 PowerGround Planes Spice等

效模型[23-24]PowerGround Planes可以使用單元網格(Unit Cell)去做切割每

個單元網格為一集總元件模型為等效的 RLGC所組成如圖 32所示單元

網格分別可以用 T模型和Π模型表示他們主要差別是在 Half Cell但兩個模型

都可以得到相同的模擬結果這在接下來的章節得到驗證

rε

(a)

rε

(b)

圖 32 (a)PowerGround Plances結構與其網格切割示意圖(b)單元網格與其等效的

T Π型電路

23

假設每個單元網格的邊長為 wPowerGround Plances的厚度為 d夾層介

質常數為ε介質的 loss tangent為 tan(δ)金屬厚度 t金屬導電率為 cσ 那每

個單元網格的等效 RLCG 參數由(31)式所表示

2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)

在上述公式中 0ε 為自由空間的介電係數 0micro 為自由空間的導磁係數而 rε

為介質相對介電係數 dcR 為金屬 DC電流損耗 acR 則等效成金屬集膚深度的損

耗而 dG 為兩個金屬面之中的介質損耗

312 PowerGround Plances 等效模型等效模型等效模型等效模型

使用上述的單元網格一個矩形 PowerGround Plances 便可由 RLGC元件

組合成一分散式網路當使用 T model組成時Half Cell與緊鄰 Half Cell串連而

成而Π model之間的 Half Cell 則互相並聯而成因為 PowerGround Plances

為一電路結構所以我們可以在 Spice中產生Modified Nodal Analysis (MNA)

equations來模擬電源層平板當使用 T model時有一點需要特別去注意因

為平行板邊緣為一磁牆 (Magnetic Walls)我們要在邊緣連接上電阻這電阻在

模擬上需要一個很大的電阻值( 17R 10eg = Ω )因此這些電阻就等效成開路電路

因為要達到良好的模擬結果每個單元網格的邊長需小於模擬最高頻率波長的

110圖 33所示為由四個 T 和Π model 所組成的等效電路圖 33中 Zs和Yp 代

表的等效公式由(32)所示

tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24

圖 33四個單元網格(T and Π model) 組成的等效電路

33 33 33 33 模擬模擬模擬模擬結果結果結果結果

333333331111 電源裸版測試電源裸版測試電源裸版測試電源裸版測試

為研究主機板電源供應系統(Power-Delivery System)中的接地彈跳效應可

利用量測或模擬方法加以分析而首先須利用主機板動力面(powerground plane)

模型如圖 34將複雜主機板簡化為僅考慮電源供應平面之結構以方便實驗

探討在量測方面此簡化模型可利用雙層玻纖(FR4)電路印刷板(Printed-Circuit

Board)實現並以 SMA接頭作饋入(port 1)及接收(port 2)訊號端由向量網路分

析儀(Vector Network Analyzer)量測 S 參數以分析激發源對接收位置之影響模

擬方面將採用所建立的 PowerGround Plances二維模型在 Hspice中模擬得到

頻域之 S 參數結果

本章所用測試板結構尺寸如圖 34 所示雙面印刷電路板長寬各 9cm 及

9cm厚度 04mm夾層介質為 FR4介電常數( rε )為 43以電路板左下為原點

則饋入埠(port 1)位置為(45mm 45mm)接收埠(port 2)位置為(15mm75mm)

25

圖 34 雙面印刷電路板模擬電源供應平面之測試結構圖

將圖 34 之結構進行量測與模擬其 S 參數結果如圖 35 所示此 21S 曲線

顯示測試板在 port 1處激發時port 2受到之干擾情形隨頻率不同 21S 值愈大

代表 port 2受到的影響愈大圖 35中之波峰發生頻率恰與此測試結構以同

尺寸之共振腔結構計算出的共振頻率相同表示簡化的電源供應平面模型可被

視為一共振腔之結構而且也適用共振腔之計算方式來預測共振發生之頻率

圖 35 亦顯示量測與兩種模擬方法均可得到趨勢吻合的 21S 曲線表示以

FDTD模擬此動力面結構可良好預測真實結果另外在此測試中利用 3D FDTD

之模擬需模擬時間 2小時 15分而二维傳輸線模型僅需要 18分鐘顯示二維模

擬可提供良好時效性

圖 35雙面印刷電路模擬與量測比較圖

0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)

2D_TLFDTDMeasurement

26

可以看到圖 35的模擬結果中模擬值的 peak點的振幅大於量測值那是因

為沒把介質損耗和金屬損耗考慮進去的關係如果把介質損耗金屬 dc 損耗及

集膚深度考慮進來其中 loss tangent為 002圖 36為修正後的模擬結果

圖 36雙面印刷電路加入損耗模擬與量測比較圖

將圖 34之測試結構以加入介質和金屬損耗後重新模擬比較加入 loss修正

前後之模擬結果差異圖 36為測試結果經加入介質損耗和金屬損耗修正後之

曲線在高頻之模擬值可與量測值吻合表現出介質高頻衰減的現象因此修

正後之 2D模擬模型可由 DC到 5GHz全頻段準確預測待測裸板之量測結果

332332332332 接地彈跳雜訊共振效應接地彈跳雜訊共振效應接地彈跳雜訊共振效應接地彈跳雜訊共振效應

Simultaneous Switching Noise 或稱為 Delta-I Noise就是一顆 IC或多顆 IC數

個輸出端的邏輯準位同時作切換切換電流在 Power或 Ground 端所造成的雜

訊再這裡我們使用三角波電流源來模擬同時切換電流 I然後觀察雜訊電流在

PCB上造成電壓波共振的情形圖 37 是我們模擬使用的電流源圖及其頻率響

應上昇時間(rise time)和下降時間(fall time)為 01ns

0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)

2D_TL2D_TL_LOSSMeasurement

27

(a)

(b)

圖 37 (a)delta_I noise (b)delta_I的頻率響應

由電流雜訊的頻率雜訊圖可知其為一寬頻訊號這裡所用測試板結構尺寸

跟圖 34所示相同雙面印刷電路板長寬各 9cm及 9cm厚度 04mm夾層介

質為 FR4介電常數( rε )為 43以電路板左下為原點電流雜訊激發點(port 1)

位置為(45mm 45mm)而電壓波的觀測點(port 2)位置為(15mm75mm)

0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28

圖 38 激發點的電壓波動

圖 39 觀測點的電壓波動

圖 38 和圖 39所示為模擬一 delta-I雜訊電流脈衝所造成的電源平面電壓的

變動圖 38為激發點的電壓波動而圖 39為觀測點的從圖 38中得知雖

然突波只會延續相當短暫的時間然而其電壓波卻會在電力平面間來回不停地傳

播相當長的一段時間所以觀測點的電壓波動就是由於電壓波來回震盪所造成

因此如果電力平面上的其他 IC在這段電壓漣波時切換則可能造成 IC的誤動作

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29

圖310所示為使用二维傳輸線模型模擬實際的電力平板PCB的觀測點(port2)

的轉換阻抗由模擬結果我們可以看到共振頻率的出現在這些頻率點 PCB 就

好像一個相當完美的共振腔電壓波幾乎都被限在電力平面之間我們可以由共

振腔的截止頻率公式(式 222)得到相對應的共振模態

圖 310 時域雜訊轉為 Z 阻抗頻率圖

我們可以看到當電力平面為有限大時接地彈跳是相當糟的可以預期的能

量會一直存在於兩平面之間並且在邊緣間來回不停的反射系統間的傳播電壓

波動對連接到平面間的 IC造成偏壓的影響偏壓變動為 IC錯誤操作的原因之

一且因為共振會比連接電感所造成的突波延續一段很長的時間共振會對數位

系統產生很嚴重的影響

0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30

333333333333 切換雜訊的時域模擬切換雜訊的時域模擬切換雜訊的時域模擬切換雜訊的時域模擬

數位電路邏輯狀態切換的瞬間必須從電源吸走或排出大量電流而造成電壓

擾動且當數位電路的切換速度越快或者同時切換速度元件數越多時電壓擾動

的程度就越嚴重這種擾動信號即瞬間切換雜訊(Simultaneous Switching Noise

SSN)它會藉由電源與地層兩平行面傳撥並干擾對雜訊敏感的區域造成信

號的誤判或輻射本節藉由一個簡單的 CMOS 反向器結合二维傳輸線所構成的

電源平面觀察當 IC 做切換時電源平面上的電流流動

(a)

(b) (c)

圖 311 (a)模擬架構圖 (b)IC 輸入與輸出圖 (c)IC切換造成電源雜訊

如圖 311所示一個 CMOS 反向器放在 4cm X 4cm電源平面上一個 33V

的電源放在左下角而圖 311(b)和 311(c)為信號輸入輸出圖和切換所造成的雜

15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31

訊為了觀查方便我們只做 Vout 從 Low到 High的切換觀察電源平面上的

流動

圖 312 IC切換時電源平面上的電流圖

如圖 312所示箭頭代表電流方向底部顏色代表電流的大小顏色越深

代表電流越大

32

圖 313 輸出從 Low到 High時流過 PMOS的電流

根據圖 313 流過 PMOS的電流即 CMOS 反向器切換時需要從電源平面抽

取電流的大小配合 311的電流圖我們可以把 IC切換時分為三個階段第一

階段由於中心點突然需要大電流所以向電源平面四面八方要求提供電流可

以看到向外面擴大現象而電流流動方向都是向中心點集中第二階段理想電

源開始提供電流且中心電流需求降低所以電流會向其他方向流動去填剛才

提供電流給 IC而造成電壓波動的地方第三階段主要是理想電源提供電流

到最後可以發現中心點電流跟其他地方一般大代表 CMOS 需求電流結束而

電流的流動會等到平面的穩定從這裡可以得到電源平面如何提供 IC切換電流

的情形從中我們可以知道如果我們要加電容去抑制 SSN電容應該擺放在

IC的附近使電容在近就可以提供電流給 IC減小電源平面的電壓波動而電

容的擺放應散佈四周圍因為由電流的流動可以知道電流是從四面八方來的

19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

第四第四第四第四章章章章封裝與封裝與封裝與封裝與 PCBPCBPCBPCB 系統系統系統系統

44441111 電源系統架構之描述電源系統架構之描述電源系統架構之描述電源系統架構之描述

隨著人類對高速資料處理與運算的需求電腦科技的進步一日千里而電腦

的架構除了 IC晶片製程的尺度越來越小各元件彼此間的連結的密度也越來

越高操作頻率更是越來越高相對地計時(timing)的掌握也必須愈精確目前

數位訊號的操作頻率雖然只有數百個MHz但是由於它的上昇和下降時間很短

(數百個 ps)因此它的頻寬範圍往往到達數個 GHz也就是說一個完整的數位

訊號除了本身的頻率外它的高次諧波份量也需考量這是一個寬頻帶的系統

同時也是一個高頻系統而一個印刷電路板不論是封裝(package)或是主機板

(mother-board)它的幾何結構與電路共振頻率也差不多落在這一個範圍不當的

電源傳輸系統設計將導致電源品質的惡化甚至造成系統無法正常操作

此外由於元件的密度愈來愈高數量愈來愈多降低每各元件的消耗功率是

當務之急因此低操作電壓與低擺幅是普遍的設計趨勢然而操作電壓的下降也

表示它越容易受到雜訊的影響這些雜訊來源很廣如耦合(couplimg)串音

(closstalk)電磁輻射(Electro-Magnetic InterferenceEMI)但是影響最大的是來

自於電源的雜訊特別是當數個訊號同時開關時所產生的同時切換雜訊

(simultaneous switching noiseSSN)[2-5]

通常整個電源供應系統除了包含電路外系統外也包括了電源面與接地面所

形成的電磁場系統也就是電源面與接地面所形成的共振腔結構圖 41 是一個

電源傳輸系統示意圖電源從電源供應器輸入後經過 via到達電源面與接地面

再通過 via 傳到封裝上的電源面與接地面最後再通過接合線(wire-bonding)或直

接(如 flip-chip)輸送到 IC 晶片內部通常為了確保電源系統的穩定會加上去

耦合電容因為這個電源供應系統已進入微波範圍高頻雜訊容易被儲存電源平

面形成的共振頻率上造成電源品質的降低

34

圖 41 電源輸送系統示意圖

圖 42 電源系統簡易集總元件圖

35

42424242 封裝與封裝與封裝與封裝與 PCBPCBPCBPCB 系統量測與結果系統量測與結果系統量測與結果系統量測與結果

一般在探討接地彈跳雜訊通常只對單純一個 PCB作討論且量測 PCB的

S 參數(scattering parameter) 21S 來表示接地彈跳雜訊大小的依據在 port1 代表

SSN激發源的位置也就是 PCB上主動 IC的位置而較小的 21S 代表較好的 PDS

設計和較小的 GBN然而一般雜訊是從 IC上產生透過封裝電源系統再透

過 via或封裝上錫球的連接到達 PCB的電源系統所以不能只簡單考慮單一

PCB或封裝電源系統架構必須把兩個結構做結合才能正確地描述出 GBN在

高速數位系統中的行為[26-27]

圖 43為我們設計的一個架構來代表封裝在 PCB上的電源系統其中四

層 BGA package的大小為 4cmx4cm厚度為 015mm兩層的 PCB大小為

10cmx10cm厚度為 07mmpackage 和 PCB中的介質都是使用 BT介質在

package上最上層為信號走線及電源與接地環而最下層為錫球來和 PCB 做連

結

圖 43 BGA封裝設置在 PCB上之結構

36

圖 44 BGA封裝設置在 PCB上結構之截面圖

量測此結構之 S 參數我們使用網路分析儀(HP8510C)結合探針工作台

(Microtech probe station)從 50MHz 量測到 5GHz在信號的量測上我們使用

兩個 450microm-pitch GS的探針探針的 signal接到 package 信號層上 power ring上

而探針的 ground 則接到 package 信號層上的 ground ring整個量測架構如圖 45

所示

圖 45 BGA封裝設置在 PCB上結構之量測設置圖

10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37

封裝結合 PCB結構量測 S 參數圖如圖 46所示為了探討此結構的 GBN 特

殊行為表現我們也做了單一封裝和 PCB的量測結果了解考慮整個 PDS系統

和單一 PCB之間的差別

圖 46 BGA封裝設置在 PCB上結構之量測結果

從圖 46中的量測結果我們可以看到三種結構的 GBN行為有很大的差異

首先考慮只有單一封裝時的 S 參數在 13GHz之前的行為像一個單一電容在

15GHz 後才有結構共振模態的產生如果考慮單一 PCB結構時在 05GHz 後

就有共振模態的產生像 073GHz( 01TM )092GHz( 10TM )117GHz( 11TM )所

以其 GBN行為比單一封裝結構來的糟最後我們考慮封裝結合 PCB結構量測

點的位置在封裝上的 power ring上可以看到在 15GHz之前比單一封裝結構

時多了三個共振點這些多的雜訊共振點來至於 PCB雜訊因為封裝的

powerground planes 和 PCB的 powerground planes 透過之間 via 和錫球的連結

使的 PCB雜訊耦合到封裝 PDS上這會使得在封裝上的 IC受雜訊影響更嚴重

這跟只考慮單一封裝和 PCB時有很大的不同

0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)

Bare pkgBare PCBpkg+PCB

38

43434343 封裝與封裝與封裝與封裝與 PCBPCBPCBPCB 系統之二維傳輸線模擬系統之二維傳輸線模擬系統之二維傳輸線模擬系統之二維傳輸線模擬

434343431 封裝與封裝與封裝與封裝與 PCB 系統系統系統系統

封裝的電源供應平面不僅是用來提供晶片所需的電源更重要的是它為晶片

中數位電路電壓準位的參考依據由於現今數位電路朝向高速低電壓發展使

的電源平面完整性變的日益重要高速的數位電路常常在訊號線換層時在電源平

面激發出同步切換雜訊（SSN）這雜訊往往在電源平面間藉由共振腔模態的方

式在電源平面間傳播開來造成嚴重的 PI或 SI的問題除此之外封裝的電源平

面也會遭受來自 PCB的雜訊耦合其現象已由上一節結果得知低頻部分遭受

雜散效應以及 PCB雜訊的的影響高頻部分主要為封裝本身的共振我們已經

從實際量測中了解對於一個完整電源系統包括封裝與 PCB結構不能用單

一封裝與 PCB結構去探討因為之間有雜訊互相耦合的機制在本節中我們

要使用二維傳輸線模型快速去分析這樣一個複雜電源系統來描述封裝和 PCB

之間的互連方式

同樣地對於封裝與 PCB的 powerground plane 我們用二維傳輸線去計算

其個別接地彈跳的現象在第三章中我們已經證實此方法準確性但對於封裝結

合 PCB此四層板結構中間靠錫球和 via 做連結對於錫球和 via我們在模擬中

將使用電感去模擬電流流過這些互聯結構時所產生的電感值其簡單的示意圖

如圖 47所示

圖 47 BGA封裝設置在 PCB上結構之模擬示意圖

( )rε ω

( )r

ε ω

39

對於 via電感的估計我們使用式(41)去估算每根 via的電感值

[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)

式(41)中 d為 via的直徑而 h為 via的高度且單位都為 inch因此我們錫球估

計電感值為 03nH總合 via 和錫球的電感值為 048nH圖 48為封裝結合 PCB

實作圖而圖 49為量測與模擬比較圖由比較圖得知模擬與量測相當準確說

明此方法的可行性且只要 25分鐘便可快速得到

圖 48 BGA封裝設置在 PCB 實作圖

圖 49 BGA封裝設置在 PCB結構之模擬與量測圖

0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)

measurement_pkg+PCB2D_TL

40

因為總合的電感值為估計值實際 via 和錫球總合電感可能高於 048nH或

低於所以我們取多種電感值去做模擬結果如圖 410所示

圖 410 封裝和 PCB連結 via 和錫球電感值影響

由結果得知電感量的改變對 1~2GHz結果幾乎沒改變2GHz以後的結果

只有些許的差異可以知道我們估計的電感值對結果影響並不大

434343432 封裝與封裝與封裝與封裝與 PCB 系統系統系統系統-加去耦合電容加去耦合電容加去耦合電容加去耦合電容

一個理想電容之等效電路如圖 411(a)表示為一個電容值 C 的電路但

在實際情形下電容由於製造與銲接等因素會帶有寄生電感及電阻因此其等

效電路應為一個 RLC串聯的形式如圖 411(b)其中 LR分別為電容 C之等

效串聯電感電阻(Effective-Series-Inductance Resistance簡寫為 ESLESR)

串聯 RLC 為一諧振電路使得電容阻抗之頻率響應不是一個理想的與頻率成反

比的曲線而成為一個具有零點形式的曲線如圖 412

0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)

power_via_014npower_via_028npower_via_048npower_via_056npower_via_08n

41

(a)

(b)

圖 411 電容等效電路(a)理想電容(b)具等效串聯電感電阻之實際電容

1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH

zero point (self-resonent)

圖 412 01microF 非理想電容與不同等效串聯電感之阻抗曲線

圖 412 說明非理想電容的特性零點(波谷)發生於電容與其寄生電感產生共

振時之頻率此共振點稱為電容的自我共振頻率(self-resonant frequency)表示電

容在這個頻率時C 值與 ESL 值造成的阻抗恰互相抵消達到阻抗的最低點

此時之阻抗值即為 ESR值(圖中為 0001Ω)此共振點會隨 ESL值降低而漸往高

頻移動而電容 C的功能僅發揮於自我共振頻率之前在高於自我共振頻率後

整個電容的功用反而由寄生電感 ESL 主宰阻抗隨頻率升高也就是說當我

們在高於自我共振點的頻率下使用一顆電容此電容其實並不會有電容的功用

反而形同使用一顆電感

對與使用二維傳輸線建立的 powerground planes模型模擬加上去耦合電容

去抑制 GBN 是相當容易的只要把使用電容等效的容值寄生電容和寄生電

感放在加上去耦合電容的節點位置因此我們在所做的封裝結合 PCB 結構中加

上去耦合電容如圖 413(a)和圖 413(b)所示分別加上 52顆去耦合電容在封裝

42

上和 63顆電容在 PCB上所使用的去耦合電容所量測得到的容值ESRESL

為 100nF004ohm063nH

(a)

(b)

圖 413 去耦合電容在封裝上和 PCB上(a)封裝上(b)PCB上

43

圖 414 和圖 415為實際量測與模擬比較圖其結果如下實線為量測結果

虛線為模擬結果而另一條實線為量測未加去耦合電容的封裝結合 PCB結構

圖 414 PCB加上去耦合電容之模擬與量測圖

圖 415 封裝加上去耦合電容之模擬與量測圖

0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)

measurement_pkg+PCBsimulation_pkg+(PCB+cap)measurement_pkg+(PCB+cap)

0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)

measurement_pkg+PCBsimulation_(pkg+cap)+PCBmeasurement_(pkg+cap)+PCB

44

從量測與模擬比較結果得知當使用二維傳輸線方法去模擬 powerground

planes加上去耦合電容可以得到很好的預測結果在效率上加上多顆去耦合電

容並不會多增加模擬時間時間也約為 25分鐘因為在 Hspice模擬下元件數

的增加對計算時間影響並不大主要的影響是在節點數

45

第五第五第五第五章章章章去耦合電容對電源雜訊的影響去耦合電容對電源雜訊的影響去耦合電容對電源雜訊的影響去耦合電容對電源雜訊的影響

55551111 電容在封裝與電容在封裝與電容在封裝與電容在封裝與 PCB 系統系統系統系統之理想位置之理想位置之理想位置之理想位置

一般對於電源平面雜訊傳統的抑制方法為使用去耦合電容對於去耦合電

容使用已有許多討論[1228-29]但電容值大小位置以及個數大致上還是基於

經驗法則就位置而言在封裝結合 PCB電源系統架構下如圖 43所示我

們是該把去耦合電容放置在封裝PCB或兩個都放上去耦合電容在設計封裝

級電源系統時常會困擾著這節我們將討論如何放置才能達到最好的抑制效果

圖 51在封裝與 PCB結構加去耦合電容

如圖 51所示我們放電容的位置分為三種一是在 package上放置了 52

顆的去耦合電容二是在 PCB上放置了 63顆去耦合電容而第三種情況是同時

在 package 和 PCB上各放置了 52 和 63顆去耦合電容電容值大小為 100nF而

ESR 和 ESL為 004Ω與 063nH所得到的量測結果如圖 52所示

PCB

package

Decoupling capacitors

Testing port

46

圖 52加去耦合電容於不同位置的 21S 比較圖

首先把從低頻到 5GHz分成三個階段一開始從低頻到 500MHz左右不

管在 package或 PCB上加上去耦合電容可以看到加上電容後比沒加電容時

大大降低了結構的阻抗減少 GBN干擾第二是從 2GHz~5GHz三種加電容

的方式和沒加電容時做比較對抑制 GBN效果並不大因為當電容超過了本身

共振頻率後隨著頻率的升高去耦合電容將逐漸失去功能所以對較高頻的雜訊

將失去抑制的效果從 05GHz~2GHz在 package上和同時在 package與 PCB

上加去耦合電容兩種方式可以抑制效果差不多可是只在 PCB上加上電容

可以看到在 800MHz多了一個新共振點這比沒加電容時更糟所以當我們只用

去耦合電容在 PCB上時須特別注意可能因加上電容後反而使電源雜訊更嚴

重另外可以看到的是加入電容後的波形在 2GHz 後對抑制雜訊的能力並沒有

顯著改善那是電容寄生電感所造成的限制對高頻並沒有抑制雜訊的能力

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52525252 去耦合去耦合去耦合去耦合電容寄生元件的影響電容寄生元件的影響電容寄生元件的影響電容寄生元件的影響

521 去耦合去耦合去耦合去耦合電容等效串聯電阻電容等效串聯電阻電容等效串聯電阻電容等效串聯電阻 ESR

去耦合電容的等效串聯電阻(ESR)是由電容的引腳電阻與電容本身的介質

損耗和金屬損耗所構成的當有電流流過電容器的時候ESR 將使電容消耗能

量由於現在電子技術的發展供應給數位 IC的電壓呈現越來越低的趨勢從

原來的 3~4 伏特降到現在的 2 伏特以下但由於電晶體密度越高和頻率的激增

需求的功率卻是越來越大也就是說現在電路板中電流是越來越大所以當透過

電容的電流越來越高的情況下假如電容的 ESR值不能保持在一個較小的範圍

那就會產生比以往還高的雜訊電壓另一個更主要的因素是降低 ESR將可增加

電容的放電速度放電速度的增加對去耦合電容尤其重要因此 ESR 是去耦合

電容重要的電性參數很多電子元件都強調 Low ESR的特點

在模擬上首先我們先看單顆電容 ESR 變化對其 S 參數圖的變化如圖

53所示我們可以看見當 ESR越來越大電容本身共振點的深度越來越低

因此降低了電容抑制雜訊的能力

圖 53 ESR對單顆電容 21S 的影響

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同樣地我們在封裝結合 PCB結構下在封裝上放置 12顆去耦合電容同

時改變去耦合電容 ESR的值結果如圖 54所示

圖 54 去耦合電容的 ESR對 21S 的影響

從圖 54中我們加入 12顆 100p電容固定其 ESL值改變 ESR值從 0

到 2Ω可以發現當 ESR值越來越大會將極點剷平同時零點也會被填平使

趨勢成為較平坦的曲線

521 去耦合去耦合去耦合去耦合電容等效電容等效電容等效電容等效串聯電串聯電串聯電串聯電感感感感 ESL

去耦合電容的串聯電感是由電容的接腳和電容本身寄生電感所構成

ESL增大對電容對去耦合電容抑制雜訊的能力影響甚大因為它不但會把電容本

身的共振頻率往低頻移動如使用相同容質的電容ESL 就影響此電容抑制雜訊

能力的頻寬使電容較快變為電感性而另一方面ESL的增大電容變為電電

感性後斜率也跟著變大使阻抗在同一頻率下變的更大單一電容對 ESL的變

化如圖 55所示

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圖 55 ESL對單顆電容 21S 的影響


時改變去耦合電容 ESL的值結果如圖 56所示

圖 56 去耦合電容的 ESL對 21S 的影響

從圖 56中我們發現 ESL越大共振點振幅變大且有往低頻移動的趨勢有

此可知 ESL增大對去耦合電容抑制雜訊的能力將大為降低

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53535353 電容數量和容值的影響電容數量和容值的影響電容數量和容值的影響電容數量和容值的影響

531 電容數量的影響電容數量的影響電容數量的影響電容數量的影響

通常為了抑制 GBN我們會在 powerground plane上加入多數的去耦合電

容本節一樣地在封裝結合 PCB電源系統下探討電容數量的多寡對 S 參數的

影響由之前的結果知道電容加到封裝上有較好的結果所以電容數量的探討

還是以在 package上為主電容放置方式如圖 57所示

圖 57在封裝上電容放置的位置

放置電容容值為 100nFESL為 063nHESR為 004Ω放置電容方式為散

布放置量測結果為圖 58加 4 和 8顆時在 0~200MHz時加上電容後比原來

沒加電容時有效壓低 21S 但在 400MHz附近產生新的共振點而之後把原本結

構共振點往高頻移動當加入 12~52顆電容後在低頻同樣地壓低 21S 且把在

400MHz附近的共振點振幅大大消減而在高頻部分把共振頻率點更往高頻移

動且共振點振幅也大為縮減

0 caps 4 caps 8 caps


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圖 58電容數量對 21S 的影響

當電容數量漸漸增加對雜訊的抑制能力也變的更好從原本只加 4~8顆的

300MHz提升到 12GHz當我們加入 52顆去耦合電容所以增加去耦合電容數

量對抑制雜訊的能力提昇是有幫助的

531 電容容值的選擇電容容值的選擇電容容值的選擇電容容值的選擇

去耦合電容容值的選擇對抑制接地彈跳雜訊很重要不合適的電容不但達不

到抑制的效果說不定反而會比沒加上電容時來的糟對於去耦合電容容值的選

擇從單一電容共振頻率點知道要抑制較低頻的雜訊我們使用電容值大的電

容對於高頻雜訊則選擇容值較小的電容因為其共振頻率點較高因此常常

有人疑惑如果我使用多種電容值的組合那不是能達到從低頻到高頻都能抑制

的效果這方法從直覺上是可行的但實際上確有很大的問題

將大容量電容和小容量電容並聯起來後這各並聯網路隨著頻率的變化可以

分為三個階段如圖 59所示在大電容的共振頻率以下是兩個電容的並聯網

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路在大電容的共振頻率和小電容共振頻率之間大電容呈現電感性(阻抗會隨

著頻率升高而增加)小電容呈現電容特性等效為一個 LC 並聯網路在小電

容的共振頻率以上等效為兩個電感的並聯

問題出現在第二各區段當大電容和小電容阻抗相等時相當於 LC 並聯網

路中的 L的阻抗等於 C的阻抗這個 LC 並聯網路就在這各頻率上發生並聯共

振導致其阻抗為無限大這時電容已經失去去耦合的作用如果剛好在這各頻

率上有較強的干擾就會出現雜訊干擾的問題若將大中小三種容值的電容

並聯起來會出現更多的並聯共振點

圖 59相異容值電容的並聯對 21S 的影響

我們同樣在封裝結合 PCB電源系統下討論容值對抑制 GBN的影響我們

在封裝上放上 12顆電容第一種 case為 100nF的容值ESR004ΩESL063nH

第二種 case為 100pF的容值ESR03ΩESL031nH其量測結果如圖 510

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大大大大大大大大大大大大小小小小大大大大大大大大大大大大大大大大大大大大大大大大小小小小大大大大大大大大大大大大大大大大1 2 3

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圖 510電容值大小對 21S 的影響

分別加入 100nF的大電容和 100pF的小電容做比較在 0~300MHz間大

電容有較好抑制結果而小電容只大概比沒加電容時低了 8dB而從

500~800MHz使用 100p電容有較好的抑制效果而當加上 100n電容會在

400MHz附近產生一個新共振點這是結構和 100n電容所產生的 LC共振點這

是我我們使用大電容時需注意的一點我們用只加上一顆 100n電容於結構上

可以看的更清楚如圖 511所示

圖 511加上一顆 100n電容模擬結果

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圖 512混合不同容值電容模擬結果

圖 512為使用兩種以上不同容值的模擬結果當使用 100nF電容和 100pF

電容從 200MHZ到 600MHz結果比單純使用 100nF 和 100pF時差而再更低

頻或更高頻也沒有比使用單一容值來的好而當使用 100nF1nF100pF 三

種電容時可以發現產生了更多共振點這在數位電路中需特別小心如果電路

產生雜訊剛好在這些共振頻率點將使雜訊放大對訊號產生影響或輻射另一

方面使用多種容值在高低頻也比使用單一容值來的差

所以對於電容容值選擇應該根據所要抑制頻段來決定當頻段決定後再

來根據電容廠商所提供電容共振頻率點決定要使用的電容選擇越低的電容 ESL

和 ESR越好當不能避免要使用兩種以上不同容值的時候最主要的是大電容

的電感值要越低越好這樣並聯共振點會產生在較高頻也會較接近小電容的共

振頻率點減小新共振頻率點對電源品質的影響

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54545454 板層厚度的影響板層厚度的影響板層厚度的影響板層厚度的影響

電源與接地平面之間即是一個平板電容器根據平板電容公式可知平板之

間的電容量與其面積與介電係數成正比與平板間的距離成反比平板電容亦可

視為一個去耦合電容由於面積有限所以可以應用高介電係數的材料或者降低

平板間距來增加電容量因為平板間的距離減小可以增加板間的電容且當有

高頻訊號電流在板間流動時也可降低電流流通距離間的電感值本節將在封裝

結合 PCB之結構下探討封裝或 PCB電源層厚度對抑制 GBN的影響

首先我們先固定 PCB電源與接地面之間的距離為 07mm然後改變封裝

電源層的厚度從 16mm~015mm分為四種 case為 16mm08mm04mm

015mm結果如圖 513所示

圖 513不同的封裝電源層厚度對 21S 的影響

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如圖 516所示當封裝電源層厚度越來越高第一個零點會向低頻移動

而從第四章的結果知道2GHz之前的雜訊來至於 PCB從結果來看 PCB耦合

上來的雜訊也變大了大了約十幾 dB而從 2GHz以後是受封裝結構的影響可

以看到當厚度增加後使的 21S 也變大所以封裝厚度對 S 參數影響是很大的

圖 514 不同的 PCB電源層厚度對 21S 影響

接著我們改變 PCB電源層厚度固定封裝電源層厚度為 015mm也是分為

四種 case分別為 015mm04mm07mm16mm討論 PCB板層厚度對 S

參數圖的影響結果如圖 514所示可以看到 PCB電源層厚度改變對整體趨勢影

響並不大只有在低頻部份稍有差異PCB板層越厚使第一個零點往高頻移動

在高頻只有波型稍有差異在大小上變化不大

我們知道去耦合電容的位置擺放在雜訊源越近越好因為能減少電容到雜訊

源之間距離的等效電感值讓電容能更快速的吸收突波降低雜訊達到穩定電

壓的作用同樣地我們降低電源層厚度能減小電源平面的寄生電感所以能降

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低電容與雜訊源之間距離的影響如圖 515在模擬上我們改變電容在封裝上和

測試點的距離遠的距離測試點 17cm近的距離測試點 02cm封裝和 PCB電

源層厚度分為二種 case第一種 case1為封裝是 015mm 和 PCB為 07mm第二

種 case2封裝是 16mm 和 PCB為 07mm電容為 100nFESR004ΩESL063nH

圖 515 電容與測試點的距離

(a)

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圖 516電容距離對 21S (a)case1的模擬結果(b)case2的模擬結果

由結果得知當因為封裝結構和繞線問題不能把電容家在雜訊源附近的時

候時我們可以藉由降低電源層厚度減少電容與雜訊源間距離的影響對於厚

板一般來講為大於 30 mils (0762mm)的板層厚度設計電源系統時電容位置是

需要被考量的但對薄板為約小於 10 mils(0254mm)電容可以放在離雜訊源較

遠的位置

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55 55 55 55 總結總結總結總結

最後我們對電容應用在抑制高速數位電路構裝中電源雜訊做一個總結首

先當討論一個封裝結構設置在 PCB上電源系統時要放去耦合電容去抑制電

源雜訊的理想位置是放在封裝上由實驗與模擬結果知道去耦合電容單獨放置

在 PCB上會再低頻產生一個新共振頻率比沒加電容時還糟至於在封裝和 PCB

上都放上去耦合電容與單獨放在封裝上由結果知道抑制效果差不多因此電容

位置理想在封裝上

對於電容寄生參數 ESRESL的影響關於 ESR的增大雖能把極點剷平

但從時域觀點知道充放電時間會變大和從單顆電容頻率響應圖也知道ESR

越大代表共振頻率深度越淺會失去電容降低電源平面阻抗的功能電容 ESL

越大會降低共振點頻率與加快共振點後阻抗上升速度所以越低的 ESL越好

放置電容數量越多對抑制電源雜訊越好而使用電容牆可以提高隔離效果

關於電容容值的選擇我們建議是根據雜訊的頻段去選擇電容的容值不要

使用多種容值的混用因為這樣會增加許多共振點雖然使用多種容值的組合能

使電容抑制雜訊的頻寬增加但如果雜訊發生在共振點上疊加的效果可能會比

預期的還嚴重

而對於板層深度的影響PCB板層深度對在封裝上的點 S 參數值幾乎沒有

影響但封裝板層深度在低頻卻會影響 PCB耦合上來的雜訊大小阪層厚度越

薄越能降低雜訊大小而高頻部份是受封裝的影響當然封裝板層越小 21S 值

越小

60

第六第六第六第六章章章章以電磁能隙以電磁能隙以電磁能隙以電磁能隙(EBG)(EBG)(EBG)(EBG)結構抑制地彈雜訊結構抑制地彈雜訊結構抑制地彈雜訊結構抑制地彈雜訊

66661111 電磁能隙簡介電磁能隙簡介電磁能隙簡介電磁能隙簡介

由前面章節的探討我們知道用去耦合電容去抑制地彈雜訊只能在低頻發揮

作用頻率在 1GHz以上電容便失去作用無法抑制高頻段的雜訊因此我們將

使用 UC-EBG(Uniplanar Compact Electromagnetic Band-Gap) structure來抑制接地

彈跳雜訊此種方法主要是利用週期性結構所產生的禁止頻帶(Stopband)使在頻

帶內的接地彈跳雜訊無法傳播取代傳統的完整或切割狹縫連結通道的電源平

面圖 61 是由 4 個基本的小單元 UC-EBG 所組成每個單元 UC-EBG 間以細

線做連結細線提供了主要的電感效應另外每個小單元間以細狹縫做區隔細

狹縫間之互容效應與電源平面之板間電容提供了主要電容效應利用並接的電

容電感效應來達到一寬頻的截止帶[30-32]

圖 61 UC-EBG電源平面

Port1(8mm13mm)

Port2(35mm36mm)

61

62626262 以二維傳輸線模擬電磁能隙以二維傳輸線模擬電磁能隙以二維傳輸線模擬電磁能隙以二維傳輸線模擬電磁能隙

我們將以二維傳輸線方法模擬 UC-EBG電磁能隙結構我們設計一個封裝

大小 UC-EBG電源平面基本單元和測試結構如圖 62所示板子為 42cmx42cm

的二層板基板為 FR4 材質( εr =43 )而 UC-EBG圖樣設計在 power層其中

基本單元的五個參數為 L(通道長度)=5mm W(通道寬度)=1mm G1(基

本單元間的間隙度)=1mm G2(通道與中央本體間隙度)=1mm

(a)

(b)

圖 62 UC-EBG(a)實際結構示意簡圖(b)正方形基本單元的四個參數

62

之前以二維傳輸線模型模擬的都是完整的電源平面但因為 EBG結構中有

細狹縫不再是一個完整的電源平面因此需要把 T模型和Π模型中 ground 和

power分開變成分散(distributed)式模型如圖 63所示所以在狹縫的單元模

型就只剩下 ground面的損耗 R

圖 63 二維傳輸線模型(a) Merged plane model (b) Distributed plane model

EBG 基本單元與基本單元狹縫之間有等效的耦合電容需要考慮等效電

容的計算可以等效為平行耦合的傳輸線每個單元 T模型其等效耦合電容公式

如式(61)式中 s為狹縫寬度h為板層厚度w為單元 T模型大小而有通道

的部份同樣用 T模型單元去連接

0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)

所以結合二維傳輸線模型狹縫等效模型如圖 64所示

圖 64 狹縫耦合等效模型

63

UC-EBG 實際製作圖如圖 65所示port1(8mm13mm)port2(35mm36mm)

圖 65 UC-PBG 實作圖

圖 66 UC-EBG與相同尺寸的裸板量測與 2D-TL模擬結果

圖 66為量測與模擬比較結果可得到趨勢相當吻合的 21S 曲線表示以

2D-TL模擬此 EBG結構可良好預測真實結果到 35GHz我們可以看到從

13~31GHZ產生一個截止帶達到抑制雜訊干擾的目的且能彌補電容無法抑制

高頻雜訊的缺陷

0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0

measurementTL_ModelmeasurementTL_Model

Reference board

EBG board

port1

Port2

64

圖 67 UC-EBG等效模型

圖 67為 UC-EBG的單元等效模型p

L 和p

C 為中央正方形金屬單元的等效

電感和電容b

L 和b

C 為通道等效電感和電容而g

C 為基本單元間的互容所以

單元週期性的排列可視為等效模型的串聯而形成一帶拒濾波器根據帶拒濾

波器的輸入阻抗

圖 68 等效電容 C與等效電感 L 並聯示意圖

輸入阻抗

當 (63)

在共振頻率推導出中心頻率 0f

品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能

LP 共振腔中的散失能量

W共振腔中的總能量

在共振頻率下e m

W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop

從上面的推導公式可以知道禁止帶的中心頻率與等效帶拒濾波器中的電感

及容值成反比而頻寬與電感值成正比電容值成反比

接下來再進一步探討當封裝基板放在印刷電路板上之後對於 UC-EBG結

構抑制雜訊的效果是否會受影響圖 69為一個封裝基板放在 PCB上示意圖

封裝板電源層厚度為 015mm大小為 42mmx42mm的 UC-EBG結構大小而

PCB電源層厚度為 07mm大小為 8cmx10cm模擬方法和本文第四章相同量

測上觀察點位置同前面 UC-PBG設定

圖 69 具 UC-PBG結構封裝設置在 PCB上示意圖

66

圖 610 封裝設置在 PCB上完整電源平面和具 UC-EBG封裝比較圖

圖 611 單純封裝基板和封裝基板設置在 PCB上之 21S 比較圖

從圖 610之模擬比較結果來看當封裝基板設置在 PCB上之後UC-EBG

還具有抑制雜訊的功能但從圖 611的比較結果來看當封裝基板固定在 PCB

上後其頻寬稍微減少可能的原因為 PCB 提供了另外的電流路徑減少 UC-EBG

單元與單元之間通道的等效電感而減少了頻寬

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

Reference boardUC-EBG

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)

packagepackage with PCB

67

63636363 結合去耦合電容與電磁能隙抑制電源雜訊結合去耦合電容與電磁能隙抑制電源雜訊結合去耦合電容與電磁能隙抑制電源雜訊結合去耦合電容與電磁能隙抑制電源雜訊

我們知道能利用去耦合電容去抑制低頻電源雜訊而電磁能隙結構則能

抑制較高頻的雜訊所以本節將結合去耦合電容與電磁能隙結構探討加入去耦

合電容後是否會對電磁能隙的頻寬與或深度造成影響分別對電容位置容值大

小和電容數量做分析

一開始我們先探討電容位置共分為三種情況做探討使用去耦合電容

的容值ESRESL為 100nF004ohm063nH使用數量都為四顆而三種

情況為在各單元的中心點通道上和雜訊源附近如圖 612所示放在雜訊源

附近的電容離雜訊源 2mm

(a)

(b) (c)

圖 612 電容擺放位置(a)均勻擺放(b)在通道上(c)在雜訊源附近

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68

圖 613 100n電容結合 EBG結構對 21S 的影響

從圖 613中加入 100n的大電容後可以降低 0~300MHz的雜訊而加在

雜訊源附近和單元中心會對 EBG結構所形成的禁止帶稍微的縮減在

15GHz~2GHz可以看到頻帶稍微向高頻移動我們接著加入電容的容值ESR

ESL為 100pF03ohm031nH位置和數量跟圖 612相同

圖 614 100p電容結合 EBG結構對 21S 的影響

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)

UC-EBGcap_globalcap_channelcap_local

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69

當加入 100p的小電容後在 1GHz附近的雜訊抑制是加入 100p電容所造

成因為 100p電容串連共振頻率在 1GHz附近但可以發現在雜訊源附近和單

元中心加入 100p電容後對 EBG所造成的禁止帶影響更大而加在通道上影響

則不大但加在通道上電容本身的抑制效果似乎沒那麼好接下來我們加大電容

數量為 16顆看變化為何如圖 615所示

(a) (b) (c)

圖 615 電容擺放位置(a)均勻擺放(b)在通道上(c)8顆在雜訊源附近

圖 616 增加 100n電容結合 EBG結構對 21S 的影響

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70

圖 617 增加 100p電容結合 EBG結構對 21S 的影響

從圖 616 和 617中可以發現假如電容均勻擺放在 EBG結構中將因為加

入電容的關係對 EBG所形成的禁止帶造成影響尤其加入 100p的小電容影響

更大雖然加在通道上對 EBG所形成的禁止帶影響不大但電容本身抑制雜訊

也降低因此在 EBG上放置電容位置應該是放在雜訊源附近電容本身抑制雜

訊能力好對 EBG 禁止帶影響也不大可以同時擁有電容和 EBG 禁止帶如圖

618所示

圖 618 裸版和 EBG結構加入電容後的比較

0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)

Reference boardbareboard+capbareboard+UC-EBGEBG+cap

71

第七第七第七第七章章章章結論結論結論結論

在本文中我們利用 PowerGround Planes Spice二維傳輸線模型探討高速數

位構裝結構透過實驗與量測的驗證了解 PCB雜訊透過連通柱的耦合到封裝

電源平面上對封裝電源供應面之接地彈跳雜訊造成影響接下來並討論了去耦

合電容對抑制雜訊的影響最後結合週期性電磁能隙(EBG)結構與去耦合電容

達到從低頻到 EBG 禁止帶都能抑制接地彈跳的理想電容擺放方式

本文第二章一開始先說明接地彈跳雜訊產生的原因和現象並概略整理在高

速電路板中會產生電源雜訊與電磁輻射的結構最後並對常見抑制接地彈跳雜訊

的對策作一些介紹

第三章和第四章主要是對二維傳輸線模型(2D TL Model)方法作個說明與驗

證為找出在電源供應面上擺放解耦合電容之適當位置各種 3D數值模擬方

法已被普遍使用然此方法之缺點為對時間與記憶體之需求相當高不適於尋找

多樣化位置之問題由於去耦合電容之擺放位置為二度空間之電源平面可考慮

之位置組合則複雜繁多因此需要一種可快速計算之模擬方法以幫助分析2D

TL可滿足簡化之電源供應模型之模擬需求並有良好時效性而在驗證結果中

可看出二維之模擬結果準確性亦相當良好同時我們也利用此快速的二維模

擬探討封裝放置 PCB上雜訊耦合的機制及在晶片級封裝上加電容與主機板

上加電容對接地彈跳防制之效果

第五章對去耦合電容在高速數位構裝電路中的位置電容值的大小電容的

寄生元件電容數量和電路板的板層厚度對抑制接地彈跳雜訊的影響作個分析

提供使用去耦合電容的規則與依據

第六章我們結合二維傳輸線模型與電源平面上狹縫模型可以準確與快速地

模擬週期性電磁能隙結構並探討去耦合電容在電磁能隙結構上的擺放方式發

現電容應擺放在雜訊源附近才能同時擁有電容與電磁能隙抑制雜訊的頻帶

72

參考文獻參考文獻參考文獻參考文獻

[1] N Na M Swaminathan J Libous and D OConnor ldquoModeling and simulation

of core switching noise on a package and boardrdquo Elec Comp and Tech Conf

2001 pp 1095-1101

[2] J G Yook V Chandramouli L P B Katehi K A Sakallah T R Arabi and T

A Schreyer ldquoComputation of switching noise in printed circuit boardsrdquo IEEE

Trans Comp Packag and Manufact vol 20 Mar 1997 pp 64-75

[3] G T Lei R W Techentin and B K Gilbert ldquoHigh-frequency characterization

of powerground-plane structuresrdquo IEEE Trans Microwave Theory Tech vol 47

May 1999 pp 562-569

[4] N Jain J Silvestro Z Cendes and S Potluri ldquoSI issues associated with high

speed packagesrdquo Elec Packag Tech Conf 1997 pp 310 -312

[5] S Van den Berghe F Olyslager D De Zutter J De Moerloose and W

Temmerman ldquoStudy of the ground bounce caused by power plane resonancesrdquo

IEEE Trans Electromagn Compat vol 40 May 1998 pp111-119

[6] J N Hwang and T L Wu ldquoCoupling of the ground bounce noise to the signal

trace with via transition in partitioned power bus of PCBrdquo IEEE Int Symp

Electromagn Compat 2002 pp 733 -736

[7] T Tarvainen ldquoStudies on via coupling on multilayer printed circuit boardsrdquo Dep

Of Elec Engineer Univer of Oulu and Esju Oy Oulu Finland 1999

[8] J Fang J Zhao and J Zhang ldquoShorting via arrays for the elimination of

package resonance to reduce power supply noise in multi-layered area-array IC

packagesrdquo IEEE Symp ICPackag Desig Integra 1998 pp 116 -119

[9] Y Xiaoning M Y Koledintseva L Min and J L Drewniak ldquoDC power-bus

design using FDTD modeling with dispersive media and surface mount

73

technology componentsrdquo IEEE Trans Electromag Compat vol 43 Nov

2001 pp 579 -587

[10] J Chen T H Hubing T P Van Doren and R E DuBroff ldquoPower bus

isolation using power islands in printed circuit boardsrdquo IEEE Trans Electromag

Compat vol 44 May 2002 pp 373 -380

[11] C Wei F Jun R Yong S Hao JL Drewniak and REDuBroff ldquoDC power

bus noise isolation with power-plane segmentationrdquo IEEE Trans Electromag

Compat vol 45 pp 436-443 May 2003

[12] J Chen M Xu T HHubing J L Drewniak T P Van Doren and R E

Dubroff ldquoExperimental evaluation of power bus decoupling on a 4-layer printed

circuit boardrdquo IEEE Int Symp Electromag Compat 2000 pp 335-338

[13] W Cui J Fan H Shi and J L Drewniak ldquoDC power bus noise isolation with

power islandsrdquo IEEE Int Symp Electromag Compat 2001 pp899-903

[14] H Shi JFan J L Drewniak T H Hubing and T P van Doren ldquoModeling

multilayered PCB power-bus designs using MPIE based circuit extraction

techniquerdquo IEEE Int Symp Electromag Compat 1998 pp652-655

[15] J Yun and T H Hubing ldquoOn the interior resonance problem when applying a

hybrid FEMMoM approach to model printed circuit boardsrdquo IEEE Trans

Electromag Comp vol 44 May 2002 pp 318 -323

[16] T L Wu Y H Lin J N Hwang and J J Lin ldquoThe effect of test system

impedance on measurements of ground bounce in printed circuit boardsrdquo

IEEE Trans Electromag Compat vol 43 Nov 2001 pp 600 -607

[17] T Sudo Y Ko S Sakaguchi T Tokumaru ldquoElectromagnetic radiation and

simultaneous switching noise in a CMOS device packagingrdquo Electronic

Components and Technology Conference pp 781-785 21-24 May 2000

[18] Y H Lin and T L Wu ldquoInvestigation of signal quality and radiated emission

74

of microstrip line on imperfect ground plane FDTD analysis and measurementrdquo

in Proc IEEE Int Symp Electromagnetic Compatibility Montreal Canada Aug

2001 pp 319-324

[19] J N Hwang T L Wu ldquoThe bridging effect of the isolation moat on the EMI

caused by ground bounce noise between powerground planes of PCBrdquo

Electromagnetic Compatibility 2001 EMC 2001 IEEE International

Symposium on Volume 1 pp 471-474 13-17 Aug 2001

[20] R Abhari and G V Eleftheriades ldquoMetallo-dielectric electromagnetic

bandgap structures for suppression and isolation of the parallel-plate noise in

high-speed circuitsrdquo IEEE Trans Microwave Theory amp Tech vol 51 pp

1629-1639 June 2003

[21] T Kamgaing and O M Ramahi ldquoA novel power plane with integrated

simultaneous switching noise mitigation capability using high impedance

surfacerdquo IEEE Microwave and Wireless Components Letters vol 13 pp 21-23

January 2003

[22] D F Sievenpiper ldquoHigh-impedance electromagnetic surfacesrdquoPhD

dissertation Dept Elect Eng Univ California at Los Angeles Los Angeles CA

1999

[23] Keunmyung Lee and Alan Barber ldquoModeling and Analysis of Multichip

Module Power Supply Planesrdquo IEEE Transactions on Components Packaging

Technology-Part B VOL18 NO4 pp628-639 November 1995

[24] Joong-HO Kim Madhavan Swaminathan and Youngsuk Suh ldquoModeling of

Power Distribution Networks for Mixed Signal Applicationsrdquo Electromagnetic

Compatibility 2001 International Symposium on vol2 pp1117-1122 2001

[25] M Pozar Microwave Engineering 2nd

ed New York Wiley 1998

[26] N Na J Choi S Chun M Swaminathan and J Srinivasan ldquoModeling and

75

transient simulation of planes in electronic packagesrdquo IEEE Trans Adv Packag

vol 23 pp340ndash352 Aug 2000

[27] ST Chen CW Tsai SM Wu CP Hung TL Wu ldquoChip-level model of

switching noise coupling on integrated system combining package and printed

circuit boardrdquo EMC Europe 2004 Vol 1 pp 420-424 Eindhoven Netherland

Sept 2004

[28] Jun Fan Drewniak JL Knighten JL Smith NW Orlandi A Van Doren

TP Hubing TH DuBroff RE ldquoQuantifying SMT decoupling capacitor

placement in dc power-bus design for multilayer PCBsrdquo IEEE Trans

Electromag Compat vol 43 Nov 2001 pp 588 ndash599

[29] Gisin F Pantic-Tanner Z ldquoEdge emissions from a PC board structure rdquo in

Proc of IEEE Int Symp on EMC 2001 pp 1333-1334

[30] T L Wu Y H Lin and S T Chen ldquoA Novel Power Planes With Low

Radiation and Broadband Suppression of Ground Bounce Noise Using Photonic

Bandgap Structuresrdquo IEEE Microwave and Wireless Components Letters vol 14

pp 337-339 July 2004

[31] R Coccioli F R Yang K P Ma and T Itoh ldquoAperture-coupled patch antenna

on UC-PBG substraterdquo IEEE Trans Microwave Theory amp Tech vol 47 pp

2123-2130 Nov 1999

[32] N Shino and Z Popovicacute ldquoRadiation from ground-plane photonic bandgap

microstrip waveguiderdquo IEEE MTT-S Int Microwave Symp Dig June 2002 pp

1079ndash1082

Click below to find more Mipaper at wwwlciscomtw

Mipaper at wwwlciscomtw

誌謝

承蒙指導教授郭志文博士及吳宗霖博士這兩年來的細心指導使學生我在課

業研究上實務經驗上皆獲益良多不僅如此老師也十分關心學生的生活因此

非常感謝老師在研究上及生活上的指導與教誨感謝口試委員洪子聖博士及林根

煌博士在論文上提供指導與意見使學生我獲益匪淺

轉眼間在中山已經渡過了六年的時光感謝陪我一起生活與努力的同學和

朋友在研究所的這兩年對我是一重要的時期首先是感謝陳肇學長對我研究上

的指導讓我的論文能順利完成此外要感謝蔣榮生學長趙嘉信學長林彥

輝學長郭俊志學長歐宏俊學長陳信廷學長王建中學長以及挺光學長奕

倫學長政緯學長給予我的幫忙和宏鈞柏青建逸富超等同學在研究與生

活上的互相討論與扶持這兩年的學習生涯因為你們才顯得豐富充實

感謝父母懷抱提攜不辭辛苦地教導栽培我是你們多年來無悔的付出使

我有無憂不虞匱乏的生活環境若今天我有任何一點小小成就都應該歸功於

我的父母與家人

200606 於中山大學西灣








中文提要
















Abstract


























目錄

目錄圖表索引第一章序 --------------------------------------------------------------------------------- 1

11 研究目的與方法 --------------------------------------------------------------- 1 12 論文大綱 ------------------------------------------------------------------------ 3












54 板層厚度的影響 ------------------------------------------------------------- 55 55 總結 ---------------------------------------------------------------------------- 59


第七章結論 ---------------------------------------------------------------------------- 71 參考文獻 ---------------------------------------------------------------------------------- 72

圖表索引





1
















彈跳雜訊等









2



















Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082










中文提要
















Abstract


























目錄

目錄圖表索引第一章序 --------------------------------------------------------------------------------- 1

11 研究目的與方法 --------------------------------------------------------------- 1 12 論文大綱 ------------------------------------------------------------------------ 3












54 板層厚度的影響 ------------------------------------------------------------- 55 55 總結 ---------------------------------------------------------------------------- 59


第七章結論 ---------------------------------------------------------------------------- 71 參考文獻 ---------------------------------------------------------------------------------- 72

圖表索引





1
















彈跳雜訊等









2



















Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082







Abstract


























目錄

目錄圖表索引第一章序 --------------------------------------------------------------------------------- 1

11 研究目的與方法 --------------------------------------------------------------- 1 12 論文大綱 ------------------------------------------------------------------------ 3












54 板層厚度的影響 ------------------------------------------------------------- 55 55 總結 ---------------------------------------------------------------------------- 59


第七章結論 ---------------------------------------------------------------------------- 71 參考文獻 ---------------------------------------------------------------------------------- 72

圖表索引





1
















彈跳雜訊等









2



















Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



目錄

目錄圖表索引第一章序 --------------------------------------------------------------------------------- 1

11 研究目的與方法 --------------------------------------------------------------- 1 12 論文大綱 ------------------------------------------------------------------------ 3












54 板層厚度的影響 ------------------------------------------------------------- 55 55 總結 ---------------------------------------------------------------------------- 59


第七章結論 ---------------------------------------------------------------------------- 71 參考文獻 ---------------------------------------------------------------------------------- 72

圖表索引





1
















彈跳雜訊等









2



















Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082





54 板層厚度的影響 ------------------------------------------------------------- 55 55 總結 ---------------------------------------------------------------------------- 59


第七章結論 ---------------------------------------------------------------------------- 71 參考文獻 ---------------------------------------------------------------------------------- 72

圖表索引





1
















彈跳雜訊等









2



















Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



圖表索引





1
















彈跳雜訊等









2



















Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082





1
















彈跳雜訊等









2



















Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082




1
















彈跳雜訊等









2



















Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



1
















彈跳雜訊等









2



















Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



2



















Chip level

PCB level

A pair of

powerground via

Chip Ground

Chip Power

PCB Ground

PCB Power

3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



3






















4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



4


















Chipgroud

From

input stage

LRLC

Outputlead

OUTV

1Q

2Q

LeadVCC

Ground

lead

Board

inductance

CCV

CHIP

OUTV

OUTI

VGB

+

-

VGB

Icut


5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



5


因為

1 0outcut L

dVI C

dt

minus=

(21)


cutGB

dIV L

dt= (22)



2

1 0 1 0

2 2

out outGB L L

r

d V VV LC LC

dt t




1 0

2

outGB L

r

VV NLC

t

minus∆= (24)






Icut


1 0outout L

dVI C

dt

minus=

6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



6















如圖 23所示




(EMI)的問題

( )0 rfI∆ ( )rfV ∆

7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



7

















2 22

2 20

zk E

x y

part part+ + =

part part

8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



8


cos cosmn

m x n y

a b

π π Ψ =

(218)

z 0Emn

E= Ψ (219)

12 2 2

mn

m nk k

a b

π π = = +

(220)


M n E= minus times

(221)



`

y

x

4

2

31


y

x

4

2

1 3



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



9





2 2

2r

c m nf

a bγε

= +

(222)
















25所示




10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



10














11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



11






















12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



12


















13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



13













14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



14





示











15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



15





要性











16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



16














02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-90

-70

-50

-30

-10

10

|S2

1|(

dB

)



isolated board

reference board

17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



17







低頻處更差

02 04 06 08 1 12 14 16 18 2

Frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

|S21

|(d

B)


reference board

bridged board w=6mm

18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



18




接如圖 217所示






L

+ -C

L

C

19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



19



寬的效果





浪費








電源的擾動


20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



20












21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



21








擬出來













22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



22









rε

(a)

rε

(b)


T Π型電路

23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



23




2

0 0

0d

2

2 G tan( )

r dc

c

ac

c

wC L d R

d t

fR C

ε ε microσ

π microω δ

σ

= = =

= =

(31)















tan( )

s dc ac

p

Z R R j L

Y j C C

ω

ω ω δ

= + +

= + (32)

24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



24















25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



25












0 1 2 3 4 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S21

| (d

B)


26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



26















0 05 1 15 2 25 3 35 4 45 5

Frequency (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

|S2

1| (d

B)


27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



27

(a)

(b)






0 1 2 3 4 5 6

Time(ns)

0

002

004

006

008

01

012

014

delt

a_

I(A

)

0 1 2 3 4 5

frequency(GHz)

04

05

06

07

08

09

1

de

lta_

I(m

ag

)

28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



28








0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

0 5 10 15 20 25 30

time(ns)

-05

-04

-03

-02

-01

0

01

02

03

04

vo

lata

ge(V

)

voltage surge

voltage ripple

29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



29











0 05 1 15 2 25 3 35

frequency(GHz)

0

10

20

30

40

50

60

70

80

Z(m

ag

)

30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



30








(a)

(b) (c)




15 2 25 3 35 4 45 5 55 6

Time(ns)

-01

04

09

14

19

24

29

34

Cu

rre

nt(

A)

VinVout

0 10 20 30 40 50

Time(ns)

3

31

32

33

34

35

Vv

cc

(V)

31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



31


流動



代表電流越大

32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



32













19 21 23 25 27 29

Time(ns)

-004

-002

0

002

004

006

008

Cu

rren

t(A

)Ip1 2 3

33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



33

























34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



34



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



35













結


36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



36






所示


10 cm

8 cmPCB

package 04 mm

probe

VNA

Power ring

Ground ring

Power via

probe

signalground

37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



37















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



38


















如圖 47所示


( )rε ω

( )r

ε ω

39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



39


[ ]02 ln(4 ) 1 ( )L h h d nH= + (41)







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-120

-100

-80

-60

-40

-20

0

S21

(dB

)


40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



40













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



41

(a)

(b)


1 10 100 1000

freq (log MHz)

00001

0001

001

01

1

10

Z21 (Ohms)

ESL=1nH

ESL=01nH

ESL=001nH

ESL=0001nH















42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



42



(a)

(b)


43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



43





0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



44





45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



45













PCB

package


Testing port

46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



46













0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10S

21

(dB

)


47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



47
















0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



48













化如圖 55所示

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



49







0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-50

-45

-40

-35

-30

-25

-20

-15

-10

-5

0

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21

(dB

)


50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



50
















51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



51














0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



52













0 05 1 15 2 25 3

frequency(GHz)

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


ESR

ESL

ESR

ESL

53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



53









0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S2

1(d

B)


0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



54













0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-80

-70

-60

-50

-40

-30

-20

-10

S21

(db

)


55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



55












0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



56














0 05 1 15 2 25 3 35 4 45 5

frequency(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

S21(d

B)


57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



57






(a)

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



58

(b)






遠的位置

0 02 04 06 08 1 12 14 16 18 2

frequency(GHz)

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)

cap_farcap_near

59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



59
















預期的還嚴重




越小

60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



60













Port1(8mm13mm)

Port2(35mm36mm)

61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



61







(a)

(b)


62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



62










0 0

1ln coth( ) ln 2

4 1

r s kC

h k

ε ε επ

π π

+ = + minus

(61)

2 1 ( 2 )K K K s s w= minus = + (62)



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



63








0 05 1 15 2 25 3 35-100

-80

-60

-40

-20

0


Reference board

EBG board

port1

Port2

64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



64



L 和p


電感和電容b

L 和b






輸入阻抗

當 (63)


品質因素 = m e

L L

W W WQ

P Pω ω

+=

其中

a

gC

pL

pC

bC

bL

2

0 0

1||

1

1 1=

2

in

in

j LZ j L

j C LC

Z fLC LC

ωω

ω ω

ω ωπ

= =minus

= rarr infin =

65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



65

eW 電場的儲能

mW 磁場的儲能




W W=

品質因素

2

0 0 02

12 | |

2 4

1 | |

2

e

L

C VW C

Q RC RVP L

R

ω ω ωsdot

= = = = (64)

頻寬 1 1 L L

BWQ R C C

= = prop (65)

因為頻寬L

BWC

prop









66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



66







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21

(dB

)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



67










(a)

(b) (c)


Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



68







0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



69






(a) (b) (c)



Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

Port1(8mm13mm)

Port2(35mm36mm)

0 05 1 15 2 25 3 35

f(GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S21(d

B)


70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



70







618所示


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


0 05 1 15 2 25 3 35

f(GHz)

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

S2

1(d

B)


71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



71

























72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



72




2001 pp 1095-1101






May 1999 pp 562-569
















73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



73


2001 pp 579 -587

























74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



74



2001 pp 319-324








1629-1639 June 2003




January 2003



1999










75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082



75






Sept 2004










pp 337-339 July 2004



2123-2130 Nov 1999



1079ndash1082





Documents

Power Integrity Analysis for High-Speed Circuit Package Using