Allegro16_2_교재

Allegro PCB Editor

Allegro / OrCAD PCB EditorTraining Guide

EDA 114 3 ( 135-746)Tel : 02-2057-8815FAX : 02-2057-8810Web : http://www.veritytech.co.krMail : [email protected]

2Allegro PCB EditorPCB Editor - Allegro PCB Editor - Workstation / PC PCB (Printed Circuit Board) PCB PCB Layer . Constraint Manager . , . , Copper Shape . Online DRC . Cadence Design Entry HDL, OrCAD Capture Circuit Feedback

. Signal Explorer PCB . SPECCTRA Auto Router PCB . .

(, , . ) PCB Footprint . Tool File .

(P-CAD, PADS, OrCAD Layout, DXF, .)

3Allegro PCB EditorPCB Editor - PCB Editor - Cadence SPB Series

-> -> Cadence SPB 16.x -> PCB Editor OrCAD

-> -> OrCAD 16.x -> OrCAD PCB Editor

- PCB Editor - Netlist Import Capture / DE HDL *.brd Load (, , Layer , Rules..) / Copper Board Design Rules Check Gerber Data

4Allegro PCB EditorPCB Editor - PCB Editor -

BRD : PCB Editor Board Design File PAD : PCB Footprint PAD Symbol File DRA : PCB Footprint Draw File (Source) PSM : PCB Footprint, Package Symbol File (Compiled) BSM : Board Symbol File (Compiled) ART : Gerber File DRL : NC Drill Data File LOG : () Color : Color definition File DAT : PCB Editor format Netlist File

pstchip.dat : PCB Footprint pstxnet.dat : pstxprt.dat :


OSM : Format Symbol File (Compiled) SSM : Shape Symbol File (Compiled) FSM : Flash Symbol File (Compiled) SCR : Script File TECH : Technology File (Constraints, ) JRL : Journal File, DRL : NC-Drill Data RPT : Report File

Note PCB Footprint *.dra type Source Compile . PCB PCB Footprint Compile .


(.osm)(.bsm)

(.psm)cross section(stackup)

design rules

PCB Board (.brd)


ConsoleWindow

StatusArea

Menu BarIcons/Tool BarsTitle Bar

Design Window

Shape tool set

Route tool set

Title bar : Allegro PCB Editor Menu Bar / Icon Toolbars :

PCB Design Design Window :

PCB Consol Window ( ) : Status Area : , x, y

8Allegro PCB EditorPCB Editor - Tool Bar -

Note Tool Bar , Shape, / , . View -> Customize Toolbar Tool Bar // .

9Allegro PCB EditorPCB Editor - Tool Bar -

New - Open - Save -

- File -

Move - Copy - Delete - Undo - Redo - Fix - Unfix -

- Edit -

Unrats all - ()Ratsnest Rats all - ()Ratsnest Zoom point - Zoom point - Board Zoom in - Zoom out - Zoom Previous - /Zoom Selection - focus Redraw - Design

- View -

10

Allegro PCB EditorPCB Editor - Tool Bar -

Grid - Grid On/OffColor - Color/Display Shadow - Shadow mode On/Off

- Setup -

Cmgr - Constraint Manager Route Ki - Package Ki -

General Edit - Etch Edit -

- Application mode -

Artwork - Gerber NC drill Param - NC drill Legend - Drill Chart Odb out - Valors Odb++

Report - Report DRC update - Batch DRC Help - Cadence Help()

- Manufacture -

Xsection - Stack up

- Miscellaneous -

11


Element - Cns show - Constraint Show measure -

- Display -

Dehilight - Waive DRC - DRC

Shape add - Shape Shape add rect - Shape Shape add circle - Shape Shape select - Shape

Shape void polygon - void Shape void rect - void Shape void circle - void

- Shape -

Hilight - Shape void element - Shape void

Shape edit boundary - Shape Island delete - Orphaned shape

12


Create detail - Design Line font - Line Linear dim -

- Dimension -

Angular dim - Leader only -

Place manual - Symbol Place manual - Symbol ( / )

- Place -

Datum dim - x,y

Leader diametrical - Leader radial - Leader balloon - Leader chamfer - Chamfer

13


Add connect - Slide - Segment Custom smooth -

- Route -

Fanout - Fanout

Line - Line Rect -

- Add -

Vertex - Text - Text edit -

14

Allegro PCB EditorPCB Editor - Fold Away Control Panel / Window -

/

15

Allegro PCB EditorPCB Editor - Control Panel -

Visibility Find

Option

Design

Filter

Find by Name

- Design Object - Group - Comps - (Part reference ) Symbols - (Package symbol ) Functions - Gate function Nets - Pins - Vias - Clines - (Connection Lines) Lines - Shapes - Shape(Copper) Voids - Shape Void Cline Segs - Cline Other Segs - Line Figures - (Drill) DRC errors - DRC marker Text - Ratsnests - Wire Rat Ts - Ratsnest

/ List

/

16

Allegro PCB EditorPCB Editor - Control Panel - / Visibility

Plane Layer

Layer Plane Layer

Layer

Film

Note Color View , View list .

17

Allegro PCB EditorPCB Editor - Popup menu (Default mode) -

Note ,

Menu/Tool bar

-() - Super Filter - Control Panel Find Tab Customize

Enable Single Click Execution - ( : add connect) Disable Automatic Drag Operations - , ( : Slide) Enable Shape Selection through Shape Fill - Shape Shape

18

Allegro PCB EditorPCB Editor - World View / Status Area -

Coordinates

A : Absolute, R : Relative,

Pick : ( Zoom Center)

: Board : Design Window : /

(Right Mouse Button > RMB)

19

Allegro PCB EditorPCB Editor - -

Color priorityCF6NextCF2

Zoom worldSF12Zoom outF12

statusSCF5ColorCF5

Zoom previousSF11Zoom inF11

Save_as tempSF10Grid toggleF10

VertexSF9CancelF9

Highlight pickSF8OopsF8

Dehighlight allSF7NextF7

MoveSF6DoneF6

CopySF5RefreshF5

Show measureSF4Show elementF4

SlideSF3Add connectF3

Property editSF2Zoom fitF2

CommandKeyCommandKey

Note :

Global : %Installed DIR%\share\pcb\text\env

Local : HOME

: Local > Global HOME Folder env file

(Alias Funckey )

20

Allegro PCB EditorPCB Editor - -/ Key Map

Modifier Indicator ExampleShift S SF2Control C (function keys) CF2Control ~ (alpha-numbic) ~NMeta A AF2

Key CSF2 Control-Shift F2ASF2 Meta-Shift F2CAF2 Control-Meta F2CASF2 Control-Meta-Shift F2~SZ Control-Shift ZSUp Shift-Up ArrowCUp Control-Up Arrow

Alias examplealias SF2 grid toggle ( On / Off )Funckey examplefunckey r rotate ( )

env

21

Allegro PCB EditorPCB Editor - -

Ctrl+

MRL

CTRL , .

Stroke Equivalent command Key combinations

Copy CTRL+C

Move SHIFT+F6

Zoom In F11

Oops (Undo) F8

Zoom World SHIFT+F12

Delete

22

Allegro PCB EditorPCB Editor - -/ Stroke Editor

Note Stroke Editor , . Setup -> User Preference input

Category no_dragpopup Ctrl, . (Appendix )

23

Allegro PCB EditorPCB Editor - Import Netlist - / OrCAD Capture

Capture Create Netlist BRD .

Options : PCB Input Board : Board Template File Output Board : PCB Artwork File Create or Update PCB Editor Board :

BRD PCB Editor BRD .

BRD Netlist .

Board Launching Option : BRD .

Allegro PCB Editor OrCAD PCB Editor

24

Allegro PCB EditorPCB Editor - Import Netlist - / Import Logic

Capture Netlist import BRD .

Tab Cadence : Cadence DE HDL, OrCAD

Capture . Other : .

Import logic type : . SCALD : DE HDL 5.0 import

Place changed component : , PCB . Always : Never : . If same symbol : Symbol

25

Allegro PCB EditorPCB Editor - Import Netlist - / Create New File

BRD, , Padstack . Drawing Type

Board : BRD Board (Wizard) : Board Wizard

BRD Module : Design Reuse Package Symbol : DRA

(Package, Mechanical, Shape(PAD), Flash) Package Symbol (Wizard) :

Wizard DRA, PSM, BSM Format Symbol : Sheet Outline form

Change Directory (Browse) :

Note Netlist Import , BRD .Preview text Preview Board Picture

26

Allegro PCB EditorPCB Editor - Import Netlist - / Create New Board File - Wizard

. .

, , PCB (Constraints)

27

Allegro PCB EditorPCB Editor

Template Data import . Board / Template / Board Outline

User Preference BSM Path import .

- Import Netlist - / Create New Board File - Wizard

28


(Unit) ( )

Layer ( , Plane Layer ) Film


29


Layer Layer

Routing Layer Plane Layer

Plane Layer Positive Negative

(Constraints) ( ) (Via)


30


/ ( / ) (Corner cutoff) (Route Keep in) (Package Keep in)


31

Allegro PCB Editor

- Design Parameters - / Display Tab

Display TabDisplay Connect point size : Cpoint (Diamond )

( Unit ) DRC marker size : DRC Marker Rat T (Virtual pin) size : Net schedule Ratsnest

T Max rband count : , Ratsnest geometry : Ratsnest (Jogged, Straight) Ratsnest points : Ratsnest (Endpoint Pin to Pin)

Display Tab -/

32

Allegro PCB Editor

Display TabEnhanced Display Modes Display plated holes : Display non-plated holes : Filled pads : Connect line endcaps : Cline Round Thermal pads : Negative Plane Thermal Relief Bus rats : BUS_NAME Net Bus Waived DRCs : Waived DRC Error

Drill HoleFilled Pads

- Design Parameters - / Display Tab

33

Allegro PCB Editor

Display TabGrids (Grid) , Layer . Offset .

- Design Parameters - / Display Tab - Grid

x0y0 8 9 8

9

8

8

x1 x2 x3

y1

y2

y3

Grid

Layer(Silk, Soldermask)

Layer

34

Allegro PCB Editor

Design TabCommand Parameters User Unit : Size : Accuracy : Extents

Left X, Lower Y : Width, Height :

Move Origin : (Extents ) Drawing Type :

Board, Package Symbol, Shape, Etc..

- Design Parameters - / Design Tab

Micron,Millimeter,Centimeter

Mil, Inch

35

Allegro PCB Editor

Design TabLine lock Lock direction : (Off - , 45, 90) Lock mode : (Line, Arc) Minimum radius : Arc ( 0) Fixed 45 Length : 45 , , Fixed radius : Arc , , Arc Tangent : Add - Line Arc

Symbol Angle : default ( ) Mirror : Default symbol height :

(DRC )

Tangent Tangent

- Design Parameters - / Design Tab

36

Allegro PCB Editor- Design Parameters - / Text Tab

Design TabSize Justification : (, , ) Parameter block : Set default (Text Setup Text Blk) Text marker size : Text Marker

Text Marker

Note PCB Editor Text Size Set Text Block , Text , Text Block Block Text . Text , Text Line Text

Marker Text , Edit > Text .

37

Allegro PCB Editor- Design Parameters - / Text Tab- Setup->Grids

- Text Setup -Text Blk = Text Block Width = Height = Line Space = () Photo Width = (0 1px ) Char Space =

Reset = ( ) Add = Text Block Set Compact = Text Block Set

38

Allegro PCB Editor- Design Parameters - / Shapes Tab

Shape TabEdit global dynamic shape parametersCommand Parameters Shape Global Dynamic Shape Parameters : Dynamic Shape Static Shape Parameters : Static Shape Split Plane Parameters : Split Plane Fill style

Edit static shape parametersShape Void Shape Constraint , Void .

Edit split parametersShape Type Shape Fill Type

39

Allegro PCB Editor- Design Parameters - / Route Tab

Route Tab / Add Connect folderAdd Connect Parameters Control Panel Default Miter : Line Width : Bubble : (Short) Shove vias : Gridless : Clip dangling clines : Smooth : Snap to connect point : Pin Replace etch : ( )

Control Panel

40

Allegro PCB Editor

Route Tab / Delay Tune folderDelay Tune Parameters Delay Tune default Accordion : Sawtooth : Trombone : Centered : , Gap : Cline

(nx space nx width mm/mil ) Corners : Miter size : (45 ) Allow DRCs : Online DRC

- Design Parameters - / Route Tab

41

Allegro PCB Editor

Route Tab / Edit Vertex folderEdit Vertex Parameters Bubble : (Short) Shove vias : Clip dangling connect lines : Smooth : Allow DRCs : Allow gridless :


42

Allegro PCB Editor

Route Tab / Slide folderSlide Parameters Corners : Max 45 len : 45 Bubble : (Short) Shove vias : Clip dangling connect lines : Smooth : Allow DRCs : Gridless : Add at max : Vias with segments : Ts with segments :


43

Allegro PCB Editor

Route Tab / Gloss folderGloss Parameters Line and via cleanup Via eliminate Line smoothing Center line between pads Improve line entry into pads Line fattening Convert corner to arc Pad and T connection fillet Dielectric generation


44

Allegro PCB Editor

Route Tab / Create Fanout folderCreate Fanout Parameters Include Unassigned Pins Include All same net pins Start and End Layers Via Structure Via Direction Override Line width Pin-via space Min Channel Space Curve Curve Radius


45

Allegro PCB Editor- Design Parameters - / Mfg Tab

Manufacturing Applications TabCommand Parameters Testprep : Testpoint Thieving : Thieving Silkscreen : Autosilk subclass Drafting : Dimension

46

Allegro PCB Editor- Status -

Status TabSymbols and nets Unplaced symbols : Unrouted nets :

Shapes Isolated shapes : Shape

(Shape Island) Unassigned shapes : Net Shape Out of date shapes : Shape

(Shape Smooth option ) Dynamic fill : Shape Fill Mode

(Global Dynamic Parameter )

DRCs DRC errors : DRC (

47

Allegro PCB Editor- Display - / Group, Class, Subclass

Display

Analysis

, / / Areas (Keep In, Keep Out)

Manufacturing

(, ..)Components

Geometry

Stack-Up

Group

48

Allegro PCB Editor

Outline, Title_Block, Title_Data, Revision_Block, Revision_Data

Drawing Format

Photoplot_Outline, No_Gloss_All, No_Gloss_Top, No_Gloss_Bottom, No_Gloss_Internal, Ncdrill_Legend, Ncdrill_Figure, Probe_Top, Probe_Bottom, Autosilk_Top, Autosilk_Bottom, No_Probe_Top, No_Probe_Bottom

Manufacturing

Assembly_Top, Assembly_Bottom, Place_Bound_Top, Place_Bound_Bottom, Pin_Number, Pad_Stack_Name, Silkscreen_Top, Silkscreen_Bottom, Body_Center, Soldermask_Top, Soldermask_Bottom, Display_Top, Display_Bottom, Modules, Dfa_Bound_Top, Dfa_Bound_Bottom, Pastemask_Top, Pastemask_Bottom

Package Geometry

Outline, Plating_Bar, Assembly Notes, Tooling_Corners, Dimension, Place_Grid_Top, Place_Grid_Bottom, Top_Room, Bottom_Room, Both_Rooms, Switch_Area_Top, Switch_Area_Bottom, Silkscreen_Top, Silkscreen_Bottom, Assembly_Detail, Soldermask_Top, Soldermask_Bottom, Off_Grid_Area, Wb_Guide_Line

Board GeometryGeometry

SUBCLASSCLASSGROUP

- Display - / Group, Class, Subclass

49

Allegro PCB Editor

Non-Conductor : Soldermask_Top, Soldermask_Bottom, Pastemask_Top, Pastemask_Bottom, Filmmask_top, Filmmask_bottom, Through All, Package_Top, Package_Bottom

Pin, Via, DRC,Etch, Anti Etch, Boundary

Stack-up / Non-Conductor

.Grids, Ratsnest(Top, Bottom, Thru), Temp Highlight, Perm Highlight, Background

Display

Top, Bottom, Through AllRoute Ko, Via Ko, Package Ko, Package Ki, Route KiConstraints Region

Areas

Assembly_Top, Assembly_Bottom, Silkscreen_Top, Silkscreen_Bottom, Display_Top, Display_Bottom

Comp Value, Dev Type, Ref Des, Tolerance,User Part

Components

Top, GND, VCC, Inner, BottomPin, Via, DRC,Etch, Anti Etch, Boundary

Stack-up /Conductor

SubclassClassGroup

Note 15.X > 16.x : Board Geometry / Constraint Area(Subclass) > Areas / Constraint

Region(Class)

- Display - / Group, Class, Subclass

50

Allegro PCB Editor- Display - / Display (192 Color)

Note Group / Class / Subclass / . Subclass . View -> Color view Save style / .

Subclass /

Color Palette

GroupFolder

Subclass

Subclass

Subclass /

51


Shadow Mode , .

OpenGL OpenGL Engine

Display Group

52


Group

Class

Subclass

Group Subclass /

/

Note Group / Class /

Subclass / .

Subclass . View -> Color view

Save style / .

Command : color

53

Allegro PCB Editor

Shadow Mode .

Command : color

- Display - / Display (24 Color)

54

Allegro PCB Editor- Display - /

55

Allegro PCB Editor- Subclass ETCH / Layer

56

Allegro PCB Editor

Thermal Glue Coating( )Optical Wave GuideWire (Cable, Etc.)Multi WireWire (Cable, Etc.)Micro WireWire (Package)Bonding Wire (Plane Layer)PlaneDielectricCrossoverConductor

Layer Type

- Subclass ETCH / Layer

57

Allegro PCB Editor

()PLATED_COPPER_FOIL

()COPPERLayer (Flexible PCB)POLYMIDE_FILM

Layer (Poly Tetra Fluor Ethylene)PTFE

Layer ( )CYANATE_ESTER_SLayer ( )CYANATE_ESTER_ELayer (BT Epoxy)BT_EPOXYLayer (Polymide)POLYMIDELayer (4Functonal Epoxy)TETRAFUNCTIONALLayer (Glass/Epoxy)FR-4 (Mask)CONFORMAL_COAT ()AIR

Material ()


58

Allegro PCB Editor

Negative Positive

DRC as Photo Film Type

Layer Etch Subclass Name


59

Allegro PCB Editor

: PCB Artwork

Project Manager

Partition Designer

Partition Designer

Partition Designer

Project Manager

- Partitioning option -

60

Allegro PCB Editor

Line mode(Default) Rectangle Add mode Shape Add mode

, Partition_ . , Report . Draw mode

Line mode : Rectangle mode : Shape mode :

- Partitioning option - /

61

Allegro PCB Editor

Guide Port setup process

Ratsnest , Ratsnest

- Partitioning option - / Guide ports

62

Allegro PCB Editor

Import : (dpf) importExport : exportReport : Refresh : Master design

ViewLog : import/export/ (Workflow_manager.log)Mail : Form Delete : Retract : ( import )

- Partitioning option - / Workflow manager

63

Allegro PCB Editor

P

a

r

t

i

t

i

o

n

_

3

Partition_2

Partition File Export

Partition Ratsnest

Partition File

- Partitioning option - / (Project manager)

64

Allegro PCB Editor

Partition File Open

PCB Artwork( )

- Partitioning option - / (Sub designer)

65

Allegro PCB Editor

Partition File Import

(Gloss, Create Gerber, Etc.)

Partition File Progress Partition File(*.dpf) Partition Designer , , Project Manager .

Partition (*.dpf) Gloss Manufacture ., PCB / Project Manager .

- Partitioning option - / (Project manager)

66

Allegro PCB EditorConstraint Rules

Allegro 16.0 , Physical / Spacing Constraint Manager Rule

: DRC PCB , Board / Rule , Tool

PCB Editor Constraint Manager

Rule

Rule

Board Data(Net, Pin)

Constraint Rule (DRC)

Rule

67


- DRC Marker -

Constraints Design Rules Check , Constraints Rules DRC Marker .

Show Element DRC Marker , Report .

68


- Menu description -

Board (, , ) / Rule

Modes : DRC mode Electrical : Constraint Manager Electrical rules Physical : Constraint Manager Physical rules Spacing : Constraint Manager Spacing rules Physical Net Overrides : Net Physical Spacing Net Overrides : Net Spacing DFA Constraint Spreadsheet : DFA Constraint Dialog Constraint Manager : Constraint Manager

NoteDFA Constraint Manager : , Package Rule

69


Constraint Set Mapping : Constraint Rule Set , Rule Set

- - : Rule

(Physical / Spacing / Electrical rules)

70


- Rules Description -

Electrical - rule Signal Integrity

Reflection - Overshoot Edge Distortions - rule Estimated xtalk Simulated xtalk SSN - rule

Timing Switch/Settle Delays - rule Setup/Hold - Setup/Hold time rule

Routing Wiring - Ratsnest

(Star, Daisy chain, etc..) Impedance - rule Min/Max Propergation Delay - Delay rule

( ) Total Etch Length - Differential Pair Relative Propergation Delay - Delay rule

( Delay /)

Physical - - Rule

Layer - Region - +

Spacing - - Rule

Layer - Region - +

71


- Constraint Modes -

Electrical - Rule DRC Stub length/Net Schedule Max via count - Max exposed length Propagation delay - Relative propagation delay - Timing Max parellel Impedance - Total etch length - All Differential pair checks - Diff pair Rule Max xtalk Max peak xtalk Layer sets

72



Physical - , Rule DRC Min line width - Min neck width - Neck mode Max neck length - Neck mode Max line width - Allow on etch subclass - T junctions - () Min BB via stagger - BB Via Max BB via stagger - BB Via Pad/Pad direct connect -

73



Spacing - , Pad rule DRC Pin Line Via Shape Thru xxx - Thru-hole type pad Smd xxx - Surface mount type pad Bond finger - Bonding pad B/B Via - Blind / Buried via Min BB Via Gap - BB

74


- DFA(Design For Assembly) - : Package , PCB , . , Package type , DFA Constraint PCB Design .

Allegro PCB Editor Constraint Manager Package symbol Boundary Rule , DFA Package symbol .

Package symbol boundary DRC .

75


1. Browse for symbols : DFA Rule

Package symbol 2. Package Symbol Spreadsheet

3. Default

, Apply selected cells

4. Constraints On Online-DRC

DFA Rule Spreadsheet window

1

2 3

4

- DFA Constraint - : Package type Rule

76


- DFA Preference -

Note

dfa_pause_level : DFA Rule 0~3 , 0 pause , 3 pause, 1

display_nodfa_drc_marks : DFA Marker DRC Marker

Delay

77


- DFx Check(Batch DRC) - : Board

Note Constraint Setup : Check Explore Violations : Report : Check

78

Allegro PCB Editor

Xnet

Constraint Rules

Allegro DB Connector , . , Constraint Manager , Xnet .

- Xnet -

R111kNet Net

79


PCB SI

Resistor Model Xnet (Constraint Manager)

- Xnet -

80


Xnet , Passive Part modeling 2 Resistor Auto Setup . R Setup Advisor Device Setup Refdes Resistor Array , Auto Setup Model , Edit Model Pin

Connection

- Xnet - / Resistor Model

81

Allegro PCB Editor- - / Place Manual

. Placement . .

Note OK : Hide : Placement Brd File

(Components by refdes)

(Package symbols) , Preference. Place Manual -H.

82

Allegro PCB Editor- - / Quick Place

Room Net /

Note Manual Place Quick Place Rule .

83

Allegro PCB Editor- - / Quick Place - all components

Note Edge - . Board Side , Top / Bottom - .

84

Allegro PCB Editor- - / Quick Place - by room

Room

Note Room Room Name ,

Board Room Name Room Outline .

: Room -> Room ->

85

Allegro PCB Editor- - / Quick Place - by room

Room Property Setting (Allegro PCB Editor ) - , Control Panel Property Property Value - Room Name Room Property Capture

86

Allegro PCB Editor

Room Property Setting (Capture / DE CIS ) - Edit Properties Room Property Value (Room Name) Property Value - Room Name

- - / Quick Place - by room

87

Allegro PCB Editor

Create Room Outline Create

Draw Rectangle - () Place Rectangle - () Draw Polygon - ()

Edit - Move - Delete -


88

Allegro PCB Editor

Place by room - Place by room - Room Name - Top Bottom Place Unplace


89

Allegro PCB Editor- - / Button

Rats All

Add Connect

UnRats All

SlideCustom Smooth

EditVertex

CreateFanout

Delay Tune

UnRats All - Ratsnest Rats All - Ratsnest Add Connect - Slide - Segment() Delay Tune - (Delay)

(Performance Option) Custom Smooth - Edit Vertex - / Create Fanout - Fanout (by Pick) Spread Between Voids - Pad Void

Note Ratsnest - Net Cline - Connection line() Manhattan Length - Connection

( Ratsnest )

SpreadBetween

Voids

90

Allegro PCB Editor- - / Rats, UnRats

UnRats All

Rats All

91

Allegro PCB Editor- - / Add Connect - Control

Layer Layer (Via Act Alt .) Via Padstack Net name (45, 90, ) 45 ,

Shove - Hug -

- Gridless : . (DRC )_ Snap to Connect Point :

92

Allegro PCB Editor

Via / Grid / /

Note , Layer Via -> Layer . Layer .

Via - Alt Layer Layer - + -

(Act Layer .)

- - / Add Connect - Control

93

Allegro PCB Editor

gridded

gridless

Off

Shove preferred

Hug preferredHug Only

Bubble Online DRC .


94

Allegro PCB Editor

OffMinimalFull

Smooth - Smoothing

Snap to connect point - Pad

Replace etch -


95

Allegro PCB Editor- - / Add Connect - Via

thru-hole via

blind via

buried via

Via Via Add Via , . Via Set .

Note Constraint Setting Via List Via-Hole / .

96

Allegro PCB Editor- - / Slide

DRC Rule Corner Arc ,

Corner Arc Segment , Via , T ,

97

Allegro PCB Editor- - / Edit VertexVertex Vertex

Vertex +

98

Allegro PCB Editor

Edit > Delete

Route > Slide

Edit > Change (width)

1st Pick 2nd Pick

Done

1st Pick

2nd Pick

Done

- - / Edit Vertex

99

Allegro PCB Editor- - / Custom Smooth

Note Gloss Line

Smoothing .

100

Allegro PCB Editor- Gloss -

Gloss Design - Board Room - Room Window - ( , ) Highlight - (Highlight)

(Highlight , ) Gloss List

Note Fillet = Tear Drop Gloss .

(Property) : NO_GLOSS, FIXED (Subclass) : NO_GLOSS_XXX

101

Allegro PCB Editor- Shape - / Add, Edit

Add Shape

Edit Shape

102

Allegro PCB Editor- Shape - / Print Image

Film

PCB Editor

Negative plane Positive plane Note

Positive Plane Shape .

. ,

Shape . .

Negative Plane Shape

. .

.

Flash symbol .

.

103

Allegro PCB Editor

VS

Negative Shape Positive Shape

Positive Negative

- Shape - / Print Image

104

Allegro PCB Editor- Shape - / Add, Edit

Shape

Shape

Cross-Hatch Solid

- Shape -/ Parameters

105

Allegro PCB Editor

Shape

Shape (Priority) .

(Priority) Shape (Priority) Shape

- Shape - / Add, Edit

106

Allegro PCB Editor

Shape >Shape >

PolygonRectangularCircular

PolygonRectangularCircular

2

1

3

1 - Shape Subclass 2 - Shape Fill type 3 - Shape Net

- Shape - / Control

107

Allegro PCB Editor

Shape Fill Style : Hatch/Solid Fill Style Void Control : Gerber Shape Void Clearances : Line Constraint Rule Shape / Pattern Thermal relief : Thermal Relief ( Line )

Shape Fill Void Control Clearances Thermal Relief

Solid

Hatch

Pin Void

Line Void

- Shape - / Parameters

108

Allegro PCB Editor

Update to Smooth : Dynamic fill mode Rough Disable Dynamic Shape fill Smooth (Void Thermal )

Out of date shapes : Shape , Dynamic fill mode Rough Disable Shape

Dynamic fill - Shape Smooth - (Artwork film quality

output) Shape Fill mode Rough -

mode(Shape , Void )

Disabled - Shape , (Shape , Void )

Copper Plot


109

Allegro PCB Editor

Snap on

Snap off

Artwork format - Shape Minimum aperture for artwork fill - shape fill aperture Minimum aperture for gap width - shape fill aperture ( ) Suppress shapes less than.. - Shape


110

Allegro PCB Editor- Shape - / Parameters

111

Allegro PCB Editor- Shape - / Parameters

112

Allegro PCB Editor

Shape Void : 5 Void Element, Polygon, Rectangle, Circle, BoundaryShape Merge Shape Merge

Shape Void Shape Void

Shape Merge : PCB Editor Draw Shape

- Shape - / Merge & Void

113

Allegro PCB Editor

, Pin Void / Signal trace

Pattern

Void

Spread Between Voids Slide

- SOV (Segment Over Void) -

114

Allegro PCB Editor

Pad Trace

1

2

3

4

Copper Signal trace , Segment Over Void Void , Pad Pad Void Clearance , Clearance .

- Spread Between Voids -

115

Allegro PCB Editor

- Route Automatic - / Router Setup Tab

do File

2

3

5

6 1. Strategy : 2. Limit via creation : 3. Limit wraparrounds : 4. Protect existing routes : 5. Turbo Stager : / 6. Enable diagonal routing : (45) 7. Layer 8. Layer(Subclass) 9. Horizontal / Vertical 10.Protect :

7 8 9 10

1

4

116

Allegro PCB Editor

1. Preroute and route : 1. Check : 2. Pass type : 3. Passes : 4. Start :

2. Post Route : , 1. Critic : /

(Clean VS Critic )2. Filter routing passes : / 3. Center wires : Pin Pin 4. Spread wires : -, -Pad 5. Miter Corners : 6. Delete conflicts : Highspeed rule

1

2

- Route Automatic - / Routing Passes Tab

117

Allegro PCB Editor

1. Params : Passtype Parameter 2. Clear :

1

2

Fanout : SMD Pad Fanout Seed Vias : Bus : Bus Clean : Testpoint : Testpoint (Pad, Via TP ) Critic : /

(Clean VS Critic ) Filter : ,

(Filter routing passes )

- Route Automatic - / Routing Passes Tab

118

Allegro PCB Editor

Fanout Direction : Fanout Via (Component pin ) Via Location : Via (Component outline ) Maximum Fanout Length : Fanout Enable Radial Wires : (APD ) Fanout Grid : Fanout Blind/Buried Via Depth : BB Via Fanout (Layer)

12

34

56

- Route Automatic - / Routing Passes Tab / Params

119

Allegro PCB Editor

Fanout 1. Pin Types : Fanout Pin 2. Share Within Distance : Share ( Global )3. Share Pins : Same net Thru-Hole Pin

Fanout

Max Share Count : SMD Pin 4. Share SMDs on Way to Via : Same net SMD

pin Via Max Share Count : SMD Pin

5. Share Vias : Same net SMD pin Via Max Share Count : SMD Pin

1

23

4

5


120

Allegro PCB Editor

1. Diagonal Routing : 2. Othogonal Routing :

1. Break-up Connection Longer Than : ( Via )2. Place Vias Under SMD Component : SMD Via

Bus Routing

Seed Vias


121

Allegro PCB Editor

Testpoint 1. Testpoint Side : TP Layer 2. Testpoint Position : TP

Center To Center Spacing : TP (TP ) Center To Component Spacing : Boundary

TP (TP ) Component Outline Clearance : Boundary

TP (TP ) Testpoint X Grid : TP X Testpoint Y Grid : TP Y Maximum Length : Pad, TP

3. Pin Use

Allow Pin Use : TP By Component : Pin TP

4. Via Padstacks

Specify Testpoint Vias : Via TP

1

2

3

4


122

Allegro PCB Editor

1. Spread (Global )2.

Starting > Ending : Spread , Ending Starting

1

2

Spread Wires

Miter Corners

1. Miter Passes : 2. Options

1. Miter Pin and Via Exit : Pin, Via Exit Miter2. Slant Wrong-way Segments :

Segment 3. Miter T Junctions : T Miter4. Miter at Bends : 90 45

1

2


123

Allegro PCB Editor

Elongate (Delay Tune)1. Meander : 2. Trombone : Trombone

Minimum Gap : Maximum Run Length : Segment

3. Accordion : Minimum Gap : Minimum Amplitude : Segment Maximum Amplitude : Segment

4. Sawtooth : Minimum Gap : Minimum Amplitude : Segment Maximum Amplitude : Segment

5. Option

Pattern Stacking : Elongate


124

Allegro PCB Editor

Routing Passes Smart Router Entire Design : All selected : All but selected :

1. Grid : Via 2. Fanout : , Fanout

, Pin Via Fanout via 3. Generate Testpoints : , Testpoint 4. , Miter corner

1

2

3

4

Selections Tab

Smart Router Tab

- Route Automatic - / Smart Router, Selection Tab

125

Allegro PCB Editor

Rule

: , / Rule(Constraints)

- Constraint Rule -

126

Allegro PCB Editor

Net : Ra10 Net Ra10 : cdsrouted.brd Net : Ra10 Manhattan length : 1460 MIL Rule : (Etch Length) : Auto Router : 2000MIL ~ 2010MIL

- Target net -

127

Allegro PCB Editor

DRC On

Etch Length , Total etch length DRC On

Note : PCB Editor Rule , Constraint mode .

- Constraint Rule Online DRC -

128

Allegro PCB Editor

Constraint Manager Rule

Net Properties Constraint Manager

Constraint Manager , Net(Ra10)

- Target net Constraint Rule -

129

Allegro PCB Editor

Constraint Manager

Etch : 2000 Etch : 2010

12

- - Rule Rule Net Etch Etch DRC On, Rule

3 4

- Target net Constraint Rule -

130

Allegro PCB Editor

Route Automatic : Board Net Route Net By Pick : Net Delay Tune Router Setup > Params > Elongation Tab

- Constraint Rule -

131

Allegro PCB Editor

PCB Editor Show Element Constraint Manager

( )

- -

132

Allegro PCB Editor

: Signal Copper Noise GND Via

- Via Array Generator -

133

Allegro PCB Editor

- ( : > mil mm)1. Via Pad 2. Via Array , 3. Via ( GND) 4. Via Array Via Pad

Entire Board Bounding Box

Shape Boundary

3

4

1

2

, > Design Shape

- Via Array Generator - / Normal Generator

134

Allegro PCB Editor

1

2

- ( : > mil mm)1. Via Pad 2. Via Array ,

- Via Array Generator - / Boundary Via Array

135

Allegro PCB Editor

- ( : > mil mm)1. Via Pad / Shape 2. Via Pad 3. Via Pad

2

3

1Original

Multi-Ring Single-Ring

Shape

- Via Array Generator - / Circular Via Array

136

Allegro PCB Editor

VS

Single Cline : T Via Array

Single Cline mode

VS

- Via Array Generator - / Cline Via Array

137

Allegro PCB Editor

VS

2

1

- ( : > mil mm)1. Shape / Via Pad 2. Via Pad

- Via Array Generator - / Offset Via Array

Shape () Via Array

138

Allegro PCB Editor

Tool > Database Check

DRC Update(Batch DRC) Brd file database

Post Process

- DB Doctor -

139

Allegro PCB EditorPost Process

- Create Artwork (Gerber) -

Allegro Design File (.brd)

Smask_botBottomGNDVCCTopSmask_topSilkTop

SilkBotFilm Control

records

art_param.txt

Parameter file

art_aper.txt

Aperture file

Mylar Film

To photoplotter

Top.artVCC.artGND.artBottom.art

Gerber files

photoplot.log

Log file

(vector only)

140


- Create Artwork (Gerber) - / General Parameters

Device Type - Format Gerber 6x00 (RS-274D) Gerber 4x00

(RS-274X, divided aperture file = art_aper.txt) Gerber RS274X Barco DPF MDA

Film size limits - Coordinate type - Error action - Format - Output option - Suppress - Output units - (inch, mm) Scale factor for output - /

141


- Create Artwork (Gerber) - / Film Control

Available Films - Film File option - Film , , (/) Create Artwork - Film File (*.art) Check database before artwork - Film file DB

doctor

Note Films List Design . Drill Film List

142


Negative (copper = clear)Positive (copper = black)

Artwork File

- Create Artwork (Gerber) - / Film Control

143


- Create Artwork (Gerber) - / Aperture wheels

Note Film . Auto Aperture wheel .

144


- Create Auto Silk -

U12

Autosilk_Top

Pins

Vias

U*Ref Des

Manufacturingpackage

geometry

145


Subclass Auto Silkscreen (Film).

Silk Screen Auto silk Subclass. Subclass DRC Rule Auto Silkscreen .

- Create Auto Silk -

146


- Create Drill - / Legend ()

Drill Symbol Drill Size

, NC-Drill 1-x Subclass .

147


- Create Drill - / NC Drill (*.DRL)

Out-1-4.drl

Log file

nctape.log

NC Drill file

nc_param.txt

Parameter file

nc_tools.txt

Auto tool select

148


- Create Detail - /

Note

149

Allegro PCB Editor

41 Report Text Html , Html Table , MS-Excel Spreadsheet Tool 100%

Post Process

- Report -

150

Allegro PCB Editor

text Report

C:\Cadence\SPB_16.0\share\pcb\text\views C:\Cadence\OrCAD\16.0\share\pcb\text\views

Report Text Load

Component Report

Post Process

- Report - / Report

151

Allegro PCB Editor

Report Report form REFDES_SORT : REFDES Data (REFDES, COMP_DEVICE_TYPE) : Allegro

## Property of Cadence Design Systems, Inc. All rights reserved.## $Header: cmp_rep_view.txt.v 1.1 12/01/87 ddd Prealpha## File: cmp_rep_view.txt - Component data extract cmd file for # component list report## Revision history:# (0.10) ddd 12/01/87 Preliminary initial version##COMPONENT## Extract: refdes(sort), refdes, device_type, value, tolerance,# package, x, y, angle, mirror.#

REFDES_SORTREFDESCOMP_DEVICE_TYPECOMP_VALUECOMP_TOLCOMP_PACKAGESYM_XSYM_YSYM_ROTATESYM_MIRROR## end of cmp_rep_view#

Post Process

- Report - / Report Customize(ex : Component Report)

152

Allegro PCB EditorSymbol / - Padstack - / Layer

Through-Hole Padstackpaste

mask

top

Surface-Mount Padstack

top

inner

anti - pad

thermal relief

inner

bottom

mask

drill size

mask

153

Allegro PCB EditorSymbol / - Padstack - / Pad Designer

- Parameter Tab -

Type : Pad Type - / Blind, Buried /

Internal Layers : Film (Fixed) (Optional)- Optional PCB Editor Artwork Film . Units : Multiple drill :

Drill/Slot hole : Drill/Slot symbol : Drill Chart Symbol

154


Layer Layer Pad .

- Layer Tab -

Padstack Layers : Mask Layer - Regular Pad- Thermal Relief- Anti Pad

Views : Padstack - Xsection : - Top :

155


regular thermal relief anti - pad

156

Allegro PCB EditorSymbol /

Layer , Layer /.

Layer , .

- Padstack - / Pad Designer

157

Allegro PCB EditorSymbol / - Padstack - / Pad

Regular Pad

Thermal Neg

anti-pad

Shape

Thermal Pos

Regular Pad : , , Positive Pad Thermal Relief

Positive : Pin, Via Positive Copper Pad. Regular Pad . Negative : Pin, Via Negative Copper Flash Type Pad

Anti Pad : Pin, Via Copper Shape : (, , ) , Pad

Note Thermal Relief Positive Negative Plane Layer Copper

Positive , Negative . Shape, Flash Pad Pad Designer . Shape, Flash PCB Editor dra .

158

Allegro PCB EditorSymbol / - Padstack - / Pad Selection Guide

---via

pad; square shape; 55 Milssq55

surface mount pad; 25 x 48 Mils pad size; BOTTOM mounts25_48b

surface mount pad; 25 x 48 Mils pad size; TOP mounts25_48

pin grid arraypga

pad; 50 Mils; square shape; 30 Mil drill sizep50s30

pad; 50 Mils; circle shape; 32 Mil drill sizep50c32

multi-bus connector; 43 Mils; TOP mountm43t

multi-bus connector; 43 Mils; BOTTOM mountm43b

hole; 109 Mils; unplatedh109u

hole; 109 Mils; platedh109p

DescribtionPad Type

159

Allegro PCB EditorSymbol / - Padstack - / Flash Symbol

.fsm

Note

Flash Symbol Pad 0,0 Origin Symbol .

ADD -> Flash , Symbol .

160

Allegro PCB Editor

- Component Symbol - / Drawing Setting

Symbol /

Setup > Drawing Size

default datum 0,0

y=0

x

=

0

new datum 0,0

161

Allegro PCB EditorSymbol /

(.bsm)(.psm)

packagesymbol

mechanicalsymbol

(.osm)

format symbol

(.ssm)

shapesymbol

flashsymbol

(.fsm)

- Component Symbol - / Symbol Type

162

Allegro PCB Editor

Assy Ref

Device Type

()

Part Ref(Silk, Assy Layer)Padstacks()

AssemblyOutline

SilkscreenOutline

PackageBoundary

Minimum/Maximum Package Height

Symbol / - Component Symbol - / Symbol

163

Allegro PCB Editor

1

3

2

4

5

6

7 8

9

10

11

12

13

14100

or...

Layout PinsLayout > Pins

Symbol / - Component Symbol - / Pin

164

Allegro PCB Editor

Add > ...

Add > Line

Add > 3pt Arc

Symbol / - Component Symbol - /

165

Allegro PCB Editor

Assy Ref

Silk Ref

Device TypeLayout > Labels >

Device

Layout > Labels > Refdes

Symbol / - Component Symbol - / Text

166

Allegro PCB Editor

Silk RefSetup > Areas

.050.150

Assy Ref

Device Type

- Component Symbol - / Symbol /

167

Allegro PCB Editor

- Component Symbol -

Symbol /

Note Symbol , .

*.dra - , . *.psm - , .

dra , psm .

168

Allegro PCB Editor

outline

package keepin

route keepin

mounting holes

via keepout

chamfer

- Board Symbol - / Symbol /

169

Allegro PCB Editor

x 1000 0()

drawing origin (0,0)center of mounting hole

ix -850

iy 4500

ix 4100iy -200

ix 850

ix -4100

iy -200

iy -4100

Add > Line

(3800,0)

(0, 4100)

Symbol / - Board Symbol - /

170

Allegro PCB Editor

Layout > Pins

Soldermask(outer circle)

Drill Symbol(square)

Drill hole (inner circle)

Symbol / - Board Symbol - / Hole ,

171

Allegro PCB Editor

Dimension > Chamfer

Symbol / - Board Symbol - / (Chamfer)

172

Allegro PCB Editor

Dimension > Linear Dim

- Board Symbol - / Dimension

Symbol /

173

Allegro PCB Editor

Setup > Areas

outline

package keepin(offset 70 mils)

route keepin(offset 50 mils)

mounting hole

Edit > Z-Copy

- Board Symbol - / Ki,KoSymbol /

174

Allegro PCB Editor

File > Save.bsm

.dra

+

Symbol / - Board Symbol - /

Note Symbol , .

*.dra - , . *.bsm - , .

dra , psm . Shape Z-Copy . , User

Preference.

175

Allegro PCB EditorAppendix

- PCB Editor Command Index - / File

iff inFile - Import - IFFidf inFile - Import - IDFdxf inFile - Import - DXFload plotFile - Import - IPFload streamFile - Import - Streamload photoplotFile - Import - Artworknetin paramFile - Import - Logiccreate symbol (Symbol Editor )File - Create Symbolsave_asFile - Save AssaveFile - SaveopencdFile - Recent DesignsopenFile - OpennewFile - New

File

dxf outFile - Export - DXFcreate plotFile - Export - IPFnetoutFile - Export - Netlist w/PropertiesfeedbackFile - Export - Logicpin_delay inFile - Import - Pin Delayannotation inFile - Import - Annotationsplctxt inFile - Import - Placementsignal atimesFile - Import - Active Timestechfile inFile - Import - TechfileclppasteFile - Import - Sub-Drawingpcad inFile - Import - PCADpads inFile - Import - PADSspecctra inFile - Import - Router

File

176

Allegro PCB Editor

pin_delay outFile - Export - Pin Delaydownrev2File - Export - Save Design to 15.2downrevFile - Export - Save Design to 15.0odb_outFile - Export - ODB ++ insideipc356 outFile - Export - IPC 356icm_outFile - Export - InterCommannotation outFile - Export - Annotationsplctxt outFile - Export - Placementtechfile outFile - Export - TechfiledlibFile - Export - LibrariesclpcopyFile - Export - Sub-Drawingspecctra_outFile - Export - Routeridf outFile - Export - IDF

File

exitFile - ExitscriptFile - ScripttoolswapFile - Change Editorfile_propertyFile - PropertiesplotFile - Plot

plot previewFile - Plot Preview (Windows only)

plot setupFile - Plot Setup .File - File ViewerviewlogFile - Viewlog

File

Appendix

- PCB Editor Command Index - / File

177

Allegro PCB Editor

delete vertexEdit - Delete VertexvertexEdit - Vertexsplit plane createEdit - Split Plane - Createsplit plane paramEdit - Split Plane - Parameterszcopy shapeEdit - Z-CopydeleteEdit - DeletechangeEdit - ChangespinEdit - SpinmirrorEdit - MirrorcopyEdit - CopymoveEdit - MoveredoEdit - RedoundoEdit - Undo

Edit

net_propertiesEdit - Net Propertiesproperty editEdit - PropertiesgroupeditEdit - Groupstext editEdit - Text

Edit

Appendix

- PCB Editor Command Index - / Edit

178

Allegro PCB Editor

- PCB Editor Command Index - / View, Add

.View - Customization - Toolbardisplay paramView - Customization - DisplayredisplayView - Refreshcolorview restoreView - Color View Restore Lastcolorview createView - Color View Savezoom previousView - Zoom Previouszoom centerView - Zoom Centerzoom worldView - Zoom Worldzoom outView - Zoom Outzoom inView - Zoom Inzoom fitView - Zoom Fitzoom pointsView - Zoom By Points

View

add textAdd - Textadd frectAdd - Frectangleadd rectAdd - Rectangleadd circleAdd - Circleadd arcAdd - 3pt Arcadd rarcAdd - Arc w/Radiusadd lineAdd - Line

Add

Appendix

179

Allegro PCB Editor

- PCB Editor Command Index - / Display

restore_waived drcsDisplay - Waive DRCs - Restore All

restore_waived drcDisplay - Waive DRCs - Restoreblank waived drcsDisplay - Waive DRCs - Blankshow waived drcsDisplay - Waive DRCs - Showwaive drcDisplay - Waive DRCs - WaivedehilightDisplay - DehighlighthilightDisplay - Highlightshow propertyDisplay - Propertyshow parasiticDisplay - Parasiticshow measureDisplay - Measureshow elementDisplay - Elementcolor priorityDisplay - Color Prioritycolor192 colorDisplay - Color/Visibility

Display

unrats netDisplay - Blank Rats - Netsunrats componentDisplay - Blank Rats - Componentsunrats allDisplay - Blank Rats - Allrats netDisplay - Show Rats - Netrats componentDisplay - Show Rats - Componentsrats allDisplay - Show Rats - All

Display

Appendix

180

Allegro PCB Editor

- PCB Editor Command Index - / Setup

define listSetup - Define Listsdefine propertySetup - Property Definitionsdfa_spreadsheetSetup - DFA Constraint SpreadsheetcmgrSetup - Electrical Constraint SpreadsheetcnsSetup - Constraintsauto define bbviaSetup - Vias - Auto Define B/B Viadefine bbviaSetup - Vias - Define B/B Viadefine xsectionSetup - Cross-sectiondefine subclassSetup - Subclassesdefine gridSetup - Gridsdefine textSetup - Text SizesstatusSetup - Drawing Optionsdrawing paramSetup - Drawing Size

Setup

envedSetup - User Preferenceskeepin photoSetup - Areas - Photoplot Outlinekeepout glossSetup - Areas - Gloss Keepoutkeepout probeSetup - Areas - Probe Keepoutkeepout viaSetup - Areas - Via Keepoutkeepout routerSetup - Areas - Route Keepoutkeepin routerSetup - Areas - Route Keepinpackage_heightSetup - Areas - Package Height

keepout packageSetup - Areas - Package Keepout

keepin packageSetup - Areas - Package Keepin

Setup

Appendix

181

Allegro PCB Editor

- PCB Editor Command Index - / Layout

label partLayout - Labels - Part Numberlabel toleranceLayout - Labels - Tolerancelabel valueLayout - Labels - Valuelabel deviceLayout - Labels - Devicelabel refdesLayout - Labels - RefDesslideLayout - Slideadd connectLayout - Connectionsadd pinLayout - Pins

Layout Symbol Editor .

Layout

Appendix

182

Allegro PCB Editor

- PCB Editor Command Index - / Shape

island_deleteShape - Delete Islandsshape edit boundaryShape - Edit Boundaryshape void copyShape - Manual Void - Copyshape void moveShape - Manual Void - Moveshape void elementShape - Manual Void - Elementshape void deleteShape - Manual Void - Deleteshape void circleShape - Manual Void - Circularshape void rectangleShape - Manual Void - Rectangularshape selectShape - Select Shape or Voidshape void polygonShape - Manual Void - Polygonshape add circleShape - Circularshape add rectShape - Rectangularshape addShape - Polygon

Shape

shape global paramShape - Global Dynamic Params

decompose shapeShape - Decompose Shape compose shapeShape - Compose Shape shape checkShape - Check

shape merge shapesShape - Merge Shapes

shape change typeShape - Change Shape Type

Shape

Appendix

183

Allegro PCB Editor

- PCB Editor Command Index - / Logic

ecl paramLogic - Terminator AssignmentpartlogicLogic - Part Logic...parteditLogic - Change Partsrename area listLogic - Auto Rename RefDes - Listrename area windowLogic - Auto Rename RefDes - Windowrename area roomLogic - Auto Rename RefDes - Roomrename area designLogic - Auto Rename RefDes - Design

rename paramLogic - Auto Rename RefDes -Rename

assign refdesLogic - Assign RefDesidentify netsLogic - Identify DC Netsdiff pairsLogic - Assign Differential Pairnet scheduleLogic - Net Schedulenet logicLogic - Net Logic

Logic

Appendix

184

Allegro PCB Editor

- PCB Editor Command Index - / Place

swap pinsPlace - Swap - Pinsplace interactivePlace - Interactiveplace area listPlace - Autoplace - Listplace area windowPlace - Autoplace - Windowplace area roomPlace - Autoplace - Roomplace area designPlace - Autoplace - Designplace set bottomgridPlace - Autoplace - Bottom Gridsplace set topgridPlace - Autoplace - Top Gridsplace paramPlace - Autoplace - Parametersplace insightPlace - Autoplace - InsightspecctraPlace - RouterquickplacePlace - Quickplaceplace manualPlace - Manually

Place

refresh symbolPlace - Update Symbolseval area listPlace - Evaluate - Listeval area windowPlace - Evaluate - Windoweval area roomPlace - Evaluate - Roomeval area designPlace - Evaluate - Designeval paramPlace - Evaluate - Parametersswap area listPlace - Autoswap - Listswap area windowPlace - Autoswap - Windowswap area roomPlace - Autoswap - Roomswap area designPlace - Autoswap - Designswap paramPlace - Autoswap - Parametersswap componentsPlace - Swap - Componentsswap functionsPlace - Swap - Functions

Place

Appendix

185

Allegro PCB Editor

guideportPlace - Design Partition - GuideportsworkflowPlace - Design Partition - Workflow ManagerpartitionPlace - Design Partition - Create Partitionsreplace temp_symbolsPlace - Replace SQ Temporary - Symbolsreplace temp_devicePlace - Replace SQ Temporary - Devices

Place

- PCB Editor Command Index - / Place

Appendix

186

Allegro PCB Editor

- PCB Editor Command Index - / Route

spread_between_voidsRoute - Spread Between Voidsunmiter_by_pickRoute - Unmiter by Pickmiter_by_pickRoute - Miter by PickspecctraRoute - Router Editorauto_routeRoute - Route Automaticelong_by_pickRoute - Elongation by Pickroute_by_pickRoute - Route Net(s) by Pickfanout_by_pickRoute - Fanout by Pickspecctra checksRoute - Router Checkscustom smoothRoute - Custom Smoothdelay tuneRoute - Delay TuneslideRoute - Slideadd connectRoute - Connect

Route

gloss area listRoute - Gloss - Listgloss area highlightRoute - Gloss - Highlightgloss area windowRoute - Gloss - Windowgloss area roomRoute - Gloss - Roomgloss area designRoute - Gloss - Designgloss paramRoute - Gloss - Excute

Route

Appendix

187

Allegro PCB Editor

- PCB Editor Command Index - / Analyze

tline calculatorAnalyze - Transmission Line CalculatoremcontrolAnalyze - EMI Rule Checkersignal xtalktableAnalyze - SI/EMI Sim - Xtalk Tablesignal probeAnalyze - SI/EMI Sim - Probesignal libs audit Analyze - SI/EMI Sim - Audit - Audit List of Librariessignal lib audit Analyze - SI/EMI Sim - Audit - Audit One Librarysignal audit netAnalyze - SI/EMI Sim - Audit - Net Auditsignal auditAnalyze - SI/EMI Sim - Audit - Design Auditsignal prefsAnalyze - SI/EMI Sim - Preferencessignal model refreshAnalyze - SI/EMI Sim - Model Dump/Refreshsignal modelAnalyze - SI/EMI Sim - Modelsignal libraryAnalyze - SI/EMI Sim - Librarysignal initAnalyze - SI/EMI Sim - Initialize

Analyze

Appendix

188

Allegro PCB Editor

- PCB Editor Command Index - / Manufacture

create detailManufacture - Dimension/Draft - Create Detaildraft filletManufacture - Dimension/Draft - Filletdraft chamferManufacture - Dimension/Draft - Chamferleader chamferManufacture - Dimension/Draft - Chamfer Leaderleader balloonManufacture - Dimension/Draft - Balloon Leaderleader radialManufacture - Dimension/Draft - Radial Leaderleader diametralManufacture - Dimension/Draft - Diametral Leaderleader onlyManufacture - Dimension/Draft - Leader Linesdimension angularManufacture - Dimension/Draft - Angular Dimdimension datumManufacture - Dimension/Draft - Datum Dimdimension linearManufacture - Dimension/Draft - Linear DimlinefontManufacture - Dimension/Draft - LineFontdraft paramManufacture - Dimension/Draft - Parameters

Manufacture - Dimension/Draft PCB

Manufacture - Dimension Draft Symbol Dimension

Appendix

189

Allegro PCB Editor

silkscreen paramManufacture - Silkscreencreate couponsManufacture - Create CouponsdfaManufacture - DFx Check (legacy)cut marksManufacture - Cut MarksncrouteManufacture - NC - NC Routenctape_fullManufacture - NC - NC Drillncdrill paramManufacture - NC - NC Parametersbackdrill setupManufacture - NC - Backdrill Setup and Analysisncdrill legendManufacture - NC - Drill Legendncdrill customizationManufacture - NC - Drill Customizationstream outManufacture - Stream Outfilm paramManufacture - Artwork

Manufacture


Appendix

190

Allegro PCB Editor

variant bomManufacture - Variants - Create Bill of Materialsvariant assemblyManufacture - Variants - Create Assembly DrawingthievingManufacture - Thievingtestprep resequenceManufacture - Testprep - Resequencetestprep densityManufacture - Testprep - Density Checktestprep ncdrillManufacture - Testprep - Create NC drill datatestprep createfixtureManufacture - Testprep - Create FIXTUREtestprep fixManufacture - Testprep - Fix/unfix testpointstestprep propertiesManufacture - Testprep - Propertiestestprep manualManufacture - Testprep - Manualtestprep automaticManufacture - Testprep - Automatic

Manufacture


Appendix

191

Allegro PCB Editor

- PCB Editor Command Index - / Tools, Help

techfile compareTools - Technology File ComparereportsTools - Reportsderive connectivityTools - Derive Connectivitysilkscreen paramTools - Silkscreeneditpad restore allTools - Pad - Restore ALLeditpad restoreTools - Pad - Restoreeditpad boundaryTools - Pad - Boundaryrefresh padstackTools - Padstack - RefreshmultpadeditTools - Padstack - Group Editreplace padstackTools - Padstack - Replace

padeditlibTools - Padstack - Modify Library Padstack

padeditdbTools - Padstack - Modify Design Padstack

create moduleTools - Create Module

Tools

drc updateTools - Update DRCdbdoctorTools - Database Checksetup advisorTools - Setup Advisor

Tools

aboutHelp - About cdsdocHelp - ManualscdsdocHelp - Help

Help

Appendix

192

Allegro PCB Editor

- PCB Editor Preference Index / Categories Description

Gerber 4x/6x Film , Flash Symbol(Triangle) . C-Point size(80mil), . (mil, micron) .loadgerber_flash_size

Artwork Film 14.2 . Film Stackup , Film Stackup .film_nosort

Manufacture -> Artwork . , photoplot.log .artwork_no_unit_warn

Artwork Film Comment , .art_stripdirectoryname

Arc, Circle Line Segment . 15.7 , arc_oldvectorize .art_circvects

15.5 Arc , art_circvects .arc_oldvectorize

Allegro Artwork Artwork

CATEGORY: artwork

Appendix

193

Allegro PCB Editor

(10 ~ 300) . 30.autosave_time

( !!) . AUTOSAVE.brd( dra)autosave_name

DB .autosave_dbcheck

autosave .autosave

CATEGORY: autosave


Appendix

194

Allegro PCB Editor

padeditlib(Tools->Padstack->Modify Library Padstack) library path browser , file browser .padlib_filebrowser

SCRIPTPATH Allegro data browser , 13.6 File Browser .old_scriptbrowser

, unnamed.brd . 12.0 nolast_file

%%/pcbenv/allegro.ini , . 12.0 nolast_directory

MS-Windows OS . explorer.exefilemgr_windows

Unix OS . filemgr_unix

Sub_Drawing clpcopy command Windows 3.1 .(13.6 )clip_filebrowser

Windows 3.1 .browser_win31

Browse . Browse , .browser_nosticky

change directory . , File->Open Browse , File->scripts Browse .browser_nodircheck

CATEGORY: browser


Appendix

195

Allegro PCB Editor

(*.xtb)xtalk_table_pathAllegro (*.brd,*.dra Wizard) wizard_template_path (*.color)viewpathextracta (*.txt)textpath (*.scr)scriptpathNC Drill (*.txt)ncdpathmaterials.dat(Allegro) mcmmat.dat(Allegro Package Designer) materialpathDFA (Audit) (*.arl, *.rle)dfaauditpath (*.txt)devpathSubDrawing(*.clp) clippathArtwork aperture/param (art_aper.txt, art_param.txt)artpathAperture flash .(*.fsm, *.bsm)aptpath

CATEGORY: config_paths


Appendix

196

Allegro PCB Editor

World View VOLTAGE net .(14.0 ) net , pin .wv_voltage_nets

reject list (none, blink, highlight, : blink)find_reject_graphics

Reject , Reject List (Always), (1~5)find_nongui_reject

, (Option, Find, Visibility) , control_auto_raise

Visibility Views Artwork Film color_nofilmrecord

Color and Visibility Group Option Group Group color_lastgroup

Option add pin , , Symbol unit .addpin_default_space

(Option, Find Filter, Visibility), WorldView

CATEGORY: control_panel


Appendix

197

Allegro PCB Editor

(*.top)topology_template_path

Reusable die pin tile (*.til)tilepath

(*.tech)techpath

Symbol (*.psm, *.osm, *.bsm, *.ssm, *.fsm)psmpath

pcell (*.il *.ile)pcell_lib_path

Padstack (*.pad)padpath

Design Reuse (*.mdd)modulepath

(*.ldf)ldfpath

DFA constraints spreadsheet (*.dfa)dfacnspath

(*.dcf)dclpath

Design Search Path Settings

CATEGORY: design_paths


Appendix

198

Allegro PCB Editor

Skeleton Display ( )display_noskeletal_drawAllegro display_nosaved_geometry(, Rats..) (Repaint) display_norepair , RefDes display_norefdes 1mm ( )display_nolinewidth Solid , () display_nohilitefont, , arc 1 display_nodynamicarcwidth display_nocolor_dynamics , dynamic shape boundary layer . .display_no_auto_hide_boundary

, Active Layer Color priority , autopriority(Layer Color priority )display_manual_colorprioritySolid type DRC marker display_drcfill

, repainting .(UNIX X )display_backingstore7 .bug_solaris_hlt_lines

CATEGORY: display


Appendix

199

Allegro PCB Editor

Text 1 display_thintextAnalysis Shape Fill display_shapefill_analysisSolid type Shape Fill , 5 ( 4)display_shapefillShadow mode , 40%display_readonly_intensity , ( on)display_raster_ops

CATEGORY: display

Highlight SOV application sov_spacing

Highlight SOV application active layer sov_active_only

Highlight SOV application

* SOV : Segment Over VoidCATEGORY: display_SOV


Appendix

200

Allegro PCB Editor

uprev noconfirm_uprev

*.dra *.dra , *.bsm,psm no_symbol_onsave

System design , multiboard_always

mil 2 drawing_no_4mils_msg

mil 3~4 , 2drawing_4mils

Product (Command .)db_tier_nomsg

DB

CATEGORY: drawing


Appendix

201

Allegro PCB Editor

impedence / delay , Shape / Plane Hole Cut-out ( , Plane layer Shield )use_accurate_delay_calculation

45 , segment jog DRC (45 )same_net_traps

12.0 / Delay Rule pre_12.0_delay_rule

Multi-drill padstack drill Error , padstack (Warning )padstack_hole_outside

Delay Rule Check Terminator length ( : Terminator length )include_terminators

DRC Check Shape, Copper ,Via Rule Antipad (Shape ,ViaRegular Pad )drc_old_pad_pad

Net Fillet DRC Check drc_fillet_samenet

Primary separation ( : "10MIL:20MIL", 15.0 )drc_diff_pair_primary_separation_tolerance

Diff pair net primary spacing , DRC ( - 0(DRC), 100(accuracy 1),200, 15.0 )drc_diff_pair_overide

Constraints / Physical Rule Set Current via list Sort (13.6 )cns_noviasortDRC

CATEGORY: drc


Appendix

202

Allegro PCB Editor

, allegro_etch_length_on Dynamic timing feedback allegro_dynam_timing_fixedpos , Constraint Manager Dynamic timing feedback allegro_dynam_timing Layer , Option Active Subclass acon_route_on_active_subclassGroup Route mode Current Space , Space acon_restore_space_mode

Add connect (From to - , All - Net , Off, : NO_RAT POWER_AND_GROUND Net )acon_oldhlt

Add connect Bubble (Hug, End point , )acon_offnet_snap

Add connect impedence rule ( impedence rule )acon_no_impedance_width

45 (45) , ( )acon_diag

(Etch) CATEGORY: etch


Appendix

203

Allegro PCB Editor

Slide mode Cline Segment Cline Snap( ) , Snap slide_no_snap

Rat Ts (on : , Unhighlight : )ratt_off_if_connected

Rats Nest 0.0 ~ 1.0 (0.0 - Manhattan Length(), 1.0 - / )rats_factor

Net Pin/Via Spacing Rule % (Pin/Via Space = 100%)padentry_factor Center line DRC no_show_dynam_elec_errors(Via Shove )Bond Pad Shove ( : Bond Pad Shove )bubble_shove_bondpads

, , Bubble ( : Bubble )bubble_no_display_invisible

(Etch) CATEGORY: etch


Appendix

204

Allegro PCB Editor

- pcbenv ( Home , env() global Home local . x:\document and settings\ , , .)temp

(ex : _allegro.jrl)journal_prefix ( : )journal_nobuffer(*.brd, *., *.log) ( : 2)ads_textrevs ads_sdreportPlot( ) ads_sdplot ads_sdlogartwork film ads_sdart ads_logrevs (*.brd, *.) ( , : 1)ads_boardrevs ( : 0)ads_autosaverevs ,

CATEGORY: file_management


Appendix

205

Allegro PCB Editor

gloss_pad_shape

Gloss DRC cbd_check

Gloss

CATEGORY: gloss

(Package Geometry ) (IDF_PLACE_BOUNDS_BOTTOM .)idf_place_bounds_top

(Package Geometry ) (IDF_PLACE_BOUNDS_TOP .)idf_place_bounds_bottom

IDF .PLACEMENT .NOTES import (= Data )idf_nodelete

ifd_out PART_NUMBER ( device type )idf_ignore_part_number

idf_out comp_height ( height value )idf_ignore_comp_height

IDF (Mechanical Interface) CATEGORY: idf


Appendix

206

Allegro PCB Editor

Find , no_zoom_to_object

( ) dynamic zoom ( , memorized zoom in, zoom out )no_dynamic_zoom

(CTRL+ -> ), no_dragpopup

Enter Tab (OK , ) form_oldreturn

funckey , Enter (15.0 , Enter . : Enter )canvascommandmode

( : CTRL+C, : /, CTRL+,)cancel_key

,

CATEGORY: input


Appendix

207

Allegro PCB Editor

net logic ( ) logic_edit_enabledCross-Probe ignore_external_highlight

die package symbol .(15.5 , : symbol symbol )icpkg_unplace_comps_on_deleteAuto rename Refdes fst_ref_desDimension/Draft , Layer Layer ( : Board Geometry / Dimension layer )draft_retain_class_subclassDC net Power and Ground Net NO_RAT dcnets_delete_noratAutoSilk , Solder_mask via clear autosilk_disregard_solder_mask

15.2 text report ( : HTML report, , consolold_reports text report . old_reports )allegro_old_report all_license_choices

CATEGORY: misc


Appendix

208

Allegro PCB Editor

PCB SI cross-section ( : Layer , Xsection , 6xx )xsection_modern

Swap (15.0 )swapcomp_acrossmodules schematic_editor

Text Block Size Board Text Block Size (12.0 , Text Board Text , : Text ))preserve_symbol_textblocks

Backannotation , function pcb_baf_pin_number14.0 Thermal Flash Symbol old_style_flash_symbols

(Component Swap , : )noswapripup

NC Drill Legend() ( , config path ncdpath )nclegend_file

CATEGORY: misc


Appendix

209

Allegro PCB Editor

UNIX : Print Device lp print_unix_command

MS-Windows : ( : txt , .)print_nt_extension

Text (plot setup IPF setup plot_vectext_width , *.ini .)plot_vectorize_text

Vectorized text Line width ( : plot_vectorize_text . *.ini plot_setup .)plot_vectext_width

Shape ( )plot_shape_spacing ( : 1 , MS-Windows )noplotmargins

CATEGORY: plot

(16px , : 16 ~ 256px, : 96px)roaminc

(ex : 1000(ms) 1 , : 250(ms))pcb_autoroamRoam -

CATEGORY: roam


Appendix

210

Allegro PCB Editor

Route keepin Shape DRC ( : Route keepin Shape , 15.5 )shape_noclip_rki

Shape shape_drag_move

Shape , Shape ( Shape , Shape .)shape_add_filltype

( , shape parameter DRC )pad_drcplusShape Line Hatch old_shape_fill_styleShape (Shape )no_shape_fill

MS-Windows , stipple() shape ( : Line hatch, 16Bit )new_shape_fill_nt

Shape Shape Net highlight_shape_netCline Void (Dynamic shape , : octagon)dv_endcapstyle

Thermal Relief , Shape Pin Line (Static shape , : 5(mil))av_thermal_extend

( Pin )Pin Void (Static shape , : 0 ~ 100(mil), : 100(mil), : Static shape Parameter -> Void Control -> Create pin Voids In-Line )av_inline

Cline Void (Static shape , : octagon)av_endcapstyleShape - dynamic / static

CATEGORY: shape


Appendix

211

Allegro PCB Editor

PCB SI (Allegro Allegro Package Designer )showelement_highspeed

showelement_brief Board Unit Inch^2 Cm^2 showelement_basearea

Element ( : Element )showelement_autoavoid

net Manhattan Length Pin ( : 0 , : 50, net 50 , Show Element Manhattan Length . NO_RAT PIN Manhattan Length )show_max_manhattan_pins

( ) , Show Element noshow_current_selections

Show Element

CATEGORY: show_element


Appendix

212

Allegro PCB Editor

Signoise (*.dat, *.wave, *.ibs, *.ctl)signoisepath(optional) signoise signal_optlib_dir signoise signal_install_dircomponent device model , pin use code ( : )sig_pinuse_frozen

Signal Model Assignment "Include ORIGINAL Model Path in Map File" ( : 0 1, : 0( ))sig_mapfile_orgpath

Loss Tangent ( : 1 Ghz, (Loss Tangent) )frequency_at_max_loss_tangent_in_ghz

Timestep Cline Segment enforce_welement_simulationS directconvolutionwithapproximation

(Display -> Parasitic) (, ) , Cross-Talk multi-trace .anl_show_coupled_trace

Shape Void mil ( : 99(mil), 99(mil) 99x99 mils^2 Shape Void )anl_min_void_area

CATEGORY: signal_analysis


Appendix

213

Allegro PCB Editor

Shield Layer Hole delay use_accurate_delay_calculation

( 90=)trapezoidal_angle_in_degree

Diff-pair , Diff-pair Net Net topology ( : Diff-pair Net topology )sq_enable_udiff_extraction

Shape Trace Trace ( : 40(mil))sn_maxwidthlimit circuit file ( : , circuit file )simsavefilesSignalXP sigxp_tier

T-line ( : )sigxp_length_mode

SignalXP Constraint Manager import ( )sigxp_allowoldrevs

CATEGORY: signal_analysis


Appendix

214

Allegro PCB Editor

Skill telskillMS-Windows , telskill ( : 40 ~ 140, : 80)skill_width

ilinit Load( : (% %/pcb/etc/skill $HOME/pcbenv $ALLEGRO_SITE/skill) ilinit Load)skill_old_ilinit

MS-Windows , telskill ( : 40 ~ 2500, : 24)skill_linebuffer

MS-Windows , telskill ( : 10 ~ 50, : 24)skill_heightSKILL

CATEGORY: skill

PCB SI title_sigxp title_apd PCB Editor title_allegro , 20

CATEGORY: title


Appendix

215

Allegro PCB Editor

( ) ( : 0 ~ 90)pcb_cursor_angle pcb_cursor / , add/reset noformscriptbutton noconfirm , noaboutUNIX , HTML http_newwindowUNIX , HTML ( : )http_netscape ( : 400)fontweight ( : 12)fontsize ( : Courier, !!)fontfixedface ( : MS Sans Serif, !!)fontface ( : medium)browser_text_size HTML allegro_html

CATEGORY: ui


Appendix

216

Allegro PCB Editor

, (ex : myscript , , allegro_myscript.scr, pad_designer_myscript.scr )script_startup

script_keepformopen () ( : 20 ~ 70)report_height (Recent Files) ( : 10)recentfilelist , README (15.0 )readme_never

CATEGORY: ui


Appendix

217

Allegro PCB Editor

prfeditpath menupathUI formpathUI ( )

CATEGORY: ui_paths

Undo ( : 0 ~ 50, 10)undo_depth Undo/Redo ( : 0 ~ 100MB, : 4MB)max_undo_memoryUndo/Redo

CATEGORY: undo

datatips_fixedpos datatips_delay , datatips ( , )

CATEGORY: z_early_adopter


Appendix

218

Allegro PCB Editor

- DRC Error code description -

Max Final Settle Max, Min First Switch Min, Noise Margin Min, Overshoot Max, Propagation Delay Max,Propagation Delay Min, Propagation Delay Path Type, Relative Propagation Delay Delta,Relative Propagation Delay Path Type, Relative Propagation Delay Scope

E - D

MaxD - U

Line to Line SpacingD - S

Phase Tolerance - ToleranceD - P

Negative plane islandsD - I

DFA Package to packageD - C

Soldermask to soldermask

Package to packageC - C

Bond Pad to ShapeB - S

Bond Pad to LineB - L

Bond Pad to Bond PadB - B

Constraint ViolationCode

Appendix

219

Allegro PCB Editor



Bond Pad to Component Edge

Bond Pad to Bond Pad (same net)F - F

Bond finger to component, Bond Pad to Component EdgeF - C

Active Window, Max Xtalk, Max Peak Xtalk, Sensitive Window, Maximum Inter Crosstalk,Maximum Intra Crosstalk

E - X

Max Via CountE - V

Verify ScheduleE - T

Max Stub LengthE - S

ParallelismE - P

Layer Sets, Max Exposed Length, Total Etch Length Max, Total Etch Length MinE - L

Appendix

220

Allegro PCB Editor



Shape to Route Keepin, Shape to Route KeepoutK - S

Thru Pin to Route Keepin, Thru Pin to Route Keepout, SMD to Route Keepin, SMD to Route Keepout,Test Pin to Route Keepin, Test Pin to Route Keepout, Test Pin to No ProbeK - P

Line to Route Keepin, Line to Route KeepoutK - L

Package to place keepin, Package to place keepoutK - C

Bond Pad to Route Keepin, Bond Pad to Route Keepout, Bond Pad to Via KeepoutK - B

Allow - TsJ - N

Single-line Impedance Target and ToleranceI - M

Appendix

221

Allegro PCB Editor



Line Width - Max, Line Width - Min, Neck - Max Length, Neck - Min WidthL - W

Shape to LineL - S

Line to LineL - L

Via to Route Keepin, Via to Route Keepout, Via to Via Keepout, BB Via to Route Keepin, BB Via to Route Keepout,BB Via to Via Keepout, Test Via to Route Keepin, Test Via to Route Keepout, Test Via to Via Keepout,Test Via to No Probe

K - V

Appendix

222

Allegro PCB Editor



Line to SMD Pin, Line to Test Pin, Line to Thru PinP - L

Bond Pad to SMD Pin, Bond Pad to Test Pin, Bond Pad to Thru PinP - B

Soldermask to ViaM - V

Soldermask to shapeM - S

Soldermask to PinM - P

Pad Soldermask to Pad SoldermaskM - M

Soldermask to pad and clineM - L

Symbol Soldermask to Pad SoldermaskM - C

Soldermask alignment, Pad Soldermask Alignment, Symbol Soldermask AlignmentM - A

Line Width - Max, Line Width - Min, Neck - Max Length, Neck - Min WidthL - W

Appendix

223

Allegro PCB Editor



Shape to ShapeS - S

Allow - EtchS - N

Package to roomR - C

SMD Pin to BB Via, SMD Pin to Test Via, SMD Pin to Thru Via, Test Pin to BB Via, Test Pin to Test Via,Test Pin to Thru Via, Thru Pin to BB Via, Thru Pin to Test Via, Thru Pin to Thru Via

P - V

Shape to SMD Pin, Shape to Test Pin, Shape to Thru PinP - S

SMD Pin to SMD Pin, SMD Pin to Test Pin, Test Pin to Test Pin, Thru Pin to SMD Pin,Thru Pin to Test Pin, Thru Pin to Thru PinP - P

Appendix

224

Allegro PCB Editor



BB Via to BB Via, BB Via to Test Via, Test Via to Test Via, Thru Via to BB Via, Thru Via to Test Via,Thru Via to Thru ViaV - V

Shape to BB Via, Shape to Test Via, Shape to Thru ViaV - S

ViasV - N

Line to BB Via, Line to Test Via, Line to Thru ViaV - L

Allow - Pad-Pad Connect, BB Via Stagger - Max, BB Via Stagger - Min, Min BB Via GapV - G

Bond Pad to BB Via, Bond Pad to Test Via, Bond Pad to Thru ViaV - B

Testpoint loc. to component, Testpoint pad to component, Testpoint under componentT - C

Appendix

225

Allegro PCB Editor



Externally Determined ViolationX - D

Wire to wire (different profile)W - X

Wire to wire (same profile)W - W

Wire to pinW - P

Max. bonding wire lengthW - I

Wire to bond fingerW - F

Wire end to wire endW - E

Bonding wire diameterW - D

Min. bonding wire length, Wire to die edge angleW - A

Appendix

Documents

Allegro16_2_교재