Bao Cao Dong Ho Bao Thuc

Hoc Vic Cng Ngh Bu Chinh Vin Thng

HOC VIN CNG NGH BU CHINH VIN THNGKHOA KI THUT IN - IN T N MN HCMN HCTHIT K MACH IN TNHOM 5 Nhm sinh vin :TRN QUC TOAN

NGYN MANH HUNG

NGUYN VIT HUNG

PHUNG C HAI

Lp : D10DT2

Gio vin hng dn :

HA NI 2013I.1) ng h ng h l mt cng c o c nhng mc thi gian nh hn mt ngy; i lp vi lch, l mt cng c o thi gian di hn mt ngy. Nhng loi ng h dng trong k thut thng c chnh xc rt cao v cu to rt phc tp. Trong khi , ngi ta c th to ra nhng loi ng h nh d dng mang theo bn mnh (gi l ng h eo tay). Nhng loi ng h hin i (t th k 14 tr i) thng th hin ba thng tin: gi, pht, giy. Va thm mt s ng dung nh ng h th thao, bao thc. 2) Cch hin th thi gian

ng h c:

ng h c th hin thi gian s dng cc gc. Mt ng h c nhng con s t 1 n 12 v s dng kim ch gi v c pht. T mt s n mt con s k cn l 5 pht (i vi kim pht), 1 gi (i vi kim gi) hay 5 giy (i vi kim giy).

Mt loi ng h c khc c s dng l ng h mt tri. N hot ng nh theo di thng xuyn nh sng Mt Tri, v ngi ta theo di bng cch nhn bng ca chng.

ng h in t:

ng h in t s dng h thng s th hin thi gian. Thng thng c 2 cch th hin:

24 gi m gi t 00-23

12 gi vi k hiu AM / PM (ch yu M)

Nhng ng h in t s dng mn hnh LCD hay LED, ng catode th hin hnh nh nhng con s. Khi nhng ng h in t thay pin, chng thng "qun" d liu v thi gian trc .

ng h m thanh:

tin li hn, c mt s ng h s dng m thanh bo hiu gi. m thanh c th c s dng nh ngn ng t nhin ("By gi l mi su gi ba mi pht) hay mt m (s ting chung bo hiu s gi).

ng h ch: Loi ng h ny hin thi gian dng ch. Nu nh ng h in t chng ta c c nhng con s 12:35 th ng h ch, chng ta c th c c "Mi hai gi ba mi lm pht". Mt s loi ng h khc s dng c ch gn ng khin ngi s dng cm thy d chu hn khi s dng ng h (v d "Khong mi hai gi ri").3) Mc ch ng h treo tng c dng trong nh v vn phng, ng h eo tay c mang trn tay, v nhng loi ng h ln c t nhng ni cng cng (nh th hay bn xe). Hu ht nhng my tnh v in thoi di ng u c gc di mn hnh hin th gi.

Tuy nhin, ng h khng phi lc no cng c s dng hin th thi gian. N cn c th s dng iu khin mt vt theo thi gian. V d nh ng h chung c th c dng lm chung bo tit hc, bao thc . N c th c gi chnh xc hn l mt h thng m gi.

My tnh s dng nhng tn hiu ng h ng b qu trnh x l (mc du c mt s nghin cu v b x l khng ng b). My tnh lu tr thi gian bo hiu hay ch l hin th thi gian. Bn trong my tnh c mt ng h c nui bng pin. My tnh vn c th hot ng ngay c khi ng h trong my b cht nhng khi khi ng my li, ng h ca my tnh s c khi ng li.

Thi gian l mt khi nim c bn trong mn vt l. Do , ch to dng c o thi gian chnh xc c ngha quan trng trong cc th nghim.

ng h in t

ng h in t trn mt l vi sng4) Cc cng ngh chip ng dng trong thit k thi gian thc c mt trn th trng

Do yu cu v thi gian thc nn chng ta s khng xt ti cc mch in thit k ng h s dng cc mch in tng t v cc IC s thng thng, chng ta s xt ti vic s dng IC thi gian thc, vi iu khin, cch thc hin th thi gian thc.

IC thi gian thc: Hin nay trn th trng c 2 loi IC thi gian thc ph bin l DS1307 v DS12887. Cc IC ny u c chc nng chy thi gian thc v lu gi khi mt in, vi DS1307 cn c thm ngun nui l mt pin cmos 3V, vi DS12887 c sn pin tch hp bn trong. Thc hin giao tip vi vi iu khin hin th thi gian v ci t gi Trn c s th chng ta c th s dng c 2 loi IC ny, nhng vi nhm em th vic la chn s l DS1307 v n cng thc hin c yu cu m gi thnh th r hn.

Vi iu khin:

C rt nhiu loi vi iu khin khc nhau c th s dng trong mch ng h ny nh vi iu khin pic, avr, 8051

Cc loi vi iu khin pic hay avr c nhiu u im hn so vi 8051 nh h tr kt ni ngoi vi tt hn, tc x l nhanh hn, lp trnh n gin hn. Nhng gi thnh th li cao hn nhiu so vi 8051 m trong mch ny chng em s dng AT89C51. Vic s dng qu tn km cho 1 mch l khng cn thit trong khi mt chip cng c th lm c iu ny m gi thnh r hn th l la chn ti u hn. Hin th:Chng ta c 2 cch hin th l : s dng led 7 thanh v s dng lcd. Led 7 thanh :

u im: hin th r rng v thu ht c s ch v c th nhn xa.

Nhc im: mch in phc tp cn thm cc IC cht.

LCD 16x2:

u im: hin th d dng, c th linh ng hn trong vic hin th thi gian,kt ni n gin mch in khng phc tp

Nhc im: khng thu ht c s ch bng led 7 thanh,gi thnh cao

Xt trn iu kin lm mch ny th s led 7 thanh tng i nhiu v cn thm cc IC cht do v gi c th s tng ng vi mt LCD 16x2. Thm na khi s dng LCD chng ta s khng phi mc phc tp. Vi ng h s dng cho c nhn ny th chng ta c th cn dng LCD l .

5) Thit k machQua phn tch trn, nhm chng em a ra gii php xy dng ng h da trn IC thi gian thc. c gi t IC thi gian thc, hin th thi gian lin tc v c th ci t c gi, lu gi khi mt in v sai lch thi gian l t nht (theo qung co ca nh sn xut : vi mt pin lithium 48mAh hoc ln hn s lu gi cho DS1307 khong hn 10 nm khi khng c ngun in cung cp cho mch iu kin +25C ).a) Gii php thit k Vic la chn gii php thng c xem xt trn nhiu phng din nhng quan trng l gii php c kh thi khng? C ph hp vi vi thc t v tha mn yu cu v kinh t?

ng h thi gian thc vi b no iu khin l AT89C51 v cc linh kin khc: LCD hin th, IC n p7805, IC thi gian thc DS1307.

AT89C51 c cc u im: tnh nng v tc p ng c yu cu k thut trong ng dng khng i hi cao;gi thnh thp hn h vi iu khin khc; c h tr lp trnh iu khin bng c hp ng v C...

IC DS1307 l IC chuyn dng, cho kh nng chnh xc v thi gian.

LCD hin th mt cch r rng, linh ng.

IC n p 7805 c s dng rng ri trong cc b ngun. V vy gii php thit k ng h thi gian thc dng cc linh kin trn c nhiu u th hn so vi nhng gii php khc. ng thi m bo c yu cu v kinh t. Trong thc t hin nay lch vn nin l mt sn phm tng t ng h thi gian thc v rt gn gi vi mi ngi.

b)Cc yu cu

Vi sn phm ng h thi gian thc i hi cc yu cu:

Hin th ng thi gian:ngy, thng, nm, gi, pht, giy.

iu chnh v thay i c thi gian.

m bo ng v thi gian sau khi mt in.

Kh nng thc thi:Thi gian p ng, chnh xc

m bo v kch thc v trng lng cho php.

Kha nng bao thc

an ton, kh nng chng li s ph hoi hay xm nhp

c) Gii hn cho h thng

S dng ngun in 5V. Lm vic lin tc. Kch thc ph hp vi ngi s dng. H thng nh gn. H thng lu c thi gian khi mt ngun cp (c ngun d tr). Ngun nui (pin CMOS) cho IC thi gian thc m bo. Lm vic trong iu kin mi trng bnh thng.II. THIT K H THNG1) S tng qut

Khi Ngun: cung cp ngun cho h thng.

Khi Thi gian thc: lu tr thi gian thc, thi gian ci t.

Khi X l: Dng vi iu khin AT89C51 ly d liu t khi thi gian thc, lu tr v a ra khi hin th v nhn tn hiu t khi giao tip. Khi Hin th: ly tn hiu ra t vi iu khin, thc hin giao tip vi vi iu khin hin th gi v ngy.

Khi giao tip: l khi bn phm, thc hin ci t gi vi iu khin lu d liu vo trong khi thi gian thc, hen gi bao thc.2) Cc module trong h thnga) Khi ngun y l module dng to ra ngun in p chun +5V. S dng IC7805.

u vo l in p xoay chiu sau khi c bin i qua my bin p, a vo b Diode cu cho ra dng in mt chiu ( lc ny in p nm trong khong t 7->10V). Sau khi i qua IC n p 7805 s to ra ngun in p chun +5V cung cp cho mch.

b) Khi iu khin trung tm Khi iu khin trung tm s dng vi iu khin AT89C51, qua chng trnh lp trnh c np cho chip, vi iu khin s iu khin vic c, ghi thi gian thc, hin th thi gian ln khi hin th l LCD.

B dao ng thch anh c tc dng to xung nhp vi tn s 12MHz cho VK hot ng. Hai u ny c ni vo 2chn XTAL1 v XTAL2 ca VK.

B RESET c tc dng a vi iu khin v trng thi ban u. Khi nt Reset c n in p +5V t ngun c ni vo chn Reset ca vi iu khin c chy thng xung t lc ny in p ti chn vi iu khin thay i t ngt v 0, VK nhn bit c s thay i ny v khi ng li trng thi ban u cho h thng.

c) Khi to thi gian thc DS1307 l mt IC thi gian thc vi ngun cung cp nh, dng cp nht thi gian v ngy thng vi 56 bytes SRAM. a ch v d liu c truyn ni tip qua 2 ng bus 2 chiu. N cung cp thng tin v gi, pht, giy , th, ngy , thng, nm. Ngy cui thng s t ng c iu chnh vi cc thng nh hn 31 ngy,bao gm c vic t ng nhy nm. ng h c th hot ng dng 24h hoc 12h vi ch th AM/PM. khng phi iu chnh li thi gian vo nhng lc b mt ngun, c th ni thm 1pin 3V vo chn s 3 ca IC DS1307 (sao cho chn(+) ca pin ni vo IC v chn () ca pin ni xung t). Hai chn 1 v 2 ca DS1307 c ni vo b dao ng thch anh c tn s 32,768KHz to dao ng cho IC hot ng.

d) Khi hin th S dng LCD 16x2, hin th thi gian linh hot, hin th c nhiu k t, gip cho vic quan st thi gian khi ng h chy bnh thng cng nh lc ci t trc quan v linh hot hn.

e) Khi giao tip phm bm Gm 3 nt n, hot ng tng t nt Reset. Khi n nt th cc chn vi iu khin c ni vi phm bm a in p xung t lc ny in p ti cc chn vi iu khin bng 0 lm cho vi iu khin nhn bit c s thay i ny v thc hin lnh cn iu khin. Nt th ba c tc dng thit t ch cho vi iu khin lm vic.

3) La chn linh kin

a) Vi iu khin AT89C51 c im v chc nng hot ng ca cc IC h MSC-51 hon ton tng t nh nhau. y gii thiu IC AT89C51 l mt h IC vi iu khin do hng Intel ca M sn xut. Chng c cc c im chung nh sau: + 4K Bytes Flash rom.

+ 128 Bytes Ram. + 4 port 8 bit.

+ 2 b nh thi 16 bit.

+ C port ni tip.

+ C th m rng b nh chng trnh ngoi 64 K Byte.

+ B x l bit.

AT89C51 l mt b vi x l 8 bit, loi CMOS, c tc cao v cng sut thp vi b nh Flash c th lp trnh c. N c sn xut vi cng ngh b nh khng bay hi mt cao ca hng Atmel, v tng thch vi h MCS-51TM v chn ra v tp lnh. AT89C51 c cc c trng c bn nh sau: 4 K byte Flash, 128 byte RAM, 32 ng xut nhp, hai b nh thi/m 16-bit, mt cu trc ngt hai mc u tin v 5 nguyn nhn ngt, mt port ni tip song cng, mch dao ng v to xung clock trn chip. AT89C51 c thit k vi logic tnh cho hot ng c tn s gim xung 0 v h tr hai ch tit kim nng lng c la chn bng phn mm. Ch ngh dng CPU trong khi vn cho php RAM, cc b nh thi/m, port ni tip v h thng ngt tip tc hot ng. Ch ngun gim duy tr ni dung ca RAM nhng khng cho mch dao ng cung cp xung clock nhm v hiu ho cc hot ng khc ca chip cho n khi c reset cng tip theo.

Hnh nh AT89C51

S khi ca AT89C51*. M t cc chn

S cc chn AT89C51 c tt c 40 chn vi cc chc nng nh sau:

Vcc (40): Chn cung cp in (5V). GND (20): Chn ni t (0V). Port 0 (32-39): Port 0 l port xut nhp 8-bit hai chiu. Port 0 cn c cu hnh lm bus a ch (byte thp) v bus d liu a hp trong khi truy xut b nh d liu ngoi v b nh chng trnh ngoi. Port 0 cng nhn cc byte m trong khi lp trnh cho Flash v xut cc byte m trong khi kim tra chng trnh (Cc in tr ko ln bn ngoi c cn n trong khi kim tra chng trnh). Port 1(1-8) : Port 1 l port xut nhp 8-bit hai chiu. Port 1 cng nhn byte a ch thp trong thi gian lp trnh cho Flash. Port 2 (21-28): Port 2 l port xut nhp 8-bit hai chiu. Port 2 to ra cc byte cao ca bus a ch trong thi gian tm np lnh t b nh chng trnh ngoi v trong thi gian truy xut b nh d liu ngoi s dng cc a ch 16-bit. Trong thi gian truy xut b nh d liu ngoi s dng cc a ch 8-bit, Port 2 pht cc ni dung ca thanh ghi chc nng c bit P2. Port 2 cng nhn cc bt a ch cao v vi tn hiu iu khin trong thi gian lp trnh cho Flash v kim tra chng trnh. Port 3 (10-17) : Port 3 l Port xut nhp 8-bit hai chiu. Port 3 cng cn lm cc chc nng khc ca AT89C51. Cc chc nng ny c lit k nh sau: ChnTnChc nng

3.0RxDNg vo Port ni tip

3.1TxDNg ra Port ni tip

3.2

Ng vo ngt ngoi 0

3.3

Ng vo ngt ngoi 1

3.4T0Ng vo bn ngoi ca b nh thi 1

3.5T1Ng vo bn ngoi ca b nh thi 0

3.6

iu khin ghi b nh d liu ngoi

3.7

iu khin c b nh d liu ngoi

Port 3 cng nhn mt vi tn hiu iu khin cho vic lp trnh Flash v kim tra chng trnh.

RST (9): Ng vo reset. Mc cao trn chn ny trong 2 chu k my trong khi b dao ng ang hoat ng s reset AT89C51.

Mch reset tc ng bng tay v t ng reset khi khi ng my ALE/ (30): ALE l mt xung ng ra cht byte thp ca a ch trong khi truy xut b nh ngoi. Chn ny cng lm ng vo xung lp trnh () trong thi gian lp trnh cho Flash. Khi hot ng bnh thng, xung ng ra ALE lun c tn s khng i l 1/6 tn s ca mch dao ng, c th c dng cho cc mch ch nh thi t bn ngoi v to xung clock. Tuy nhin, lu l mt xung ALE s b b qua trong mi mt chu k truy xut b nh d liu ngoi.

Khi cn, hot ng ALE c th c v hiu ho bng cch set bit 0 ca thanh ghi chc nng c bit c a ch 8Eh. Khi bit ny c set, ALE ch tch cc trong thi gan thc hin lnh MOVX hoc MOVC. Ngc li, chn ny s c ko ln cao. Vic set bit khng cho php hot ng cht byte thp ca a ch s khng c tc dng nu b vi iu khin ang ch thc thi chng trnh ngoi.

(29): (Program Store Enable) l xung iu khin truy xut b nh chng trnh ngoi. Khi AT89C52 ang thc thi chng trnh t b nh chng trnh ngoi, c kch hot hai ln mi chu k my, nhng hai hot ng s b b qua mi khi truy cp b nh d liu ngoi. /Vpp (31): (External Access Enable) l chn cho php truy xut b nh chng trnh ngoi (bt u t a ch t 0000H n FFFFH).

= 0 cho php truy xut b nh chng trnh ngoi, ngc li =1 s thc thi chng trnh bn trong chip. Tuy nhin, lu rng nu bit kho 1 (lock-bit 1) c lp trnh, s c cht bn trong khi reset. Chn ny cng nhn in p cho php lp trnh Vpp=12V khi lp trnh Flash (khi in p lp trnh 12V c chn). XTAL1 v XTAL2: XTAL1 v XTAL2 l hai ng vo v ra ca mt b khuch i o ca mch dao ng, c cu hnh dng nh mt b dao ng trn chip.

Hnh 8: Xung clock

Khng c yu cu no v chu k nhim v ca tn hiu xung clock bn ngoi do tn hiu ny phi qua mt flip-flop chia hai trc khi n mch to xung clock bn trong, tuy nhin cc chi tit k thut v thi gian mc thp v mc cao, in p cc tiu v cc i cn phi c xem xt.* Cc ch c bit+.Ch ngh

Trong ch ngh, CPU t i vo trng thi ng trong khi tt c cc ngoi vi bn trong chip vn tch cc. Ch ny c iu khin bi phn mm. Ni dung ca RAM trn chip v ca tt c cc thanh ghi chc nng c bit vn khng i trong khi thi gian tn ti ch ny. Ch ngh c th c kt thc bi mt ngt bt k no c php hoc bng cch reset cng.

Ta cn lu rng khi ch ngh c kt thc bi mt reset cng, chip vi iu khin s tip tc bnh thng vic thc thi chng trnh t ni chng trnh b tm dng, trong vng 2 chu k my trc khi gii thut reset mm nm quyn iu khin.

ch ngh, phn cng trn chip cm truy xut RAM ni nhng cho php truy xut cc chn ca cc port. trnh kh nng c mt thao tc ghi khng mong mun n mt chn port khi ch ngh kt thc bng reset, lnh tip theo yu cu ch ngh khng nn l lnh ghi n chn port hoc n b nh ngoi.+ Ch ngun gim Trong ch ny, mch dao ng ngng hot ng v lnh yu cu ch ngun gim l lnh sau cng c thc thi. RAM trn chip v cc thanh ghi chc nng c bit vn duy tr cc gi tr ca chng cho n khi ch ngun gim kt thc. Ch c mt cch ra khi ch ngun gim, l reset cng.

Vic reset s xc nh li cc thanh ghi chc nng c bit nhng khng lm thay i RAM trn chip. Vic reset khng nn xy ra (chn reset mc tch cc) trc khi Vcc c khi phc li mc in p bnh thng v phi ko di trng thi tch cc ca chn reset lu cho php mch dao ng hot ng tr li v t trng thi n nh.

Trng thi ca cc chn trong thi gian tn ti ch ngh va ch ngun gim c cho trong bng sau:Ch B nh chng trnhALEPSENPORT 0PORT 1PORT 2PORT 3

NghBn trong11D liuD liuD liuD liu

NghBn ngoi11Th niD liuD liuD liu

Ngun gimBn trong00D liuD liuD liuD liu

Bn ngoi00Th niD liuD liuD liu

* Cc bt kho b nh chng trnh

Trn chip c ba bit kho, cc bt ny c th khng cho php lp trnh hoc cho php lp trnh, cc bit ny cho ta thm mt s c trng na ca AT89C51 nh sau.Khi bit kho 1 LB1 c lp trnh, mc logic chn c ly mu v c cht trong khi reset. Nu vic cp ngun cho chip khng c cng dng reset, mch cht c khi ng bng mt gi tr ngu nhin v gi tr ny c duy tr cho n khi c tc ng reset. iu cn thit l gi tr c cht ca phi ph hp vi mc logic hin hnh chn ny.Cc bit kha chng trnhLoi bo v

Ch LB1LB2LB3

1UUUKhng c c trng kha chng trnh

2PUUCc lnh MOVC c thc thi t b nh chng trnh ngoi khng c php tm np lnh t b nh ni, c ly mu v c cht khi reset, hn na vic lp trnh trn Flash b cm

3PPUNh ch 2, cm thm vic kim tra chng trnh

4PPPNh ch 3, cm thm vic thc thi chng trnh ngoi

b) IC thi gian thc DS1307* Gii thiu chung v DS1307:

IC thi gian thc l h vi iu khin ca hng dalat. DS1307 c mt s c trng c bn sau:

DS1307 l IC thi gian thc vi ngun cung cp nh dng cp nht thi gian v ngy thng . - SRAM : 56 bytes. - a ch v d liu c truyn ni tip qua 2 ng bus 2 chiu. - DS1307 c mt mch cm bin in p dng d cc in p li v t ng ng ngt vi ngun pin cung cp 3V: + DS1307 c 7 bytes d liu nm t a ch 0x00 ti 0x06, 1 byte iu khin, v 56 bytes lu tr ( dnh cho ngi s dng ). + Khi x l d liu t DS1307, h t chuyn cho ta v dng s BCD, v d nh ta c c d liu t a ch 0x04 (tng ng vi Day- ngy trong thng) v ti 0x05 (thng) l 0x15, 0x11. + Lu n vai tr ca chn SQW/OUT. y l chn cho xung ra ca DS1307 c 4 ch 1Hz, 4.096HZ, 8.192Hz, 32.768Hz... cc ch ny uc quy nh bi cc bt ca thanh ghi Control Register (a ch 0x07 ). + a ch ca DS1307l 0xD0.

C ch hot ng : DS1307 hot ng vi vai tr slave trn ng bus ni tip.Vic truy cp c thi hnh vi ch th start v mt m thit b nht nh c cung cp bi a ch cc thanh ghi. Tip theo cc thanh ghi s c truy cp lin tc n khi ch th stop c thc thi.

IC thi gian thc DS1307*C ch hot ng v chc nng ca DS1307:

Vcc: ni vi ngun , GND: t X1,X2: ni vi thch anh 32,768 kHz Vbat: u vo pin 3V SDA: chui data , SCL: dy xung clock SQW/OUT: xung vung/u ra driver

DS1307 l mt IC thi gian thc vi ngun cung cp nh, dng cp nht thi gian v ngy thng vi 56 bytes SRAM. a ch v d liu c truyn ni tip qua 2 ng bus 2 chiu. N cung cp thng tin v gi, pht, giy, th, ngy, thng, nm. Ngy cui thng s t ng c iu chnh vi cc thng nh hn 31 ngy, bao gm c vic t ng nhy nm. ng h c th hot ng dng 24h hoc 12h vi ch th AM/PM. DS1307 c mt mch cm bin in p dng d cc in p li v t ng ng ngt vi ngun pin cung cp.

DS 1307 hot ng vi vai tr slave trn ng bus ni tip. Vic truy cp c thi hnh vi ch th START v mt m thit b nht nh c cung cp bi a ch cc thanh ghi. Tip theo cc thanh ghi s c truy cp lin tc n khi ch th STOP c thc thi.

S khi ca DS1307:

*M t hot ng ca cc chn:

Vcc, GND: ngun mt chiu c cung cp ti cc chn ny. Vcc l u vo 5V. Khi 5V c cung cp th thit b c th truy cp hon chnh v d liu c th c v vit. Khi pin 3 V c ni ti thit b ny v Vcc nh hn 1,25Vbat th qu trnh c v vit khng c thc thi, tuy nhin chc nng timekeeping khng b nh hng bi in p vo thp. Khi Vcc nh hn Vbat th RAM v timekeeper s c ngt ti ngun cung cp trong (thng l ngun 1 chiu 3V). Vbat: u vo pin cho bt k mt chun pin 3V. in p pin phi c gi trong khong t 2,5 n 3V m bo cho s hot ng ca thit b.

SCL(serial clock input): SCL c s dng ng b s chuyn d liu trn ng dy ni tip.

SDA(serial data input/out): l chn vo ra cho 2 ng dy ni tip. Chn SDA thit k theo kiu cc mng h, i hi phi c mt in tr ko trong khi hot ng.

SQW/OUT(square wave/output driver) - khi c kch hot th bit SQWE c thit lp 1 chn SQW/OUT pht i 1 trong 4 tn s (1Hz, 4kHz, 8kHz, 32kHz). Chn ny cng c thit k theo kiu cc mng h v vy n cng cn c mt in tr ko trong. Chn ny s hot ng khi c Vcc v Vbat c cp.

X1,X2: c ni vi mt thch anh tn s 32,768kHz. L mt mch to dao ng ngoi, hot ng n nh th phi ni thm 2 t 33pF .

Cng c DS1307 vi b to dao ng trong tn s 32,768kHz, vi cu hnh ny th chn X1 s c ni vo tn hiu dao ng trong cn chn X2 th h. *S a ch RAM v RTC:

Thng tin v thi gian v ngy thng c ly ra bng cch c cc byte thanh ghi thch hp. Thi gian v ngy thng c thit lp cng thng qua cc byte thanh ghi ny bng cch vit vo nhng gi tr thch hp. Ni dung ca cc thanh ghi di dng m BCD (binary coded decreaseimal). Bit 7 ca thanh ghi seconds l bit clock halt (CH), khi bit ny c thit lp 1 th dao ng disable, khi n c xo v 0 th dao ng c enable. Ch : enable dao ng trong sut qu trnh cu hnh thit lp (CH=0).Thanh ghi thi gian thc c m t nh sau:

DS1307 c th chy ch 24h cng nh 12h. Bit th 6 ca thanh ghi hours l bit chn ch 24h hoc 12h, khi bit ny mc cao th ch 12h c chn. ch 12h th bit 5 l bit AM/PM vi mc cao l l PM. ch 24h th bit 5 l bit ch 20h (t 20h n 23h).

Trong qu trnh truy cp d liu, khi ch th START c thc thi th dng thi gian c truyn ti mt thanh ghi th 2, thng tin thi gian s c c t thanh ghi th cp ny, trong khi ng h vn tip tc chy. Trong DS1307 c mt thanh ghi iu khin iu khin hot ng ca chn SQW/OUT :

OUT(output control): bit ny iu khin mc ra ca chn SQW/OUT khi u ra xung vung l disable. Nu SQWE = 0 th mc logic chn SQW/OUT s l 1 nu OUT=1 v OUT = 0 nu OUT = 0 .

SQWE(square wave enable): bit ny c thit lp 1 s enable u ra ca b to dao ng. Tn s ca u ra sng vung ph thuc vo gi tr ca RS1 v RS0.

DS1307 h tr bus 2 dy 2 chiu v giao thc truyn d liu, thit b gi d liu ln bus c gi l b pht v thit b nhn gi l b thu, thit b iu khin qu trnh ny gi l master, thit b nhn s iu khin ca master gi l slave. Cc bus nhn s iu khin ca master, l thit b pht ra chui xung clock(SCL),master s iu khin s truy cp bus, to ra cc ch th START v STOP.

*S truyn nhn d liu trn chui bus 2 dy :

Tu thuc vo bit R/ w m 2 loi truyn d liu s c thc thi:

Truyn d liu t master truyn v slave nhn: Master s truyn byte u tin l a ch ca slave. Tip sau l cc byte d liu, slave s gi li bit thng bo nhn c (bit acknowledge) sau mi byte d liu nhn c, d liu s truyn t bit c gi tr nht (MSB). Truyn d liu t slave v master nhn: byte u tin (a ch ca slave) c truyn ti slave bi master. Sau slave s gi li master bit acknowledge, tip theo slave s gi cc byte d liu ti master. Master s gi cho slave cc bit acknowledge sau mi byte nhn c tr byte cui cng, sau khi nhn c byte cui cng th bit acknowledge s khng c gi. Master pht ra tt c cc chui xung clock v cc ch th START v STOP. s truyn s kt thc vi ch th STOP hoc ch th quay vng START. Khi ch th START quay vng th s truyn chui d liu tip theo c thc thi v cc bus vn cha c gii phng. D liu truyn lun bt u bng bit MSB.

DS1307 c th hot ng 2 ch sau:

Ch slave nhn( ch DS1307 ghi): chui d liu v chui xung clock s c nhn thng qua SDA v SCL. Sau mi byte c nhn th 1 bit acknowledge s c truyn, cc iu kin START v STOP s c nhn dng khi bt u v kt thc mt truyn 1 chui, nhn dng a ch c thc hin bi phn cng sau khi chp nhn a ch ca slave v bit chiu. Byte a ch l byte u tin nhn c sau khi iu kin START c pht ra t master. Byte a ch c cha 7 bit a ch ca DS1307, l 1101000, tip theo l bit chiu (R/ w) cho php ghi khi n bng 0, sau khi nhn v gii m byte a ch th thit b s pht i 1 tn hiu acknowledge ln ng SDA. Sau khi DS1307 nhn dng c a ch v bit ghi th master s gi mt a ch thanh ghi ti DS1307, to ra mt con tr thanh ghi trn DS1307 v master s truyn tng byte d liu cho DS1307 sau mi bit acknowledge nhn c, sau master s truyn iu kin STOP khi vic ghi hon thnh.

Ch slave pht ( ch DS1307 c): byte u tin slave nhn c tng t nh ch slave ghi. Tuy nhin trong ch ny th bit chiu li ch chiu truyn ngc li. Chui d liu c pht i trn SDAbi DS 1307 trong khi chui xung clock vo chn SCL. Cc iu kin START v STOP c nhn dng khi bt u hoc kt thc truyn mt chui. byte a ch nhn c u tin khi master pht i iu kin START. Byte a ch cha 7 bit a ch ca slave v 1 bit chiu cho php c l 1. Sau khi nhn v gii m byte a ch th thit b s nhn 1 bit acknowledge trn ng SDA. Sau DS1307 bt u gi d liu ti a ch con tr thanh ghi thng qua con trthanh ghi. Nu con tr thanh ghi khng c vit vo trc khi ch c c thit lp th a ch u tin c c s l a ch cui cng cha trong con tr thanh ghi . DS1307 s nhn c mt tn hiu Not Acknowledge khi kt thc qu trnh c. c d liu - ch slave pht.

Thi gian thc hin vic c, ghi d liu ca DS1307: s ng b:

c) LCD 16x2

Ging nh led 7 thanh, LCD l mt thit b ngoi vi dng giao tip vi ngi dng, so vi led 7 thanh th LCD c u im l hin th c tt c cc k t trong bng m ascci, trong khi led 7 thanh ch hin th c mt s k t, nhng LCD li c nhc im l gi thnh cao v khong cch nhn gn.

Hnh nh LCD 16x2Chc nng ca cc chn LCD :ChnK HiuMc LogicI/OChc Nng

1Vss--Ngun (GND)

2Vcc--Ngun (+5V)

3Vee--Chnh tng phn

4RS0/1I0=Nhp lnh

1=Nhp d liu

5R/W0/1I0=Ghi d liu1=c d liu

6E1,1 0ITn hiu cho php

7DB00/1I/OBt d liu 0








15Lamp---n LCD

16Lamp+--n LCD

Cc chn Vcc, Vss v Vee:Chn Vcc cp dng ngun 5V, chn Vss ni t, chn Vee c dng iu khin tng phn ca mn hnh LCD.

RS ( Register select):Khi mc thp, ch th c truyn n LCD nh xo mn hnh ,v tr con tr .Khi mc cao, k t c truyn n LCD. R/W (Read/Write):Dng xc nh hng ca d liu c truyn gia LCD v vi iu khin. Khi n mc thp d liu c ghi n LCD v khi mc cao, d liu c c t LCD. Nu chng ta ch cn ghi d liu ln LCD th chng ta c th ni chn ny xung GND tit kim chn. E (Enable):Cho php ta truy cp/xut n LCD thng qua chn RS v R/W. Khi chn E mc cao (1) LCD s kim tra trng thi ca 2 chn RS v R/W v p ng cho ph hp. Khi d liu c cp n chn d liu th mt xung mc cao xung thp phi c p n chn ny LCD cht d liu trn cc chn d liu. Xung ny phi rng ti thiu l 450ns. Cn khi chn E mc thp (0), LCD s b v hiu ho hoc b qua tn hiu ca 2 chn RS v R/W.

Cc chn D0 - D7:y l 8 chn d liu 8 bt, c dng gi thng tin ln LCD hoc c ni dung ca cc thanh ghi trong LCD. Cc k t c truyn theo m tng ng trong bng m ascii. Cng c cc m lnh m c th c gi n LCD xo mn hnh hoc a con tr v u dng hoc nhp nhy con tr.

LCD c 2 ch giao tip: Ch 4 bit (ch dng 4 chn D4 n D7 truyn d liu) v ch 8 bit (dng c 8 chn d liu t D0 n D7), ch 4 bit, khi truyn 1 byte, chng ta s truyn na cao ca byte trc, sau mi truyn na thp ca byte.

Trc khi truyn cc k t ra mn hnh LCD ta cn thit lp cho LCD nh chn ch 4 bit hoc 8 bit, 1 dng hay 2 dng ,bt/tt con tr Di y l bng tp lnh ca LCD :Bng Tp Lnh Ca LCD

M (Hex) Lnh n thanh ghi ca LCD

1Xa mn hnh hin th

2Tr v u dng

4Gi con tr (dch con tr sang tri)

5Tng con tr (dch con tr sang phi)

6Dch hin th sang tri

7Dch hin th sang phi

8Tt con tr, tt hin th

ATt hin th, bt con tr

CBt hin th, tt con tr

EBt hin th, nhp nhy con tr

FTt con tr, nhp nhy con tr

10Dch v tr con tr sang tri

14Dch v tr con tr sang phi

18Dch ton b v tr hin th sang tri

1CDch ton b v tr hin th sang phi

80p con tr v u dng th nht

C0p con tr v u dng th hai

38Hai dng v ma trn 5x7

c thanh ghi lnh,ta phi t RS=0 v R/W =1 v xung cao xung thp cho bt E. Sau khi c thanh ghi lnh,nu bit D7(c bn ) mc cao th LCD bn, khng c thng tin hay lnh no c xut n n. Khi D7=0 mi c th gi lnh hay d liu n LCD. Chng ta nn kim tra bit c bn trc khi ghi thng tin ln LCD.

d) IC n p 7805 Vi nhng mch in khng i hi n nh ca in p qu cao, s dng IC n p thng c ngi thit k s dng v mch in kh n gin. Cc loi n p thng c s dng l IC 78xx, vi xx l in p cn n p. V d 7805 n p 5V, 7812 n p 12V. Vic dng cc loi IC n p 78xx tng t nhau, di y l minh ha cho IC n p 7805:

S pha di IC 7805 c 3 chn: * Chn s 1 l chn IN. * Chn s 2 l chn GND.

* Chn s 3 l chn OUT.

Ng ra OUT lun n nh 5V d in p t ngun cung cp thay i. Mch ny dng bo v nhng mch in ch hot ng in p 5V (cc loi IC thng hot ng in p ny). Nu ngun in c s c t ngt: in p tng cao th mch in vn hot ng n nh nh c IC 7805 vn gi c in p ng ra OUT 5V khng i.

Mch trn ly ngun mt chiu t mt my bin p vi in p t 7V n 9V a vo ng IN. Khi kt ni mch in, do nhiu nguyn nhn, ngi dng d nhm ln cc tnh ca ngun cung cp khi u ni vo mch, trong trng hp ny rt d nh hng n cc linh kin trn board mch. V l do mt diode c lp thm vo mch, diode m bo cc tnh ca ngun cp cho mch theo mt chiu duy nht, v ngui dng cng khng cn quan tm n cc tnh ca ngun khi ni vo ng IN na.

e) T in

T in l linh kin in t th ng c s dng rt rng ri trong cc mch in t, chng c s dng trong cc mch lc ngun, lc nhiu, mch truyn tn hiu xoay chiu, mch to dao ng.Trong mch ny ta s s dng mt t ha cho khi reset, v hai t gm cho khi dao ng.

T gm T ha

f)in tr

Trong thit b in t in tr l mt linh kin quan trng, chng c lm t hp cht cacbon v kim loi tu theo t l pha trn m ngi ta to ra c cc loi in tr c tr s khc nhau.

Hnh dng ca in tr trong thit b in t.g) Nt bm button

Trong mch ny ta s dng 3 nt bm iu khin menu, tng , gim cho vic ci t gi , ngy, thng, nm.

Nt bm

Bin tr

h)Thch anh

Trong mch ta s s dng hai thch anh, mt loi 12Mhz to dao ng cho AT89C51, mt loi 32,768 Mhz to dao ng cho DS1307.

Thch anh 12 Mhz Thch anh 32,768 Mhz

i) Pin CMOS 3V

Ta s s dng mt v pin CMOS 3V lm ngun nui cho DS1307 n c th lu c gi khi mt in ngun cung cp cho mch.

Pin CMOS

II XY DNG H THNG1) Thit k phn cng H thng s gm 5 khi nh phn tch chng hai, ta s c s nguyn l nh sau:

Trn c s s nguyn l, v mch in:

Mch in mt lp2) Thit k phn mm#include

#include

unsigned char set,mode,giobt,phutbt,chedo,onoff;

unsigned char xau1[16]={76,85,79,78,71,32,67,79,78,71,32,68,85,65,78,32};

unsigned char thoigian[7]={0,0,0,2,1,1,0};



unsigned char vitri1[7]={0x88,0x8b,0x8e,0xc4,0xc7,0xca,0xcf};

sfr DATA=0xA0;

sbit RE=P3^0;

sbit RW=P3^1;

sbit E=P3^2;

sbit BF=0xA7;

sbit SCL=P3^3;

sbit SDA=P3^4;

sbit MODE=P1^7;

sbit AL=P1^6;

sbit SET=P3^7;

sbit UP=P3^5;

sbit DOWN=P3^6;

void delay_short()

{unsigned char i;

for (i = 0; i < 4; i++)

{};

}

void SCL_high()

{

SCL = 1;

delay_short();

}

void SCL_low()

{

SCL = 0;

delay_short();

}

//Khoi I2C

void I2C_Start()

{

SDA = 1;

SCL = 1;

SDA = 0;

delay_short();

SCL = 0;

SDA = 1;

}

void I2C_Stop()

{

SDA = 0;

SCL_high();

SDA = 1;

}

bit I2C_Write(unsigned char dat)

{

unsigned char i;

bit outbit;

for (i = 1; i

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